diff options
| author | Stefan Agner <stefan@agner.ch> | 2015-03-16 17:42:34 -0400 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2015-03-19 04:20:17 -0400 |
| commit | e4c02dced975cbb3e7cb097a0895ce0143b3386a (patch) | |
| tree | 2abd5fb32e51949422e5a7b39275c96c1f5413f3 /drivers/pinctrl | |
| parent | 5757bfe51e53f8ae6e201310a830b207c5a64e02 (diff) | |
pinctrl: tegra: use signed bitfields for optional fields
Optional fields are set to -1 by various preprocessor macros. Make
sure the fields can actually store them.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl')
| -rw-r--r-- | drivers/pinctrl/pinctrl-tegra.h | 40 |
1 files changed, 20 insertions, 20 deletions
diff --git a/drivers/pinctrl/pinctrl-tegra.h b/drivers/pinctrl/pinctrl-tegra.h index d54ab9d38792..1615db7e3a4b 100644 --- a/drivers/pinctrl/pinctrl-tegra.h +++ b/drivers/pinctrl/pinctrl-tegra.h | |||
| @@ -139,26 +139,26 @@ struct tegra_pingroup { | |||
| 139 | u32 pupd_bank:2; | 139 | u32 pupd_bank:2; |
| 140 | u32 tri_bank:2; | 140 | u32 tri_bank:2; |
| 141 | u32 drv_bank:2; | 141 | u32 drv_bank:2; |
| 142 | u32 mux_bit:6; | 142 | s32 mux_bit:6; |
| 143 | u32 pupd_bit:6; | 143 | s32 pupd_bit:6; |
| 144 | u32 tri_bit:6; | 144 | s32 tri_bit:6; |
| 145 | u32 einput_bit:6; | 145 | s32 einput_bit:6; |
| 146 | u32 odrain_bit:6; | 146 | s32 odrain_bit:6; |
| 147 | u32 lock_bit:6; | 147 | s32 lock_bit:6; |
| 148 | u32 ioreset_bit:6; | 148 | s32 ioreset_bit:6; |
| 149 | u32 rcv_sel_bit:6; | 149 | s32 rcv_sel_bit:6; |
| 150 | u32 hsm_bit:6; | 150 | s32 hsm_bit:6; |
| 151 | u32 schmitt_bit:6; | 151 | s32 schmitt_bit:6; |
| 152 | u32 lpmd_bit:6; | 152 | s32 lpmd_bit:6; |
| 153 | u32 drvdn_bit:6; | 153 | s32 drvdn_bit:6; |
| 154 | u32 drvup_bit:6; | 154 | s32 drvup_bit:6; |
| 155 | u32 slwr_bit:6; | 155 | s32 slwr_bit:6; |
| 156 | u32 slwf_bit:6; | 156 | s32 slwf_bit:6; |
| 157 | u32 drvtype_bit:6; | 157 | s32 drvtype_bit:6; |
| 158 | u32 drvdn_width:6; | 158 | s32 drvdn_width:6; |
| 159 | u32 drvup_width:6; | 159 | s32 drvup_width:6; |
| 160 | u32 slwr_width:6; | 160 | s32 slwr_width:6; |
| 161 | u32 slwf_width:6; | 161 | s32 slwf_width:6; |
| 162 | }; | 162 | }; |
| 163 | 163 | ||
| 164 | /** | 164 | /** |
