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authorChanho Park <chanho61.park@samsung.com>2011-11-11 04:47:58 -0500
committerLinus Walleij <linus.walleij@linaro.org>2012-01-03 03:10:01 -0500
commit3c739ad0df5eb41cd7adad879eda6aa09879eb76 (patch)
tree4ab739e639373a18ca993b26b6c18ace7edee9e2 /drivers/pinctrl
parent33d58949adee5086478e140751e4a7263bd7e207 (diff)
pinctrl: add a pin_base for sparse gpio-ranges
This patch enables mapping a base offset of gpio ranges with a pin offset even if does'nt matched. A base of pinctrl_gpio_range means a base offset of gpio. However, we cannot convert gpio to pin number for sparse gpio ranges just only using a gpio base offset. We can convert a gpio to real pin number(even if not matched) using a new pin_base which means a base pin offset of requested gpio range. Now, the pin control subsystem passes the pin base offset to the pinmux driver. For example, let's assume below two gpio ranges in the system. static struct pinctrl_gpio_range gpio_range_a = { .name = "chip a", .id = 0, .base = 32, .pin_base = 32, .npins = 16, .gc = &chip_a; }; static struct pinctrl_gpio_range gpio_range_b = { .name = "chip b", .id = 0, .base = 48, .pin_base = 64, .npins = 8, .gc = &chip_b; }; We can calucalate a exact pin ranges even if doesn't matched with gpio ranges. chip a: gpio-range : [32 .. 47] pin-range : [32 .. 47] chip b: gpio-range : [48 .. 55] pin-range : [64 .. 71] Signed-off-by: Chanho Park <chanho61.park@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r--drivers/pinctrl/pinmux-sirf.c6
-rw-r--r--drivers/pinctrl/pinmux-u300.c1
-rw-r--r--drivers/pinctrl/pinmux.c4
3 files changed, 8 insertions, 3 deletions
diff --git a/drivers/pinctrl/pinmux-sirf.c b/drivers/pinctrl/pinmux-sirf.c
index d848d9764378..99e688e07ea0 100644
--- a/drivers/pinctrl/pinmux-sirf.c
+++ b/drivers/pinctrl/pinmux-sirf.c
@@ -1067,7 +1067,7 @@ static int sirfsoc_pinmux_request_gpio(struct pinctrl_dev *pmxdev,
1067 spmx = pinctrl_dev_get_drvdata(pmxdev); 1067 spmx = pinctrl_dev_get_drvdata(pmxdev);
1068 1068
1069 muxval = readl(spmx->gpio_virtbase + SIRFSOC_GPIO_PAD_EN(group)); 1069 muxval = readl(spmx->gpio_virtbase + SIRFSOC_GPIO_PAD_EN(group));
1070 muxval = muxval | (1 << offset); 1070 muxval = muxval | (1 << (offset - range->pin_base));
1071 writel(muxval, spmx->gpio_virtbase + SIRFSOC_GPIO_PAD_EN(group)); 1071 writel(muxval, spmx->gpio_virtbase + SIRFSOC_GPIO_PAD_EN(group));
1072 1072
1073 return 0; 1073 return 0;
@@ -1100,21 +1100,25 @@ static struct pinctrl_gpio_range sirfsoc_gpio_ranges[] = {
1100 .name = "sirfsoc-gpio*", 1100 .name = "sirfsoc-gpio*",
1101 .id = 0, 1101 .id = 0,
1102 .base = 0, 1102 .base = 0,
1103 .pin_base = 0,
1103 .npins = 32, 1104 .npins = 32,
1104 }, { 1105 }, {
1105 .name = "sirfsoc-gpio*", 1106 .name = "sirfsoc-gpio*",
1106 .id = 1, 1107 .id = 1,
1107 .base = 32, 1108 .base = 32,
1109 .pin_base = 32,
1108 .npins = 32, 1110 .npins = 32,
1109 }, { 1111 }, {
1110 .name = "sirfsoc-gpio*", 1112 .name = "sirfsoc-gpio*",
1111 .id = 2, 1113 .id = 2,
1112 .base = 64, 1114 .base = 64,
1115 .pin_base = 64,
1113 .npins = 32, 1116 .npins = 32,
1114 }, { 1117 }, {
1115 .name = "sirfsoc-gpio*", 1118 .name = "sirfsoc-gpio*",
1116 .id = 3, 1119 .id = 3,
1117 .base = 96, 1120 .base = 96,
1121 .pin_base = 96,
1118 .npins = 19, 1122 .npins = 19,
1119 }, 1123 },
1120}; 1124};
diff --git a/drivers/pinctrl/pinmux-u300.c b/drivers/pinctrl/pinmux-u300.c
index 145a84dc16e6..bcf61bee7763 100644
--- a/drivers/pinctrl/pinmux-u300.c
+++ b/drivers/pinctrl/pinmux-u300.c
@@ -1026,6 +1026,7 @@ static struct pinctrl_gpio_range u300_gpio_range = {
1026 .name = "COH901*", 1026 .name = "COH901*",
1027 .id = 0, 1027 .id = 0,
1028 .base = 0, 1028 .base = 0,
1029 .pin_base = 0,
1029 .npins = 64, 1030 .npins = 64,
1030}; 1031};
1031 1032
diff --git a/drivers/pinctrl/pinmux.c b/drivers/pinctrl/pinmux.c
index ee3aba78c3dd..92aa13ee2208 100644
--- a/drivers/pinctrl/pinmux.c
+++ b/drivers/pinctrl/pinmux.c
@@ -229,7 +229,7 @@ int pinmux_request_gpio(unsigned gpio)
229 return -EINVAL; 229 return -EINVAL;
230 230
231 /* Convert to the pin controllers number space */ 231 /* Convert to the pin controllers number space */
232 pin = gpio - range->base; 232 pin = gpio - range->base + range->pin_base;
233 233
234 /* Conjure some name stating what chip and pin this is taken by */ 234 /* Conjure some name stating what chip and pin this is taken by */
235 snprintf(gpiostr, 15, "%s:%d", range->name, gpio); 235 snprintf(gpiostr, 15, "%s:%d", range->name, gpio);
@@ -263,7 +263,7 @@ void pinmux_free_gpio(unsigned gpio)
263 return; 263 return;
264 264
265 /* Convert to the pin controllers number space */ 265 /* Convert to the pin controllers number space */
266 pin = gpio - range->base; 266 pin = gpio - range->base + range->pin_base;
267 267
268 func = pin_free(pctldev, pin, range); 268 func = pin_free(pctldev, pin, range);
269 kfree(func); 269 kfree(func);