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authorUwe Kleine-König <u.kleine-koenig@pengutronix.de>2015-01-27 18:45:56 -0500
committerLinus Walleij <linus.walleij@linaro.org>2015-02-03 08:02:55 -0500
commit34027ca2bbc6043fea8fc5c4a82670518b6be7df (patch)
treec838dd2fcd6bfb60ebecf91412a0d9db2cd7960e /drivers/pinctrl
parent4ff0f034e95d65f8f063a362dfcf86e986377a82 (diff)
pinctrl: imx25: fix numbering for pins
The pin id for a given tuple listed in a fsl,pins property is calculated by dividing the first entry (which is also a register offset) by 4. As the first available register is at offset 0x8 and configures the pad MX25_PAD_A10 the right id for this pin is 2. All other pins are off by one, too. This patch drops the definition MX25_PAD_RESERVE1 (together with its only use) and decrements all following values by 1. Fixes: b4a87c9b966f ("pinctrl: pinctrl-imx: add imx25 pinctrl driver") Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Tested-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r--drivers/pinctrl/freescale/pinctrl-imx25.c276
1 files changed, 137 insertions, 139 deletions
diff --git a/drivers/pinctrl/freescale/pinctrl-imx25.c b/drivers/pinctrl/freescale/pinctrl-imx25.c
index 8d1013a040c9..faf635654312 100644
--- a/drivers/pinctrl/freescale/pinctrl-imx25.c
+++ b/drivers/pinctrl/freescale/pinctrl-imx25.c
@@ -27,150 +27,148 @@
27 27
28enum imx25_pads { 28enum imx25_pads {
29 MX25_PAD_RESERVE0 = 1, 29 MX25_PAD_RESERVE0 = 1,
30 MX25_PAD_RESERVE1 = 2, 30 MX25_PAD_A10 = 2,
31 MX25_PAD_A10 = 3, 31 MX25_PAD_A13 = 3,
32 MX25_PAD_A13 = 4, 32 MX25_PAD_A14 = 4,
33 MX25_PAD_A14 = 5, 33 MX25_PAD_A15 = 5,
34 MX25_PAD_A15 = 6, 34 MX25_PAD_A16 = 6,
35 MX25_PAD_A16 = 7, 35 MX25_PAD_A17 = 7,
36 MX25_PAD_A17 = 8, 36 MX25_PAD_A18 = 8,
37 MX25_PAD_A18 = 9, 37 MX25_PAD_A19 = 9,
38 MX25_PAD_A19 = 10, 38 MX25_PAD_A20 = 10,
39 MX25_PAD_A20 = 11, 39 MX25_PAD_A21 = 11,
40 MX25_PAD_A21 = 12, 40 MX25_PAD_A22 = 12,
41 MX25_PAD_A22 = 13, 41 MX25_PAD_A23 = 13,
42 MX25_PAD_A23 = 14, 42 MX25_PAD_A24 = 14,
43 MX25_PAD_A24 = 15, 43 MX25_PAD_A25 = 15,
44 MX25_PAD_A25 = 16, 44 MX25_PAD_EB0 = 16,
45 MX25_PAD_EB0 = 17, 45 MX25_PAD_EB1 = 17,
46 MX25_PAD_EB1 = 18, 46 MX25_PAD_OE = 18,
47 MX25_PAD_OE = 19, 47 MX25_PAD_CS0 = 19,
48 MX25_PAD_CS0 = 20, 48 MX25_PAD_CS1 = 20,
49 MX25_PAD_CS1 = 21, 49 MX25_PAD_CS4 = 21,
50 MX25_PAD_CS4 = 22, 50 MX25_PAD_CS5 = 22,
51 MX25_PAD_CS5 = 23, 51 MX25_PAD_NF_CE0 = 23,
52 MX25_PAD_NF_CE0 = 24, 52 MX25_PAD_ECB = 24,
53 MX25_PAD_ECB = 25, 53 MX25_PAD_LBA = 25,
54 MX25_PAD_LBA = 26, 54 MX25_PAD_BCLK = 26,
55 MX25_PAD_BCLK = 27, 55 MX25_PAD_RW = 27,
56 MX25_PAD_RW = 28, 56 MX25_PAD_NFWE_B = 28,
57 MX25_PAD_NFWE_B = 29, 57 MX25_PAD_NFRE_B = 29,
58 MX25_PAD_NFRE_B = 30, 58 MX25_PAD_NFALE = 30,
59 MX25_PAD_NFALE = 31, 59 MX25_PAD_NFCLE = 31,
60 MX25_PAD_NFCLE = 32, 60 MX25_PAD_NFWP_B = 32,
61 MX25_PAD_NFWP_B = 33, 61 MX25_PAD_NFRB = 33,
62 MX25_PAD_NFRB = 34, 62 MX25_PAD_D15 = 34,
63 MX25_PAD_D15 = 35, 63 MX25_PAD_D14 = 35,
64 MX25_PAD_D14 = 36, 64 MX25_PAD_D13 = 36,
65 MX25_PAD_D13 = 37, 65 MX25_PAD_D12 = 37,
66 MX25_PAD_D12 = 38, 66 MX25_PAD_D11 = 38,
67 MX25_PAD_D11 = 39, 67 MX25_PAD_D10 = 39,
68 MX25_PAD_D10 = 40, 68 MX25_PAD_D9 = 40,
69 MX25_PAD_D9 = 41, 69 MX25_PAD_D8 = 41,
70 MX25_PAD_D8 = 42, 70 MX25_PAD_D7 = 42,
71 MX25_PAD_D7 = 43, 71 MX25_PAD_D6 = 43,
72 MX25_PAD_D6 = 44, 72 MX25_PAD_D5 = 44,
73 MX25_PAD_D5 = 45, 73 MX25_PAD_D4 = 45,
74 MX25_PAD_D4 = 46, 74 MX25_PAD_D3 = 46,
75 MX25_PAD_D3 = 47, 75 MX25_PAD_D2 = 47,
76 MX25_PAD_D2 = 48, 76 MX25_PAD_D1 = 48,
77 MX25_PAD_D1 = 49, 77 MX25_PAD_D0 = 49,
78 MX25_PAD_D0 = 50, 78 MX25_PAD_LD0 = 50,
79 MX25_PAD_LD0 = 51, 79 MX25_PAD_LD1 = 51,
80 MX25_PAD_LD1 = 52, 80 MX25_PAD_LD2 = 52,
81 MX25_PAD_LD2 = 53, 81 MX25_PAD_LD3 = 53,
82 MX25_PAD_LD3 = 54, 82 MX25_PAD_LD4 = 54,
83 MX25_PAD_LD4 = 55, 83 MX25_PAD_LD5 = 55,
84 MX25_PAD_LD5 = 56, 84 MX25_PAD_LD6 = 56,
85 MX25_PAD_LD6 = 57, 85 MX25_PAD_LD7 = 57,
86 MX25_PAD_LD7 = 58, 86 MX25_PAD_LD8 = 58,
87 MX25_PAD_LD8 = 59, 87 MX25_PAD_LD9 = 59,
88 MX25_PAD_LD9 = 60, 88 MX25_PAD_LD10 = 60,
89 MX25_PAD_LD10 = 61, 89 MX25_PAD_LD11 = 61,
90 MX25_PAD_LD11 = 62, 90 MX25_PAD_LD12 = 62,
91 MX25_PAD_LD12 = 63, 91 MX25_PAD_LD13 = 63,
92 MX25_PAD_LD13 = 64, 92 MX25_PAD_LD14 = 64,
93 MX25_PAD_LD14 = 65, 93 MX25_PAD_LD15 = 65,
94 MX25_PAD_LD15 = 66, 94 MX25_PAD_HSYNC = 66,
95 MX25_PAD_HSYNC = 67, 95 MX25_PAD_VSYNC = 67,
96 MX25_PAD_VSYNC = 68, 96 MX25_PAD_LSCLK = 68,
97 MX25_PAD_LSCLK = 69, 97 MX25_PAD_OE_ACD = 69,
98 MX25_PAD_OE_ACD = 70, 98 MX25_PAD_CONTRAST = 70,
99 MX25_PAD_CONTRAST = 71, 99 MX25_PAD_PWM = 71,
100 MX25_PAD_PWM = 72, 100 MX25_PAD_CSI_D2 = 72,
101 MX25_PAD_CSI_D2 = 73, 101 MX25_PAD_CSI_D3 = 73,
102 MX25_PAD_CSI_D3 = 74, 102 MX25_PAD_CSI_D4 = 74,
103 MX25_PAD_CSI_D4 = 75, 103 MX25_PAD_CSI_D5 = 75,
104 MX25_PAD_CSI_D5 = 76, 104 MX25_PAD_CSI_D6 = 76,
105 MX25_PAD_CSI_D6 = 77, 105 MX25_PAD_CSI_D7 = 77,
106 MX25_PAD_CSI_D7 = 78, 106 MX25_PAD_CSI_D8 = 78,
107 MX25_PAD_CSI_D8 = 79, 107 MX25_PAD_CSI_D9 = 79,
108 MX25_PAD_CSI_D9 = 80, 108 MX25_PAD_CSI_MCLK = 80,
109 MX25_PAD_CSI_MCLK = 81, 109 MX25_PAD_CSI_VSYNC = 81,
110 MX25_PAD_CSI_VSYNC = 82, 110 MX25_PAD_CSI_HSYNC = 82,
111 MX25_PAD_CSI_HSYNC = 83, 111 MX25_PAD_CSI_PIXCLK = 83,
112 MX25_PAD_CSI_PIXCLK = 84, 112 MX25_PAD_I2C1_CLK = 84,
113 MX25_PAD_I2C1_CLK = 85, 113 MX25_PAD_I2C1_DAT = 85,
114 MX25_PAD_I2C1_DAT = 86, 114 MX25_PAD_CSPI1_MOSI = 86,
115 MX25_PAD_CSPI1_MOSI = 87, 115 MX25_PAD_CSPI1_MISO = 87,
116 MX25_PAD_CSPI1_MISO = 88, 116 MX25_PAD_CSPI1_SS0 = 88,
117 MX25_PAD_CSPI1_SS0 = 89, 117 MX25_PAD_CSPI1_SS1 = 89,
118 MX25_PAD_CSPI1_SS1 = 90, 118 MX25_PAD_CSPI1_SCLK = 90,
119 MX25_PAD_CSPI1_SCLK = 91, 119 MX25_PAD_CSPI1_RDY = 91,
120 MX25_PAD_CSPI1_RDY = 92, 120 MX25_PAD_UART1_RXD = 92,
121 MX25_PAD_UART1_RXD = 93, 121 MX25_PAD_UART1_TXD = 93,
122 MX25_PAD_UART1_TXD = 94, 122 MX25_PAD_UART1_RTS = 94,
123 MX25_PAD_UART1_RTS = 95, 123 MX25_PAD_UART1_CTS = 95,
124 MX25_PAD_UART1_CTS = 96, 124 MX25_PAD_UART2_RXD = 96,
125 MX25_PAD_UART2_RXD = 97, 125 MX25_PAD_UART2_TXD = 97,
126 MX25_PAD_UART2_TXD = 98, 126 MX25_PAD_UART2_RTS = 98,
127 MX25_PAD_UART2_RTS = 99, 127 MX25_PAD_UART2_CTS = 99,
128 MX25_PAD_UART2_CTS = 100, 128 MX25_PAD_SD1_CMD = 100,
129 MX25_PAD_SD1_CMD = 101, 129 MX25_PAD_SD1_CLK = 101,
130 MX25_PAD_SD1_CLK = 102, 130 MX25_PAD_SD1_DATA0 = 102,
131 MX25_PAD_SD1_DATA0 = 103, 131 MX25_PAD_SD1_DATA1 = 103,
132 MX25_PAD_SD1_DATA1 = 104, 132 MX25_PAD_SD1_DATA2 = 104,
133 MX25_PAD_SD1_DATA2 = 105, 133 MX25_PAD_SD1_DATA3 = 105,
134 MX25_PAD_SD1_DATA3 = 106, 134 MX25_PAD_KPP_ROW0 = 106,
135 MX25_PAD_KPP_ROW0 = 107, 135 MX25_PAD_KPP_ROW1 = 107,
136 MX25_PAD_KPP_ROW1 = 108, 136 MX25_PAD_KPP_ROW2 = 108,
137 MX25_PAD_KPP_ROW2 = 109, 137 MX25_PAD_KPP_ROW3 = 109,
138 MX25_PAD_KPP_ROW3 = 110, 138 MX25_PAD_KPP_COL0 = 110,
139 MX25_PAD_KPP_COL0 = 111, 139 MX25_PAD_KPP_COL1 = 111,
140 MX25_PAD_KPP_COL1 = 112, 140 MX25_PAD_KPP_COL2 = 112,
141 MX25_PAD_KPP_COL2 = 113, 141 MX25_PAD_KPP_COL3 = 113,
142 MX25_PAD_KPP_COL3 = 114, 142 MX25_PAD_FEC_MDC = 114,
143 MX25_PAD_FEC_MDC = 115, 143 MX25_PAD_FEC_MDIO = 115,
144 MX25_PAD_FEC_MDIO = 116, 144 MX25_PAD_FEC_TDATA0 = 116,
145 MX25_PAD_FEC_TDATA0 = 117, 145 MX25_PAD_FEC_TDATA1 = 117,
146 MX25_PAD_FEC_TDATA1 = 118, 146 MX25_PAD_FEC_TX_EN = 118,
147 MX25_PAD_FEC_TX_EN = 119, 147 MX25_PAD_FEC_RDATA0 = 119,
148 MX25_PAD_FEC_RDATA0 = 120, 148 MX25_PAD_FEC_RDATA1 = 120,
149 MX25_PAD_FEC_RDATA1 = 121, 149 MX25_PAD_FEC_RX_DV = 121,
150 MX25_PAD_FEC_RX_DV = 122, 150 MX25_PAD_FEC_TX_CLK = 122,
151 MX25_PAD_FEC_TX_CLK = 123, 151 MX25_PAD_RTCK = 123,
152 MX25_PAD_RTCK = 124, 152 MX25_PAD_DE_B = 124,
153 MX25_PAD_DE_B = 125, 153 MX25_PAD_GPIO_A = 125,
154 MX25_PAD_GPIO_A = 126, 154 MX25_PAD_GPIO_B = 126,
155 MX25_PAD_GPIO_B = 127, 155 MX25_PAD_GPIO_C = 127,
156 MX25_PAD_GPIO_C = 128, 156 MX25_PAD_GPIO_D = 128,
157 MX25_PAD_GPIO_D = 129, 157 MX25_PAD_GPIO_E = 129,
158 MX25_PAD_GPIO_E = 130, 158 MX25_PAD_GPIO_F = 130,
159 MX25_PAD_GPIO_F = 131, 159 MX25_PAD_EXT_ARMCLK = 131,
160 MX25_PAD_EXT_ARMCLK = 132, 160 MX25_PAD_UPLL_BYPCLK = 132,
161 MX25_PAD_UPLL_BYPCLK = 133, 161 MX25_PAD_VSTBY_REQ = 133,
162 MX25_PAD_VSTBY_REQ = 134, 162 MX25_PAD_VSTBY_ACK = 134,
163 MX25_PAD_VSTBY_ACK = 135, 163 MX25_PAD_POWER_FAIL = 135,
164 MX25_PAD_POWER_FAIL = 136, 164 MX25_PAD_CLKO = 136,
165 MX25_PAD_CLKO = 137, 165 MX25_PAD_BOOT_MODE0 = 137,
166 MX25_PAD_BOOT_MODE0 = 138, 166 MX25_PAD_BOOT_MODE1 = 138,
167 MX25_PAD_BOOT_MODE1 = 139,
168}; 167};
169 168
170/* Pad names for the pinmux subsystem */ 169/* Pad names for the pinmux subsystem */
171static const struct pinctrl_pin_desc imx25_pinctrl_pads[] = { 170static const struct pinctrl_pin_desc imx25_pinctrl_pads[] = {
172 IMX_PINCTRL_PIN(MX25_PAD_RESERVE0), 171 IMX_PINCTRL_PIN(MX25_PAD_RESERVE0),
173 IMX_PINCTRL_PIN(MX25_PAD_RESERVE1),
174 IMX_PINCTRL_PIN(MX25_PAD_A10), 172 IMX_PINCTRL_PIN(MX25_PAD_A10),
175 IMX_PINCTRL_PIN(MX25_PAD_A13), 173 IMX_PINCTRL_PIN(MX25_PAD_A13),
176 IMX_PINCTRL_PIN(MX25_PAD_A14), 174 IMX_PINCTRL_PIN(MX25_PAD_A14),
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-14 12:58:28 -0500