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authorLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2013-02-16 10:38:30 -0500
committerLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2013-03-15 08:33:36 -0400
commitdcc427e1a82df8ff123f12186af31dbe30dfa7cb (patch)
treeb828ad91bd804f437c64c7d738d293a5743ca011 /drivers/pinctrl/sh-pfc
parentfe330ce8e1cfc5cb3ba091e28e871aaab436b258 (diff)
sh-pfc: Don't define the per-device pinctrl struct instances as global
The pinctrl_desc and pinctrl_gpio_range structures registered with the pinctrl core are per-device instances. Move them to the dynamically allocated sh_pfc_pinctrl structure and initialize them at runtime. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/sh-pfc')
-rw-r--r--drivers/pinctrl/sh-pfc/pinctrl.c40
1 files changed, 18 insertions, 22 deletions
diff --git a/drivers/pinctrl/sh-pfc/pinctrl.c b/drivers/pinctrl/sh-pfc/pinctrl.c
index 887930e78d58..d113746ec873 100644
--- a/drivers/pinctrl/sh-pfc/pinctrl.c
+++ b/drivers/pinctrl/sh-pfc/pinctrl.c
@@ -27,6 +27,9 @@
27 27
28struct sh_pfc_pinctrl { 28struct sh_pfc_pinctrl {
29 struct pinctrl_dev *pctl; 29 struct pinctrl_dev *pctl;
30 struct pinctrl_desc pctl_desc;
31 struct pinctrl_gpio_range range;
32
30 struct sh_pfc *pfc; 33 struct sh_pfc *pfc;
31 34
32 struct pinmux_gpio **functions; 35 struct pinmux_gpio **functions;
@@ -314,19 +317,6 @@ static const struct pinconf_ops sh_pfc_pinconf_ops = {
314 .pin_config_dbg_show = sh_pfc_pinconf_dbg_show, 317 .pin_config_dbg_show = sh_pfc_pinconf_dbg_show,
315}; 318};
316 319
317static struct pinctrl_gpio_range sh_pfc_gpio_range = {
318 .name = DRV_NAME,
319 .id = 0,
320};
321
322static struct pinctrl_desc sh_pfc_pinctrl_desc = {
323 .name = DRV_NAME,
324 .owner = THIS_MODULE,
325 .pctlops = &sh_pfc_pinctrl_ops,
326 .pmxops = &sh_pfc_pinmux_ops,
327 .confops = &sh_pfc_pinconf_ops,
328};
329
330static void sh_pfc_map_one_gpio(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx, 320static void sh_pfc_map_one_gpio(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx,
331 struct pinmux_gpio *gpio, unsigned offset) 321 struct pinmux_gpio *gpio, unsigned offset)
332{ 322{
@@ -386,9 +376,6 @@ static int sh_pfc_map_gpios(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
386 376
387 spin_unlock_irqrestore(&pfc->lock, flags); 377 spin_unlock_irqrestore(&pfc->lock, flags);
388 378
389 sh_pfc_pinctrl_desc.pins = pmx->pads;
390 sh_pfc_pinctrl_desc.npins = pmx->nr_pads;
391
392 return 0; 379 return 0;
393} 380}
394 381
@@ -438,16 +425,25 @@ int sh_pfc_register_pinctrl(struct sh_pfc *pfc)
438 if (unlikely(ret != 0)) 425 if (unlikely(ret != 0))
439 return ret; 426 return ret;
440 427
441 pmx->pctl = pinctrl_register(&sh_pfc_pinctrl_desc, pfc->dev, pmx); 428 pmx->pctl_desc.name = DRV_NAME;
429 pmx->pctl_desc.owner = THIS_MODULE;
430 pmx->pctl_desc.pctlops = &sh_pfc_pinctrl_ops;
431 pmx->pctl_desc.pmxops = &sh_pfc_pinmux_ops;
432 pmx->pctl_desc.confops = &sh_pfc_pinconf_ops;
433 pmx->pctl_desc.pins = pmx->pads;
434 pmx->pctl_desc.npins = pmx->nr_pads;
435
436 pmx->pctl = pinctrl_register(&pmx->pctl_desc, pfc->dev, pmx);
442 if (IS_ERR(pmx->pctl)) 437 if (IS_ERR(pmx->pctl))
443 return PTR_ERR(pmx->pctl); 438 return PTR_ERR(pmx->pctl);
444 439
445 sh_pfc_gpio_range.npins = pfc->info->last_gpio 440 pmx->range.name = DRV_NAME,
446 - pfc->info->first_gpio + 1; 441 pmx->range.id = 0;
447 sh_pfc_gpio_range.base = pfc->info->first_gpio; 442 pmx->range.npins = pfc->info->last_gpio - pfc->info->first_gpio + 1;
448 sh_pfc_gpio_range.pin_base = pfc->info->first_gpio; 443 pmx->range.base = pfc->info->first_gpio;
444 pmx->range.pin_base = pfc->info->first_gpio;
449 445
450 pinctrl_add_gpio_range(pmx->pctl, &sh_pfc_gpio_range); 446 pinctrl_add_gpio_range(pmx->pctl, &pmx->range);
451 447
452 return 0; 448 return 0;
453} 449}