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authorGeert Uytterhoeven <geert+renesas@linux-m68k.org>2014-02-10 08:00:57 -0500
committerLinus Walleij <linus.walleij@linaro.org>2014-02-25 04:49:11 -0500
commit202909cdf117743bdbf8abc0f817950c8955c8cf (patch)
tree4e7a18c85e8aad6582ef332c8b24560c3e103eab /drivers/pinctrl/sh-pfc
parentdc1791188bce9b3260aa98f9a017ada910a58401 (diff)
pinctrl: sh-pfc: r8a7790: Add QSPI pin groups
A QSPI function set consists of 3 groups: - qspi_ctrl (2 control wires) - qspi_data2 (2 data wires, for Single/Dual SPI) - qspi_data4 (4 data wires, for Quad SPI) Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/sh-pfc')
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-r8a7790.c33
1 files changed, 33 insertions, 0 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
index ee2ae05c23ad..2814440843df 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
@@ -2389,6 +2389,29 @@ static const unsigned int msiof3_tx_pins[] = {
2389static const unsigned int msiof3_tx_mux[] = { 2389static const unsigned int msiof3_tx_mux[] = {
2390 MSIOF3_TXD_MARK, 2390 MSIOF3_TXD_MARK,
2391}; 2391};
2392/* - QSPI ------------------------------------------------------------------- */
2393static const unsigned int qspi_ctrl_pins[] = {
2394 /* SPCLK, SSL */
2395 RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 9),
2396};
2397static const unsigned int qspi_ctrl_mux[] = {
2398 SPCLK_MARK, SSL_MARK,
2399};
2400static const unsigned int qspi_data2_pins[] = {
2401 /* MOSI_IO0, MISO_IO1 */
2402 RCAR_GP_PIN(1, 5), RCAR_GP_PIN(1, 6),
2403};
2404static const unsigned int qspi_data2_mux[] = {
2405 MOSI_IO0_MARK, MISO_IO1_MARK,
2406};
2407static const unsigned int qspi_data4_pins[] = {
2408 /* MOSI_IO0, MISO_IO1, IO2, IO3 */
2409 RCAR_GP_PIN(1, 5), RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
2410 RCAR_GP_PIN(1, 8),
2411};
2412static const unsigned int qspi_data4_mux[] = {
2413 MOSI_IO0_MARK, MISO_IO1_MARK, IO2_MARK, IO3_MARK,
2414};
2392/* - SCIF0 ------------------------------------------------------------------ */ 2415/* - SCIF0 ------------------------------------------------------------------ */
2393static const unsigned int scif0_data_pins[] = { 2416static const unsigned int scif0_data_pins[] = {
2394 /* RX, TX */ 2417 /* RX, TX */
@@ -3678,6 +3701,9 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
3678 SH_PFC_PIN_GROUP(msiof3_ss2), 3701 SH_PFC_PIN_GROUP(msiof3_ss2),
3679 SH_PFC_PIN_GROUP(msiof3_rx), 3702 SH_PFC_PIN_GROUP(msiof3_rx),
3680 SH_PFC_PIN_GROUP(msiof3_tx), 3703 SH_PFC_PIN_GROUP(msiof3_tx),
3704 SH_PFC_PIN_GROUP(qspi_ctrl),
3705 SH_PFC_PIN_GROUP(qspi_data2),
3706 SH_PFC_PIN_GROUP(qspi_data4),
3681 SH_PFC_PIN_GROUP(scif0_data), 3707 SH_PFC_PIN_GROUP(scif0_data),
3682 SH_PFC_PIN_GROUP(scif0_clk), 3708 SH_PFC_PIN_GROUP(scif0_clk),
3683 SH_PFC_PIN_GROUP(scif0_ctrl), 3709 SH_PFC_PIN_GROUP(scif0_ctrl),
@@ -3978,6 +4004,12 @@ static const char * const msiof3_groups[] = {
3978 "msiof3_tx", 4004 "msiof3_tx",
3979}; 4005};
3980 4006
4007static const char * const qspi_groups[] = {
4008 "qspi_ctrl",
4009 "qspi_data2",
4010 "qspi_data4",
4011};
4012
3981static const char * const scif0_groups[] = { 4013static const char * const scif0_groups[] = {
3982 "scif0_data", 4014 "scif0_data",
3983 "scif0_clk", 4015 "scif0_clk",
@@ -4222,6 +4254,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
4222 SH_PFC_FUNCTION(msiof1), 4254 SH_PFC_FUNCTION(msiof1),
4223 SH_PFC_FUNCTION(msiof2), 4255 SH_PFC_FUNCTION(msiof2),
4224 SH_PFC_FUNCTION(msiof3), 4256 SH_PFC_FUNCTION(msiof3),
4257 SH_PFC_FUNCTION(qspi),
4225 SH_PFC_FUNCTION(scif0), 4258 SH_PFC_FUNCTION(scif0),
4226 SH_PFC_FUNCTION(scif1), 4259 SH_PFC_FUNCTION(scif1),
4227 SH_PFC_FUNCTION(scif2), 4260 SH_PFC_FUNCTION(scif2),