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authorLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2013-02-14 11:36:56 -0500
committerLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2013-03-15 08:33:39 -0400
commita68fdca9b0447a0e7a85ee378510509be8b70d90 (patch)
tree2818288e43d82e8c6c7f829775800da3b59c3930 /drivers/pinctrl/sh-pfc/pinctrl.c
parent17dffe48d18f9c31ba7499af385e10bc02d7c7d9 (diff)
sh-pfc: Use pinmux identifiers in the pin muxing API
The PFC core exposes a sh_pfc_config_gpio() function that configures pinmuxing for a given GPIO (either a real GPIO or a function GPIO). Handling of real and function GPIOs belong to the GPIO layer, move the GPIO number to mark translation to the caller and rename the function to sh_pfc_config_mux(). Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/sh-pfc/pinctrl.c')
-rw-r--r--drivers/pinctrl/sh-pfc/pinctrl.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/pinctrl/sh-pfc/pinctrl.c b/drivers/pinctrl/sh-pfc/pinctrl.c
index d420d9981725..a83f40070b3b 100644
--- a/drivers/pinctrl/sh-pfc/pinctrl.c
+++ b/drivers/pinctrl/sh-pfc/pinctrl.c
@@ -119,6 +119,7 @@ static void sh_pfc_noop_disable(struct pinctrl_dev *pctldev, unsigned func,
119static int sh_pfc_reconfig_pin(struct sh_pfc *pfc, unsigned offset, 119static int sh_pfc_reconfig_pin(struct sh_pfc *pfc, unsigned offset,
120 int new_type) 120 int new_type)
121{ 121{
122 unsigned int mark = pfc->info->pins[offset].enum_id;
122 unsigned long flags; 123 unsigned long flags;
123 int pinmux_type; 124 int pinmux_type;
124 int ret = -EINVAL; 125 int ret = -EINVAL;
@@ -137,7 +138,7 @@ static int sh_pfc_reconfig_pin(struct sh_pfc *pfc, unsigned offset,
137 case PINMUX_TYPE_INPUT: 138 case PINMUX_TYPE_INPUT:
138 case PINMUX_TYPE_INPUT_PULLUP: 139 case PINMUX_TYPE_INPUT_PULLUP:
139 case PINMUX_TYPE_INPUT_PULLDOWN: 140 case PINMUX_TYPE_INPUT_PULLDOWN:
140 sh_pfc_config_gpio(pfc, offset, pinmux_type, GPIO_CFG_FREE); 141 sh_pfc_config_mux(pfc, mark, pinmux_type, GPIO_CFG_FREE);
141 break; 142 break;
142 default: 143 default:
143 goto err; 144 goto err;
@@ -146,15 +147,13 @@ static int sh_pfc_reconfig_pin(struct sh_pfc *pfc, unsigned offset,
146 /* 147 /*
147 * Dry run 148 * Dry run
148 */ 149 */
149 if (sh_pfc_config_gpio(pfc, offset, new_type, 150 if (sh_pfc_config_mux(pfc, mark, new_type, GPIO_CFG_DRYRUN) != 0)
150 GPIO_CFG_DRYRUN) != 0)
151 goto err; 151 goto err;
152 152
153 /* 153 /*
154 * Request 154 * Request
155 */ 155 */
156 if (sh_pfc_config_gpio(pfc, offset, new_type, 156 if (sh_pfc_config_mux(pfc, mark, new_type, GPIO_CFG_REQ) != 0)
157 GPIO_CFG_REQ) != 0)
158 goto err; 157 goto err;
159 158
160 pfc->info->pins[offset].flags &= ~PINMUX_FLAG_TYPE; 159 pfc->info->pins[offset].flags &= ~PINMUX_FLAG_TYPE;
@@ -214,7 +213,8 @@ static void sh_pfc_gpio_disable_free(struct pinctrl_dev *pctldev,
214 213
215 pinmux_type = pfc->info->pins[offset].flags & PINMUX_FLAG_TYPE; 214 pinmux_type = pfc->info->pins[offset].flags & PINMUX_FLAG_TYPE;
216 215
217 sh_pfc_config_gpio(pfc, offset, pinmux_type, GPIO_CFG_FREE); 216 sh_pfc_config_mux(pfc, pfc->info->pins[offset].enum_id, pinmux_type,
217 GPIO_CFG_FREE);
218 218
219 spin_unlock_irqrestore(&pfc->lock, flags); 219 spin_unlock_irqrestore(&pfc->lock, flags);
220} 220}