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authorLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2013-04-19 06:31:08 -0400
committerSimon Horman <horms+renesas@verge.net.au>2013-06-04 08:04:08 -0400
commit4d0882963ece22f8b7c8b0e0832f083a04b891da (patch)
tree535b2affe9b177c99b75069d80d6fee7d7146681 /drivers/pinctrl/sh-pfc/pfc-sh7372.c
parent7231fa45e9e01fa9288098579b2d2a93202f4d3f (diff)
sh-pfc: sh7372: Add INTC pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'drivers/pinctrl/sh-pfc/pfc-sh7372.c')
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-sh7372.c161
1 files changed, 161 insertions, 0 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7372.c b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
index 73b9e255f777..def6e2cf79d3 100644
--- a/drivers/pinctrl/sh-pfc/pfc-sh7372.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
@@ -34,6 +34,28 @@
34 PORT_10(fn, pfx##16, sfx), PORT_10(fn, pfx##17, sfx), \ 34 PORT_10(fn, pfx##16, sfx), PORT_10(fn, pfx##17, sfx), \
35 PORT_10(fn, pfx##18, sfx), PORT_1(fn, pfx##190, sfx) 35 PORT_10(fn, pfx##18, sfx), PORT_1(fn, pfx##190, sfx)
36 36
37#define IRQC_PIN_MUX(irq, pin) \
38static const unsigned int intc_irq##irq##_pins[] = { \
39 pin, \
40}; \
41static const unsigned int intc_irq##irq##_mux[] = { \
42 IRQ##irq##_MARK, \
43}
44
45#define IRQC_PINS_MUX(irq, pin0, pin1) \
46static const unsigned int intc_irq##irq##_0_pins[] = { \
47 pin0, \
48}; \
49static const unsigned int intc_irq##irq##_0_mux[] = { \
50 IRQ##irq##_##pin0##_MARK, \
51}; \
52static const unsigned int intc_irq##irq##_1_pins[] = { \
53 pin1, \
54}; \
55static const unsigned int intc_irq##irq##_1_mux[] = { \
56 IRQ##irq##_##pin1##_MARK, \
57}
58
37enum { 59enum {
38 PINMUX_RESERVED = 0, 60 PINMUX_RESERVED = 0,
39 61
@@ -1186,6 +1208,39 @@ static const unsigned int hdmi_pins[] = {
1186static const unsigned int hdmi_mux[] = { 1208static const unsigned int hdmi_mux[] = {
1187 HDMI_HPD_MARK, HDMI_CEC_MARK, 1209 HDMI_HPD_MARK, HDMI_CEC_MARK,
1188}; 1210};
1211/* - INTC ------------------------------------------------------------------- */
1212IRQC_PINS_MUX(0, 6, 162);
1213IRQC_PIN_MUX(1, 12);
1214IRQC_PINS_MUX(2, 4, 5);
1215IRQC_PINS_MUX(3, 8, 16);
1216IRQC_PINS_MUX(4, 17, 163);
1217IRQC_PIN_MUX(5, 18);
1218IRQC_PINS_MUX(6, 39, 164);
1219IRQC_PINS_MUX(7, 40, 167);
1220IRQC_PINS_MUX(8, 41, 168);
1221IRQC_PINS_MUX(9, 42, 169);
1222IRQC_PIN_MUX(10, 65);
1223IRQC_PIN_MUX(11, 67);
1224IRQC_PINS_MUX(12, 80, 137);
1225IRQC_PINS_MUX(13, 81, 145);
1226IRQC_PINS_MUX(14, 82, 146);
1227IRQC_PINS_MUX(15, 83, 147);
1228IRQC_PINS_MUX(16, 84, 170);
1229IRQC_PIN_MUX(17, 85);
1230IRQC_PIN_MUX(18, 86);
1231IRQC_PIN_MUX(19, 87);
1232IRQC_PIN_MUX(20, 92);
1233IRQC_PIN_MUX(21, 93);
1234IRQC_PIN_MUX(22, 94);
1235IRQC_PIN_MUX(23, 95);
1236IRQC_PIN_MUX(24, 112);
1237IRQC_PIN_MUX(25, 119);
1238IRQC_PINS_MUX(26, 121, 172);
1239IRQC_PINS_MUX(27, 122, 180);
1240IRQC_PINS_MUX(28, 123, 181);
1241IRQC_PINS_MUX(29, 129, 182);
1242IRQC_PINS_MUX(30, 130, 183);
1243IRQC_PINS_MUX(31, 138, 184);
1189/* - MMCIF ------------------------------------------------------------------ */ 1244/* - MMCIF ------------------------------------------------------------------ */
1190static const unsigned int mmc0_data1_0_pins[] = { 1245static const unsigned int mmc0_data1_0_pins[] = {
1191 /* D[0] */ 1246 /* D[0] */
@@ -1361,6 +1416,57 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
1361 SH_PFC_PIN_GROUP(fsia_spdif_1), 1416 SH_PFC_PIN_GROUP(fsia_spdif_1),
1362 SH_PFC_PIN_GROUP(fsib_mclk_in), 1417 SH_PFC_PIN_GROUP(fsib_mclk_in),
1363 SH_PFC_PIN_GROUP(hdmi), 1418 SH_PFC_PIN_GROUP(hdmi),
1419 SH_PFC_PIN_GROUP(intc_irq0_0),
1420 SH_PFC_PIN_GROUP(intc_irq0_1),
1421 SH_PFC_PIN_GROUP(intc_irq1),
1422 SH_PFC_PIN_GROUP(intc_irq2_0),
1423 SH_PFC_PIN_GROUP(intc_irq2_1),
1424 SH_PFC_PIN_GROUP(intc_irq3_0),
1425 SH_PFC_PIN_GROUP(intc_irq3_1),
1426 SH_PFC_PIN_GROUP(intc_irq4_0),
1427 SH_PFC_PIN_GROUP(intc_irq4_1),
1428 SH_PFC_PIN_GROUP(intc_irq5),
1429 SH_PFC_PIN_GROUP(intc_irq6_0),
1430 SH_PFC_PIN_GROUP(intc_irq6_1),
1431 SH_PFC_PIN_GROUP(intc_irq7_0),
1432 SH_PFC_PIN_GROUP(intc_irq7_1),
1433 SH_PFC_PIN_GROUP(intc_irq8_0),
1434 SH_PFC_PIN_GROUP(intc_irq8_1),
1435 SH_PFC_PIN_GROUP(intc_irq9_0),
1436 SH_PFC_PIN_GROUP(intc_irq9_1),
1437 SH_PFC_PIN_GROUP(intc_irq10),
1438 SH_PFC_PIN_GROUP(intc_irq11),
1439 SH_PFC_PIN_GROUP(intc_irq12_0),
1440 SH_PFC_PIN_GROUP(intc_irq12_1),
1441 SH_PFC_PIN_GROUP(intc_irq13_0),
1442 SH_PFC_PIN_GROUP(intc_irq13_1),
1443 SH_PFC_PIN_GROUP(intc_irq14_0),
1444 SH_PFC_PIN_GROUP(intc_irq14_1),
1445 SH_PFC_PIN_GROUP(intc_irq15_0),
1446 SH_PFC_PIN_GROUP(intc_irq15_1),
1447 SH_PFC_PIN_GROUP(intc_irq16_0),
1448 SH_PFC_PIN_GROUP(intc_irq16_1),
1449 SH_PFC_PIN_GROUP(intc_irq17),
1450 SH_PFC_PIN_GROUP(intc_irq18),
1451 SH_PFC_PIN_GROUP(intc_irq19),
1452 SH_PFC_PIN_GROUP(intc_irq20),
1453 SH_PFC_PIN_GROUP(intc_irq21),
1454 SH_PFC_PIN_GROUP(intc_irq22),
1455 SH_PFC_PIN_GROUP(intc_irq23),
1456 SH_PFC_PIN_GROUP(intc_irq24),
1457 SH_PFC_PIN_GROUP(intc_irq25),
1458 SH_PFC_PIN_GROUP(intc_irq26_0),
1459 SH_PFC_PIN_GROUP(intc_irq26_1),
1460 SH_PFC_PIN_GROUP(intc_irq27_0),
1461 SH_PFC_PIN_GROUP(intc_irq27_1),
1462 SH_PFC_PIN_GROUP(intc_irq28_0),
1463 SH_PFC_PIN_GROUP(intc_irq28_1),
1464 SH_PFC_PIN_GROUP(intc_irq29_0),
1465 SH_PFC_PIN_GROUP(intc_irq29_1),
1466 SH_PFC_PIN_GROUP(intc_irq30_0),
1467 SH_PFC_PIN_GROUP(intc_irq30_1),
1468 SH_PFC_PIN_GROUP(intc_irq31_0),
1469 SH_PFC_PIN_GROUP(intc_irq31_1),
1364 SH_PFC_PIN_GROUP(mmc0_data1_0), 1470 SH_PFC_PIN_GROUP(mmc0_data1_0),
1365 SH_PFC_PIN_GROUP(mmc0_data4_0), 1471 SH_PFC_PIN_GROUP(mmc0_data4_0),
1366 SH_PFC_PIN_GROUP(mmc0_data8_0), 1472 SH_PFC_PIN_GROUP(mmc0_data8_0),
@@ -1433,6 +1539,60 @@ static const char * const hdmi_groups[] = {
1433 "hdmi", 1539 "hdmi",
1434}; 1540};
1435 1541
1542static const char * const intc_groups[] = {
1543 "intc_irq0_0",
1544 "intc_irq0_1",
1545 "intc_irq1",
1546 "intc_irq2_0",
1547 "intc_irq2_1",
1548 "intc_irq3_0",
1549 "intc_irq3_1",
1550 "intc_irq4_0",
1551 "intc_irq4_1",
1552 "intc_irq5",
1553 "intc_irq6_0",
1554 "intc_irq6_1",
1555 "intc_irq7_0",
1556 "intc_irq7_1",
1557 "intc_irq8_0",
1558 "intc_irq8_1",
1559 "intc_irq9_0",
1560 "intc_irq9_1",
1561 "intc_irq10",
1562 "intc_irq11",
1563 "intc_irq12_0",
1564 "intc_irq12_1",
1565 "intc_irq13_0",
1566 "intc_irq13_1",
1567 "intc_irq14_0",
1568 "intc_irq14_1",
1569 "intc_irq15_0",
1570 "intc_irq15_1",
1571 "intc_irq16_0",
1572 "intc_irq16_1",
1573 "intc_irq17",
1574 "intc_irq18",
1575 "intc_irq19",
1576 "intc_irq20",
1577 "intc_irq21",
1578 "intc_irq22",
1579 "intc_irq23",
1580 "intc_irq24",
1581 "intc_irq25",
1582 "intc_irq26_0",
1583 "intc_irq26_1",
1584 "intc_irq27_0",
1585 "intc_irq27_1",
1586 "intc_irq28_0",
1587 "intc_irq28_1",
1588 "intc_irq29_0",
1589 "intc_irq29_1",
1590 "intc_irq30_0",
1591 "intc_irq30_1",
1592 "intc_irq31_0",
1593 "intc_irq31_1",
1594};
1595
1436static const char * const mmc0_groups[] = { 1596static const char * const mmc0_groups[] = {
1437 "mmc0_data1_0", 1597 "mmc0_data1_0",
1438 "mmc0_data4_0", 1598 "mmc0_data4_0",
@@ -1471,6 +1631,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
1471 SH_PFC_FUNCTION(fsia), 1631 SH_PFC_FUNCTION(fsia),
1472 SH_PFC_FUNCTION(fsib), 1632 SH_PFC_FUNCTION(fsib),
1473 SH_PFC_FUNCTION(hdmi), 1633 SH_PFC_FUNCTION(hdmi),
1634 SH_PFC_FUNCTION(intc),
1474 SH_PFC_FUNCTION(mmc0), 1635 SH_PFC_FUNCTION(mmc0),
1475 SH_PFC_FUNCTION(sdhi0), 1636 SH_PFC_FUNCTION(sdhi0),
1476 SH_PFC_FUNCTION(sdhi1), 1637 SH_PFC_FUNCTION(sdhi1),
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-15 07:31:29 -0500