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authorGuennadi Liakhovetski <g.liakhovetski@gmx.de>2013-05-17 10:55:12 -0400
committerSimon Horman <horms+renesas@verge.net.au>2013-06-05 04:18:20 -0400
commit066f0d6eb7c057e8e797a3d74b30764ed21952a2 (patch)
treef2166f541f7b69cfee938e76ff6521786174ada7 /drivers/pinctrl/sh-pfc/pfc-r8a7790.c
parent3ef2a776d13826a6f574d0637e4be7ce7e3be676 (diff)
pinctrl: r8a7790: add pinmux data for MMCIF and SDHI interfaces
This patch adds pinmux groups and functions for the two MMCIF and four SDHI interfaces on r8a73a4 (APE6). Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'drivers/pinctrl/sh-pfc/pfc-r8a7790.c')
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-r8a7790.c294
1 files changed, 294 insertions, 0 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
index 933842277a14..85d77a417c0e 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
@@ -2372,6 +2372,220 @@ static const unsigned int tpu0_to3_mux[] = {
2372 TPU0TO3_MARK, 2372 TPU0TO3_MARK,
2373}; 2373};
2374 2374
2375/* - MMCIF ------------------------------------------------------------------ */
2376static const unsigned int mmc0_data1_pins[] = {
2377 /* D[0] */
2378 RCAR_GP_PIN(3, 18),
2379};
2380static const unsigned int mmc0_data1_mux[] = {
2381 MMC0_D0_MARK,
2382};
2383static const unsigned int mmc0_data4_pins[] = {
2384 /* D[0:3] */
2385 RCAR_GP_PIN(3, 18), RCAR_GP_PIN(3, 19),
2386 RCAR_GP_PIN(3, 20), RCAR_GP_PIN(3, 21),
2387};
2388static const unsigned int mmc0_data4_mux[] = {
2389 MMC0_D0_MARK, MMC0_D1_MARK, MMC0_D2_MARK, MMC0_D3_MARK,
2390};
2391static const unsigned int mmc0_data8_pins[] = {
2392 /* D[0:7] */
2393 RCAR_GP_PIN(3, 18), RCAR_GP_PIN(3, 19),
2394 RCAR_GP_PIN(3, 20), RCAR_GP_PIN(3, 21),
2395 RCAR_GP_PIN(3, 22), RCAR_GP_PIN(3, 23),
2396 RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7),
2397};
2398static const unsigned int mmc0_data8_mux[] = {
2399 MMC0_D0_MARK, MMC0_D1_MARK, MMC0_D2_MARK, MMC0_D3_MARK,
2400 MMC0_D4_MARK, MMC0_D5_MARK, MMC0_D6_MARK, MMC0_D7_MARK,
2401};
2402static const unsigned int mmc0_ctrl_pins[] = {
2403 /* CLK, CMD */
2404 RCAR_GP_PIN(3, 16), RCAR_GP_PIN(3, 17),
2405};
2406static const unsigned int mmc0_ctrl_mux[] = {
2407 MMC0_CLK_MARK, MMC0_CMD_MARK,
2408};
2409
2410static const unsigned int mmc1_data1_pins[] = {
2411 /* D[0] */
2412 RCAR_GP_PIN(3, 26),
2413};
2414static const unsigned int mmc1_data1_mux[] = {
2415 MMC1_D0_MARK,
2416};
2417static const unsigned int mmc1_data4_pins[] = {
2418 /* D[0:3] */
2419 RCAR_GP_PIN(3, 26), RCAR_GP_PIN(3, 27),
2420 RCAR_GP_PIN(3, 28), RCAR_GP_PIN(3, 29),
2421};
2422static const unsigned int mmc1_data4_mux[] = {
2423 MMC1_D0_MARK, MMC1_D1_MARK, MMC1_D2_MARK, MMC1_D3_MARK,
2424};
2425static const unsigned int mmc1_data8_pins[] = {
2426 /* D[0:7] */
2427 RCAR_GP_PIN(3, 26), RCAR_GP_PIN(3, 27),
2428 RCAR_GP_PIN(3, 28), RCAR_GP_PIN(3, 29),
2429 RCAR_GP_PIN(3, 30), RCAR_GP_PIN(3, 31),
2430 RCAR_GP_PIN(3, 13), RCAR_GP_PIN(3, 14),
2431};
2432static const unsigned int mmc1_data8_mux[] = {
2433 MMC1_D0_MARK, MMC1_D1_MARK, MMC1_D2_MARK, MMC1_D3_MARK,
2434 MMC1_D4_MARK, MMC1_D5_MARK, MMC1_D6_MARK, MMC1_D7_MARK,
2435};
2436static const unsigned int mmc1_ctrl_pins[] = {
2437 /* CLK, CMD */
2438 RCAR_GP_PIN(3, 24), RCAR_GP_PIN(3, 25),
2439};
2440static const unsigned int mmc1_ctrl_mux[] = {
2441 MMC1_CLK_MARK, MMC1_CMD_MARK,
2442};
2443
2444/* - SDHI ------------------------------------------------------------------- */
2445static const unsigned int sdhi0_data1_pins[] = {
2446 /* D0 */
2447 RCAR_GP_PIN(3, 2),
2448};
2449static const unsigned int sdhi0_data1_mux[] = {
2450 SD0_DAT0_MARK,
2451};
2452static const unsigned int sdhi0_data4_pins[] = {
2453 /* D[0:3] */
2454 RCAR_GP_PIN(3, 2), RCAR_GP_PIN(3, 3), RCAR_GP_PIN(3, 4), RCAR_GP_PIN(3, 5),
2455};
2456static const unsigned int sdhi0_data4_mux[] = {
2457 SD0_DAT0_MARK, SD0_DAT1_MARK, SD0_DAT2_MARK, SD0_DAT3_MARK,
2458};
2459static const unsigned int sdhi0_ctrl_pins[] = {
2460 /* CLK, CMD */
2461 RCAR_GP_PIN(3, 0), RCAR_GP_PIN(3, 1),
2462};
2463static const unsigned int sdhi0_ctrl_mux[] = {
2464 SD0_CLK_MARK, SD0_CMD_MARK,
2465};
2466static const unsigned int sdhi0_cd_pins[] = {
2467 /* CD */
2468 RCAR_GP_PIN(3, 6),
2469};
2470static const unsigned int sdhi0_cd_mux[] = {
2471 SD0_CD_MARK,
2472};
2473static const unsigned int sdhi0_wp_pins[] = {
2474 /* WP */
2475 RCAR_GP_PIN(3, 7),
2476};
2477static const unsigned int sdhi0_wp_mux[] = {
2478 SD0_WP_MARK,
2479};
2480
2481static const unsigned int sdhi1_data1_pins[] = {
2482 /* D0 */
2483 RCAR_GP_PIN(3, 10),
2484};
2485static const unsigned int sdhi1_data1_mux[] = {
2486 SD1_DAT0_MARK,
2487};
2488static const unsigned int sdhi1_data4_pins[] = {
2489 /* D[0:3] */
2490 RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 11), RCAR_GP_PIN(3, 12), RCAR_GP_PIN(3, 13),
2491};
2492static const unsigned int sdhi1_data4_mux[] = {
2493 SD1_DAT0_MARK, SD1_DAT1_MARK, SD1_DAT2_MARK, SD1_DAT3_MARK,
2494};
2495static const unsigned int sdhi1_ctrl_pins[] = {
2496 /* CLK, CMD */
2497 RCAR_GP_PIN(3, 8), RCAR_GP_PIN(3, 9),
2498};
2499static const unsigned int sdhi1_ctrl_mux[] = {
2500 SD1_CLK_MARK, SD1_CMD_MARK,
2501};
2502static const unsigned int sdhi1_cd_pins[] = {
2503 /* CD */
2504 RCAR_GP_PIN(3, 14),
2505};
2506static const unsigned int sdhi1_cd_mux[] = {
2507 SD1_CD_MARK,
2508};
2509static const unsigned int sdhi1_wp_pins[] = {
2510 /* WP */
2511 RCAR_GP_PIN(3, 15),
2512};
2513static const unsigned int sdhi1_wp_mux[] = {
2514 SD1_WP_MARK,
2515};
2516
2517static const unsigned int sdhi2_data1_pins[] = {
2518 /* D0 */
2519 RCAR_GP_PIN(3, 18),
2520};
2521static const unsigned int sdhi2_data1_mux[] = {
2522 SD2_DAT0_MARK,
2523};
2524static const unsigned int sdhi2_data4_pins[] = {
2525 /* D[0:3] */
2526 RCAR_GP_PIN(3, 18), RCAR_GP_PIN(3, 19), RCAR_GP_PIN(3, 20), RCAR_GP_PIN(3, 21),
2527};
2528static const unsigned int sdhi2_data4_mux[] = {
2529 SD2_DAT0_MARK, SD2_DAT1_MARK, SD2_DAT2_MARK, SD2_DAT3_MARK,
2530};
2531static const unsigned int sdhi2_ctrl_pins[] = {
2532 /* CLK, CMD */
2533 RCAR_GP_PIN(3, 16), RCAR_GP_PIN(3, 17),
2534};
2535static const unsigned int sdhi2_ctrl_mux[] = {
2536 SD2_CLK_MARK, SD2_CMD_MARK,
2537};
2538static const unsigned int sdhi2_cd_pins[] = {
2539 /* CD */
2540 RCAR_GP_PIN(3, 22),
2541};
2542static const unsigned int sdhi2_cd_mux[] = {
2543 SD2_CD_MARK,
2544};
2545static const unsigned int sdhi2_wp_pins[] = {
2546 /* WP */
2547 RCAR_GP_PIN(3, 23),
2548};
2549static const unsigned int sdhi2_wp_mux[] = {
2550 SD2_WP_MARK,
2551};
2552
2553static const unsigned int sdhi3_data1_pins[] = {
2554 /* D0 */
2555 RCAR_GP_PIN(3, 26),
2556};
2557static const unsigned int sdhi3_data1_mux[] = {
2558 SD3_DAT0_MARK,
2559};
2560static const unsigned int sdhi3_data4_pins[] = {
2561 /* D[0:3] */
2562 RCAR_GP_PIN(3, 26), RCAR_GP_PIN(3, 27), RCAR_GP_PIN(3, 28), RCAR_GP_PIN(3, 29),
2563};
2564static const unsigned int sdhi3_data4_mux[] = {
2565 SD3_DAT0_MARK, SD3_DAT1_MARK, SD3_DAT2_MARK, SD3_DAT3_MARK,
2566};
2567static const unsigned int sdhi3_ctrl_pins[] = {
2568 /* CLK, CMD */
2569 RCAR_GP_PIN(3, 24), RCAR_GP_PIN(3, 25),
2570};
2571static const unsigned int sdhi3_ctrl_mux[] = {
2572 SD3_CLK_MARK, SD3_CMD_MARK,
2573};
2574static const unsigned int sdhi3_cd_pins[] = {
2575 /* CD */
2576 RCAR_GP_PIN(3, 30),
2577};
2578static const unsigned int sdhi3_cd_mux[] = {
2579 SD3_CD_MARK,
2580};
2581static const unsigned int sdhi3_wp_pins[] = {
2582 /* WP */
2583 RCAR_GP_PIN(3, 31),
2584};
2585static const unsigned int sdhi3_wp_mux[] = {
2586 SD3_WP_MARK,
2587};
2588
2375static const struct sh_pfc_pin_group pinmux_groups[] = { 2589static const struct sh_pfc_pin_group pinmux_groups[] = {
2376 SH_PFC_PIN_GROUP(eth_link), 2590 SH_PFC_PIN_GROUP(eth_link),
2377 SH_PFC_PIN_GROUP(eth_magic), 2591 SH_PFC_PIN_GROUP(eth_magic),
@@ -2449,6 +2663,34 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
2449 SH_PFC_PIN_GROUP(tpu0_to1), 2663 SH_PFC_PIN_GROUP(tpu0_to1),
2450 SH_PFC_PIN_GROUP(tpu0_to2), 2664 SH_PFC_PIN_GROUP(tpu0_to2),
2451 SH_PFC_PIN_GROUP(tpu0_to3), 2665 SH_PFC_PIN_GROUP(tpu0_to3),
2666 SH_PFC_PIN_GROUP(mmc0_data1),
2667 SH_PFC_PIN_GROUP(mmc0_data4),
2668 SH_PFC_PIN_GROUP(mmc0_data8),
2669 SH_PFC_PIN_GROUP(mmc0_ctrl),
2670 SH_PFC_PIN_GROUP(mmc1_data1),
2671 SH_PFC_PIN_GROUP(mmc1_data4),
2672 SH_PFC_PIN_GROUP(mmc1_data8),
2673 SH_PFC_PIN_GROUP(mmc1_ctrl),
2674 SH_PFC_PIN_GROUP(sdhi0_data1),
2675 SH_PFC_PIN_GROUP(sdhi0_data4),
2676 SH_PFC_PIN_GROUP(sdhi0_ctrl),
2677 SH_PFC_PIN_GROUP(sdhi0_cd),
2678 SH_PFC_PIN_GROUP(sdhi0_wp),
2679 SH_PFC_PIN_GROUP(sdhi1_data1),
2680 SH_PFC_PIN_GROUP(sdhi1_data4),
2681 SH_PFC_PIN_GROUP(sdhi1_ctrl),
2682 SH_PFC_PIN_GROUP(sdhi1_cd),
2683 SH_PFC_PIN_GROUP(sdhi1_wp),
2684 SH_PFC_PIN_GROUP(sdhi2_data1),
2685 SH_PFC_PIN_GROUP(sdhi2_data4),
2686 SH_PFC_PIN_GROUP(sdhi2_ctrl),
2687 SH_PFC_PIN_GROUP(sdhi2_cd),
2688 SH_PFC_PIN_GROUP(sdhi2_wp),
2689 SH_PFC_PIN_GROUP(sdhi3_data1),
2690 SH_PFC_PIN_GROUP(sdhi3_data4),
2691 SH_PFC_PIN_GROUP(sdhi3_ctrl),
2692 SH_PFC_PIN_GROUP(sdhi3_cd),
2693 SH_PFC_PIN_GROUP(sdhi3_wp),
2452}; 2694};
2453 2695
2454static const char * const eth_groups[] = { 2696static const char * const eth_groups[] = {
@@ -2560,6 +2802,52 @@ static const char * const tpu0_groups[] = {
2560 "tpu0_to3", 2802 "tpu0_to3",
2561}; 2803};
2562 2804
2805static const char * const mmc0_groups[] = {
2806 "mmc0_data1",
2807 "mmc0_data4",
2808 "mmc0_data8",
2809 "mmc0_ctrl",
2810};
2811
2812static const char * const mmc1_groups[] = {
2813 "mmc1_data1",
2814 "mmc1_data4",
2815 "mmc1_data8",
2816 "mmc1_ctrl",
2817};
2818
2819static const char * const sdhi0_groups[] = {
2820 "sdhi0_data1",
2821 "sdhi0_data4",
2822 "sdhi0_ctrl",
2823 "sdhi0_cd",
2824 "sdhi0_wp",
2825};
2826
2827static const char * const sdhi1_groups[] = {
2828 "sdhi1_data1",
2829 "sdhi1_data4",
2830 "sdhi1_ctrl",
2831 "sdhi1_cd",
2832 "sdhi1_wp",
2833};
2834
2835static const char * const sdhi2_groups[] = {
2836 "sdhi2_data1",
2837 "sdhi2_data4",
2838 "sdhi2_ctrl",
2839 "sdhi2_cd",
2840 "sdhi2_wp",
2841};
2842
2843static const char * const sdhi3_groups[] = {
2844 "sdhi3_data1",
2845 "sdhi3_data4",
2846 "sdhi3_ctrl",
2847 "sdhi3_cd",
2848 "sdhi3_wp",
2849};
2850
2563static const struct sh_pfc_function pinmux_functions[] = { 2851static const struct sh_pfc_function pinmux_functions[] = {
2564 SH_PFC_FUNCTION(eth), 2852 SH_PFC_FUNCTION(eth),
2565 SH_PFC_FUNCTION(intc), 2853 SH_PFC_FUNCTION(intc),
@@ -2572,6 +2860,12 @@ static const struct sh_pfc_function pinmux_functions[] = {
2572 SH_PFC_FUNCTION(scifb1), 2860 SH_PFC_FUNCTION(scifb1),
2573 SH_PFC_FUNCTION(scifb2), 2861 SH_PFC_FUNCTION(scifb2),
2574 SH_PFC_FUNCTION(tpu0), 2862 SH_PFC_FUNCTION(tpu0),
2863 SH_PFC_FUNCTION(mmc0),
2864 SH_PFC_FUNCTION(mmc1),
2865 SH_PFC_FUNCTION(sdhi0),
2866 SH_PFC_FUNCTION(sdhi1),
2867 SH_PFC_FUNCTION(sdhi2),
2868 SH_PFC_FUNCTION(sdhi3),
2575}; 2869};
2576 2870
2577static struct pinmux_cfg_reg pinmux_config_regs[] = { 2871static struct pinmux_cfg_reg pinmux_config_regs[] = {
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-15 04:26:08 -0400