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authorMaxime Ripard <maxime.ripard@free-electrons.com>2013-01-26 09:36:53 -0500
committerLinus Walleij <linus.walleij@linaro.org>2013-02-01 04:45:34 -0500
commit9f5b6b30f985bae6e0ad7c5a707a4e781957e773 (patch)
treef1081f1897b9a6bc65ba33a87bb2d1e165147ba7 /drivers/pinctrl/pinctrl-sunxi.c
parentae1575f71152627f0d443853c42319b2f1404eb9 (diff)
ARM: pinctrl: sunxi: Add the pinctrl pin set for Allwinner A10
Since the Allwinner SoCs variants don't have the same set of pins to handle, we need to declare the pin ranges available. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/pinctrl-sunxi.c')
-rw-r--r--drivers/pinctrl/pinctrl-sunxi.c554
1 files changed, 554 insertions, 0 deletions
diff --git a/drivers/pinctrl/pinctrl-sunxi.c b/drivers/pinctrl/pinctrl-sunxi.c
index cb3d2300082c..e4d32c67dcbb 100644
--- a/drivers/pinctrl/pinctrl-sunxi.c
+++ b/drivers/pinctrl/pinctrl-sunxi.c
@@ -27,6 +27,554 @@
27#include "core.h" 27#include "core.h"
28#include "pinctrl-sunxi.h" 28#include "pinctrl-sunxi.h"
29 29
30static const struct sunxi_desc_pin sun4i_a10_pins[] = {
31 SUNXI_PIN(SUNXI_PINCTRL_PIN_PA0,
32 SUNXI_FUNCTION(0x0, "gpio_in"),
33 SUNXI_FUNCTION(0x1, "gpio_out")),
34 SUNXI_PIN(SUNXI_PINCTRL_PIN_PA1,
35 SUNXI_FUNCTION(0x0, "gpio_in"),
36 SUNXI_FUNCTION(0x1, "gpio_out")),
37 SUNXI_PIN(SUNXI_PINCTRL_PIN_PA2,
38 SUNXI_FUNCTION(0x0, "gpio_in"),
39 SUNXI_FUNCTION(0x1, "gpio_out")),
40 SUNXI_PIN(SUNXI_PINCTRL_PIN_PA3,
41 SUNXI_FUNCTION(0x0, "gpio_in"),
42 SUNXI_FUNCTION(0x1, "gpio_out")),
43 SUNXI_PIN(SUNXI_PINCTRL_PIN_PA4,
44 SUNXI_FUNCTION(0x0, "gpio_in"),
45 SUNXI_FUNCTION(0x1, "gpio_out")),
46 SUNXI_PIN(SUNXI_PINCTRL_PIN_PA5,
47 SUNXI_FUNCTION(0x0, "gpio_in"),
48 SUNXI_FUNCTION(0x1, "gpio_out")),
49 SUNXI_PIN(SUNXI_PINCTRL_PIN_PA6,
50 SUNXI_FUNCTION(0x0, "gpio_in"),
51 SUNXI_FUNCTION(0x1, "gpio_out")),
52 SUNXI_PIN(SUNXI_PINCTRL_PIN_PA7,
53 SUNXI_FUNCTION(0x0, "gpio_in"),
54 SUNXI_FUNCTION(0x1, "gpio_out")),
55 SUNXI_PIN(SUNXI_PINCTRL_PIN_PA8,
56 SUNXI_FUNCTION(0x0, "gpio_in"),
57 SUNXI_FUNCTION(0x1, "gpio_out")),
58 SUNXI_PIN(SUNXI_PINCTRL_PIN_PA9,
59 SUNXI_FUNCTION(0x0, "gpio_in"),
60 SUNXI_FUNCTION(0x1, "gpio_out")),
61 SUNXI_PIN(SUNXI_PINCTRL_PIN_PA10,
62 SUNXI_FUNCTION(0x0, "gpio_in"),
63 SUNXI_FUNCTION(0x1, "gpio_out"),
64 SUNXI_FUNCTION(0x4, "uart1")), /* TX */
65 SUNXI_PIN(SUNXI_PINCTRL_PIN_PA11,
66 SUNXI_FUNCTION(0x0, "gpio_in"),
67 SUNXI_FUNCTION(0x1, "gpio_out"),
68 SUNXI_FUNCTION(0x4, "uart1")), /* RX */
69 SUNXI_PIN(SUNXI_PINCTRL_PIN_PA12,
70 SUNXI_FUNCTION(0x0, "gpio_in"),
71 SUNXI_FUNCTION(0x1, "gpio_out"),
72 SUNXI_FUNCTION(0x4, "uart1")), /* RTS */
73 SUNXI_PIN(SUNXI_PINCTRL_PIN_PA13,
74 SUNXI_FUNCTION(0x0, "gpio_in"),
75 SUNXI_FUNCTION(0x1, "gpio_out"),
76 SUNXI_FUNCTION(0x4, "uart1")), /* CTS */
77 SUNXI_PIN(SUNXI_PINCTRL_PIN_PA14,
78 SUNXI_FUNCTION(0x0, "gpio_in"),
79 SUNXI_FUNCTION(0x1, "gpio_out"),
80 SUNXI_FUNCTION(0x4, "uart1")), /* DTR */
81 SUNXI_PIN(SUNXI_PINCTRL_PIN_PA15,
82 SUNXI_FUNCTION(0x0, "gpio_in"),
83 SUNXI_FUNCTION(0x1, "gpio_out"),
84 SUNXI_FUNCTION(0x4, "uart1")), /* DSR */
85 SUNXI_PIN(SUNXI_PINCTRL_PIN_PA16,
86 SUNXI_FUNCTION(0x0, "gpio_in"),
87 SUNXI_FUNCTION(0x1, "gpio_out"),
88 SUNXI_FUNCTION(0x4, "uart1")), /* DCD */
89 SUNXI_PIN(SUNXI_PINCTRL_PIN_PA17,
90 SUNXI_FUNCTION(0x0, "gpio_in"),
91 SUNXI_FUNCTION(0x1, "gpio_out"),
92 SUNXI_FUNCTION(0x4, "uart1")), /* RING */
93 /* Hole */
94 SUNXI_PIN(SUNXI_PINCTRL_PIN_PB0,
95 SUNXI_FUNCTION(0x0, "gpio_in"),
96 SUNXI_FUNCTION(0x1, "gpio_out")),
97 SUNXI_PIN(SUNXI_PINCTRL_PIN_PB1,
98 SUNXI_FUNCTION(0x0, "gpio_in"),
99 SUNXI_FUNCTION(0x1, "gpio_out")),
100 SUNXI_PIN(SUNXI_PINCTRL_PIN_PB2,
101 SUNXI_FUNCTION(0x0, "gpio_in"),
102 SUNXI_FUNCTION(0x1, "gpio_out")),
103 SUNXI_PIN(SUNXI_PINCTRL_PIN_PB3,
104 SUNXI_FUNCTION(0x0, "gpio_in"),
105 SUNXI_FUNCTION(0x1, "gpio_out")),
106 SUNXI_PIN(SUNXI_PINCTRL_PIN_PB4,
107 SUNXI_FUNCTION(0x0, "gpio_in"),
108 SUNXI_FUNCTION(0x1, "gpio_out")),
109 SUNXI_PIN(SUNXI_PINCTRL_PIN_PB5,
110 SUNXI_FUNCTION(0x0, "gpio_in"),
111 SUNXI_FUNCTION(0x1, "gpio_out")),
112 SUNXI_PIN(SUNXI_PINCTRL_PIN_PB6,
113 SUNXI_FUNCTION(0x0, "gpio_in"),
114 SUNXI_FUNCTION(0x1, "gpio_out")),
115 SUNXI_PIN(SUNXI_PINCTRL_PIN_PB7,
116 SUNXI_FUNCTION(0x0, "gpio_in"),
117 SUNXI_FUNCTION(0x1, "gpio_out")),
118 SUNXI_PIN(SUNXI_PINCTRL_PIN_PB8,
119 SUNXI_FUNCTION(0x0, "gpio_in"),
120 SUNXI_FUNCTION(0x1, "gpio_out")),
121 SUNXI_PIN(SUNXI_PINCTRL_PIN_PB9,
122 SUNXI_FUNCTION(0x0, "gpio_in"),
123 SUNXI_FUNCTION(0x1, "gpio_out")),
124 SUNXI_PIN(SUNXI_PINCTRL_PIN_PB10,
125 SUNXI_FUNCTION(0x0, "gpio_in"),
126 SUNXI_FUNCTION(0x1, "gpio_out")),
127 SUNXI_PIN(SUNXI_PINCTRL_PIN_PB11,
128 SUNXI_FUNCTION(0x0, "gpio_in"),
129 SUNXI_FUNCTION(0x1, "gpio_out")),
130 SUNXI_PIN(SUNXI_PINCTRL_PIN_PB12,
131 SUNXI_FUNCTION(0x0, "gpio_in"),
132 SUNXI_FUNCTION(0x1, "gpio_out")),
133 SUNXI_PIN(SUNXI_PINCTRL_PIN_PB13,
134 SUNXI_FUNCTION(0x0, "gpio_in"),
135 SUNXI_FUNCTION(0x1, "gpio_out")),
136 SUNXI_PIN(SUNXI_PINCTRL_PIN_PB14,
137 SUNXI_FUNCTION(0x0, "gpio_in"),
138 SUNXI_FUNCTION(0x1, "gpio_out")),
139 SUNXI_PIN(SUNXI_PINCTRL_PIN_PB15,
140 SUNXI_FUNCTION(0x0, "gpio_in"),
141 SUNXI_FUNCTION(0x1, "gpio_out")),
142 SUNXI_PIN(SUNXI_PINCTRL_PIN_PB16,
143 SUNXI_FUNCTION(0x0, "gpio_in"),
144 SUNXI_FUNCTION(0x1, "gpio_out")),
145 SUNXI_PIN(SUNXI_PINCTRL_PIN_PB17,
146 SUNXI_FUNCTION(0x0, "gpio_in"),
147 SUNXI_FUNCTION(0x1, "gpio_out")),
148 SUNXI_PIN(SUNXI_PINCTRL_PIN_PB18,
149 SUNXI_FUNCTION(0x0, "gpio_in"),
150 SUNXI_FUNCTION(0x1, "gpio_out")),
151 SUNXI_PIN(SUNXI_PINCTRL_PIN_PB19,
152 SUNXI_FUNCTION(0x0, "gpio_in"),
153 SUNXI_FUNCTION(0x1, "gpio_out")),
154 SUNXI_PIN(SUNXI_PINCTRL_PIN_PB20,
155 SUNXI_FUNCTION(0x0, "gpio_in"),
156 SUNXI_FUNCTION(0x1, "gpio_out")),
157 SUNXI_PIN(SUNXI_PINCTRL_PIN_PB21,
158 SUNXI_FUNCTION(0x0, "gpio_in"),
159 SUNXI_FUNCTION(0x1, "gpio_out")),
160 SUNXI_PIN(SUNXI_PINCTRL_PIN_PB22,
161 SUNXI_FUNCTION(0x0, "gpio_in"),
162 SUNXI_FUNCTION(0x1, "gpio_out"),
163 SUNXI_FUNCTION(0x2, "uart0")), /* TX */
164 SUNXI_PIN(SUNXI_PINCTRL_PIN_PB23,
165 SUNXI_FUNCTION(0x0, "gpio_in"),
166 SUNXI_FUNCTION(0x1, "gpio_out"),
167 SUNXI_FUNCTION(0x2, "uart0")), /* RX */
168 /* Hole */
169 SUNXI_PIN(SUNXI_PINCTRL_PIN_PC0,
170 SUNXI_FUNCTION(0x0, "gpio_in"),
171 SUNXI_FUNCTION(0x1, "gpio_out")),
172 SUNXI_PIN(SUNXI_PINCTRL_PIN_PC1,
173 SUNXI_FUNCTION(0x0, "gpio_in"),
174 SUNXI_FUNCTION(0x1, "gpio_out")),
175 SUNXI_PIN(SUNXI_PINCTRL_PIN_PC2,
176 SUNXI_FUNCTION(0x0, "gpio_in"),
177 SUNXI_FUNCTION(0x1, "gpio_out")),
178 SUNXI_PIN(SUNXI_PINCTRL_PIN_PC3,
179 SUNXI_FUNCTION(0x0, "gpio_in"),
180 SUNXI_FUNCTION(0x1, "gpio_out")),
181 SUNXI_PIN(SUNXI_PINCTRL_PIN_PC4,
182 SUNXI_FUNCTION(0x0, "gpio_in"),
183 SUNXI_FUNCTION(0x1, "gpio_out")),
184 SUNXI_PIN(SUNXI_PINCTRL_PIN_PC5,
185 SUNXI_FUNCTION(0x0, "gpio_in"),
186 SUNXI_FUNCTION(0x1, "gpio_out")),
187 SUNXI_PIN(SUNXI_PINCTRL_PIN_PC6,
188 SUNXI_FUNCTION(0x0, "gpio_in"),
189 SUNXI_FUNCTION(0x1, "gpio_out")),
190 SUNXI_PIN(SUNXI_PINCTRL_PIN_PC7,
191 SUNXI_FUNCTION(0x0, "gpio_in"),
192 SUNXI_FUNCTION(0x1, "gpio_out")),
193 SUNXI_PIN(SUNXI_PINCTRL_PIN_PC8,
194 SUNXI_FUNCTION(0x0, "gpio_in"),
195 SUNXI_FUNCTION(0x1, "gpio_out")),
196 SUNXI_PIN(SUNXI_PINCTRL_PIN_PC9,
197 SUNXI_FUNCTION(0x0, "gpio_in"),
198 SUNXI_FUNCTION(0x1, "gpio_out")),
199 SUNXI_PIN(SUNXI_PINCTRL_PIN_PC10,
200 SUNXI_FUNCTION(0x0, "gpio_in"),
201 SUNXI_FUNCTION(0x1, "gpio_out")),
202 SUNXI_PIN(SUNXI_PINCTRL_PIN_PC11,
203 SUNXI_FUNCTION(0x0, "gpio_in"),
204 SUNXI_FUNCTION(0x1, "gpio_out")),
205 SUNXI_PIN(SUNXI_PINCTRL_PIN_PC12,
206 SUNXI_FUNCTION(0x0, "gpio_in"),
207 SUNXI_FUNCTION(0x1, "gpio_out")),
208 SUNXI_PIN(SUNXI_PINCTRL_PIN_PC13,
209 SUNXI_FUNCTION(0x0, "gpio_in"),
210 SUNXI_FUNCTION(0x1, "gpio_out")),
211 SUNXI_PIN(SUNXI_PINCTRL_PIN_PC14,
212 SUNXI_FUNCTION(0x0, "gpio_in"),
213 SUNXI_FUNCTION(0x1, "gpio_out")),
214 SUNXI_PIN(SUNXI_PINCTRL_PIN_PC15,
215 SUNXI_FUNCTION(0x0, "gpio_in"),
216 SUNXI_FUNCTION(0x1, "gpio_out")),
217 SUNXI_PIN(SUNXI_PINCTRL_PIN_PC16,
218 SUNXI_FUNCTION(0x0, "gpio_in"),
219 SUNXI_FUNCTION(0x1, "gpio_out")),
220 SUNXI_PIN(SUNXI_PINCTRL_PIN_PC17,
221 SUNXI_FUNCTION(0x0, "gpio_in"),
222 SUNXI_FUNCTION(0x1, "gpio_out")),
223 SUNXI_PIN(SUNXI_PINCTRL_PIN_PC18,
224 SUNXI_FUNCTION(0x0, "gpio_in"),
225 SUNXI_FUNCTION(0x1, "gpio_out")),
226 SUNXI_PIN(SUNXI_PINCTRL_PIN_PC19,
227 SUNXI_FUNCTION(0x0, "gpio_in"),
228 SUNXI_FUNCTION(0x1, "gpio_out")),
229 SUNXI_PIN(SUNXI_PINCTRL_PIN_PC20,
230 SUNXI_FUNCTION(0x0, "gpio_in"),
231 SUNXI_FUNCTION(0x1, "gpio_out")),
232 SUNXI_PIN(SUNXI_PINCTRL_PIN_PC21,
233 SUNXI_FUNCTION(0x0, "gpio_in"),
234 SUNXI_FUNCTION(0x1, "gpio_out")),
235 SUNXI_PIN(SUNXI_PINCTRL_PIN_PC22,
236 SUNXI_FUNCTION(0x0, "gpio_in"),
237 SUNXI_FUNCTION(0x1, "gpio_out")),
238 SUNXI_PIN(SUNXI_PINCTRL_PIN_PC23,
239 SUNXI_FUNCTION(0x0, "gpio_in"),
240 SUNXI_FUNCTION(0x1, "gpio_out")),
241 SUNXI_PIN(SUNXI_PINCTRL_PIN_PC24,
242 SUNXI_FUNCTION(0x0, "gpio_in"),
243 SUNXI_FUNCTION(0x1, "gpio_out")),
244 /* Hole */
245 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD0,
246 SUNXI_FUNCTION(0x0, "gpio_in"),
247 SUNXI_FUNCTION(0x1, "gpio_out")),
248 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD1,
249 SUNXI_FUNCTION(0x0, "gpio_in"),
250 SUNXI_FUNCTION(0x1, "gpio_out")),
251 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD2,
252 SUNXI_FUNCTION(0x0, "gpio_in"),
253 SUNXI_FUNCTION(0x1, "gpio_out")),
254 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD3,
255 SUNXI_FUNCTION(0x0, "gpio_in"),
256 SUNXI_FUNCTION(0x1, "gpio_out")),
257 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD4,
258 SUNXI_FUNCTION(0x0, "gpio_in"),
259 SUNXI_FUNCTION(0x1, "gpio_out")),
260 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD5,
261 SUNXI_FUNCTION(0x0, "gpio_in"),
262 SUNXI_FUNCTION(0x1, "gpio_out")),
263 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD6,
264 SUNXI_FUNCTION(0x0, "gpio_in"),
265 SUNXI_FUNCTION(0x1, "gpio_out")),
266 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD7,
267 SUNXI_FUNCTION(0x0, "gpio_in"),
268 SUNXI_FUNCTION(0x1, "gpio_out")),
269 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD8,
270 SUNXI_FUNCTION(0x0, "gpio_in"),
271 SUNXI_FUNCTION(0x1, "gpio_out")),
272 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD9,
273 SUNXI_FUNCTION(0x0, "gpio_in"),
274 SUNXI_FUNCTION(0x1, "gpio_out")),
275 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD10,
276 SUNXI_FUNCTION(0x0, "gpio_in"),
277 SUNXI_FUNCTION(0x1, "gpio_out")),
278 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD11,
279 SUNXI_FUNCTION(0x0, "gpio_in"),
280 SUNXI_FUNCTION(0x1, "gpio_out")),
281 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD12,
282 SUNXI_FUNCTION(0x0, "gpio_in"),
283 SUNXI_FUNCTION(0x1, "gpio_out")),
284 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD13,
285 SUNXI_FUNCTION(0x0, "gpio_in"),
286 SUNXI_FUNCTION(0x1, "gpio_out")),
287 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD14,
288 SUNXI_FUNCTION(0x0, "gpio_in"),
289 SUNXI_FUNCTION(0x1, "gpio_out")),
290 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD15,
291 SUNXI_FUNCTION(0x0, "gpio_in"),
292 SUNXI_FUNCTION(0x1, "gpio_out")),
293 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD16,
294 SUNXI_FUNCTION(0x0, "gpio_in"),
295 SUNXI_FUNCTION(0x1, "gpio_out")),
296 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD17,
297 SUNXI_FUNCTION(0x0, "gpio_in"),
298 SUNXI_FUNCTION(0x1, "gpio_out")),
299 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD18,
300 SUNXI_FUNCTION(0x0, "gpio_in"),
301 SUNXI_FUNCTION(0x1, "gpio_out")),
302 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD19,
303 SUNXI_FUNCTION(0x0, "gpio_in"),
304 SUNXI_FUNCTION(0x1, "gpio_out")),
305 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD20,
306 SUNXI_FUNCTION(0x0, "gpio_in"),
307 SUNXI_FUNCTION(0x1, "gpio_out")),
308 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD21,
309 SUNXI_FUNCTION(0x0, "gpio_in"),
310 SUNXI_FUNCTION(0x1, "gpio_out")),
311 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD22,
312 SUNXI_FUNCTION(0x0, "gpio_in"),
313 SUNXI_FUNCTION(0x1, "gpio_out")),
314 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD23,
315 SUNXI_FUNCTION(0x0, "gpio_in"),
316 SUNXI_FUNCTION(0x1, "gpio_out")),
317 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD24,
318 SUNXI_FUNCTION(0x0, "gpio_in"),
319 SUNXI_FUNCTION(0x1, "gpio_out")),
320 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD25,
321 SUNXI_FUNCTION(0x0, "gpio_in"),
322 SUNXI_FUNCTION(0x1, "gpio_out")),
323 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD26,
324 SUNXI_FUNCTION(0x0, "gpio_in"),
325 SUNXI_FUNCTION(0x1, "gpio_out")),
326 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD27,
327 SUNXI_FUNCTION(0x0, "gpio_in"),
328 SUNXI_FUNCTION(0x1, "gpio_out")),
329 /* Hole */
330 SUNXI_PIN(SUNXI_PINCTRL_PIN_PE0,
331 SUNXI_FUNCTION(0x0, "gpio_in"),
332 SUNXI_FUNCTION(0x1, "gpio_out")),
333 SUNXI_PIN(SUNXI_PINCTRL_PIN_PE1,
334 SUNXI_FUNCTION(0x0, "gpio_in"),
335 SUNXI_FUNCTION(0x1, "gpio_out")),
336 SUNXI_PIN(SUNXI_PINCTRL_PIN_PE2,
337 SUNXI_FUNCTION(0x0, "gpio_in"),
338 SUNXI_FUNCTION(0x1, "gpio_out")),
339 SUNXI_PIN(SUNXI_PINCTRL_PIN_PE3,
340 SUNXI_FUNCTION(0x0, "gpio_in"),
341 SUNXI_FUNCTION(0x1, "gpio_out")),
342 SUNXI_PIN(SUNXI_PINCTRL_PIN_PE4,
343 SUNXI_FUNCTION(0x0, "gpio_in"),
344 SUNXI_FUNCTION(0x1, "gpio_out")),
345 SUNXI_PIN(SUNXI_PINCTRL_PIN_PE5,
346 SUNXI_FUNCTION(0x0, "gpio_in"),
347 SUNXI_FUNCTION(0x1, "gpio_out")),
348 SUNXI_PIN(SUNXI_PINCTRL_PIN_PE6,
349 SUNXI_FUNCTION(0x0, "gpio_in"),
350 SUNXI_FUNCTION(0x1, "gpio_out")),
351 SUNXI_PIN(SUNXI_PINCTRL_PIN_PE7,
352 SUNXI_FUNCTION(0x0, "gpio_in"),
353 SUNXI_FUNCTION(0x1, "gpio_out")),
354 SUNXI_PIN(SUNXI_PINCTRL_PIN_PE8,
355 SUNXI_FUNCTION(0x0, "gpio_in"),
356 SUNXI_FUNCTION(0x1, "gpio_out")),
357 SUNXI_PIN(SUNXI_PINCTRL_PIN_PE9,
358 SUNXI_FUNCTION(0x0, "gpio_in"),
359 SUNXI_FUNCTION(0x1, "gpio_out")),
360 SUNXI_PIN(SUNXI_PINCTRL_PIN_PE10,
361 SUNXI_FUNCTION(0x0, "gpio_in"),
362 SUNXI_FUNCTION(0x1, "gpio_out")),
363 SUNXI_PIN(SUNXI_PINCTRL_PIN_PE11,
364 SUNXI_FUNCTION(0x0, "gpio_in"),
365 SUNXI_FUNCTION(0x1, "gpio_out")),
366 /* Hole */
367 SUNXI_PIN(SUNXI_PINCTRL_PIN_PF0,
368 SUNXI_FUNCTION(0x0, "gpio_in"),
369 SUNXI_FUNCTION(0x1, "gpio_out")),
370 SUNXI_PIN(SUNXI_PINCTRL_PIN_PF1,
371 SUNXI_FUNCTION(0x0, "gpio_in"),
372 SUNXI_FUNCTION(0x1, "gpio_out")),
373 SUNXI_PIN(SUNXI_PINCTRL_PIN_PF2,
374 SUNXI_FUNCTION(0x0, "gpio_in"),
375 SUNXI_FUNCTION(0x1, "gpio_out"),
376 SUNXI_FUNCTION(0x4, "uart0")), /* TX */
377 SUNXI_PIN(SUNXI_PINCTRL_PIN_PF3,
378 SUNXI_FUNCTION(0x0, "gpio_in"),
379 SUNXI_FUNCTION(0x1, "gpio_out")),
380 SUNXI_PIN(SUNXI_PINCTRL_PIN_PF4,
381 SUNXI_FUNCTION(0x0, "gpio_in"),
382 SUNXI_FUNCTION(0x1, "gpio_out"),
383 SUNXI_FUNCTION(0x4, "uart0")), /* RX */
384 SUNXI_PIN(SUNXI_PINCTRL_PIN_PF5,
385 SUNXI_FUNCTION(0x0, "gpio_in"),
386 SUNXI_FUNCTION(0x1, "gpio_out")),
387 /* Hole */
388 SUNXI_PIN(SUNXI_PINCTRL_PIN_PG0,
389 SUNXI_FUNCTION(0x0, "gpio_in"),
390 SUNXI_FUNCTION(0x1, "gpio_out")),
391 SUNXI_PIN(SUNXI_PINCTRL_PIN_PG1,
392 SUNXI_FUNCTION(0x0, "gpio_in"),
393 SUNXI_FUNCTION(0x1, "gpio_out")),
394 SUNXI_PIN(SUNXI_PINCTRL_PIN_PG2,
395 SUNXI_FUNCTION(0x0, "gpio_in"),
396 SUNXI_FUNCTION(0x1, "gpio_out")),
397 SUNXI_PIN(SUNXI_PINCTRL_PIN_PG3,
398 SUNXI_FUNCTION(0x0, "gpio_in"),
399 SUNXI_FUNCTION(0x1, "gpio_out")),
400 SUNXI_PIN(SUNXI_PINCTRL_PIN_PG4,
401 SUNXI_FUNCTION(0x0, "gpio_in"),
402 SUNXI_FUNCTION(0x1, "gpio_out")),
403 SUNXI_PIN(SUNXI_PINCTRL_PIN_PG5,
404 SUNXI_FUNCTION(0x0, "gpio_in"),
405 SUNXI_FUNCTION(0x1, "gpio_out")),
406 SUNXI_PIN(SUNXI_PINCTRL_PIN_PG6,
407 SUNXI_FUNCTION(0x0, "gpio_in"),
408 SUNXI_FUNCTION(0x1, "gpio_out")),
409 SUNXI_PIN(SUNXI_PINCTRL_PIN_PG7,
410 SUNXI_FUNCTION(0x0, "gpio_in"),
411 SUNXI_FUNCTION(0x1, "gpio_out")),
412 SUNXI_PIN(SUNXI_PINCTRL_PIN_PG8,
413 SUNXI_FUNCTION(0x0, "gpio_in"),
414 SUNXI_FUNCTION(0x1, "gpio_out")),
415 SUNXI_PIN(SUNXI_PINCTRL_PIN_PG9,
416 SUNXI_FUNCTION(0x0, "gpio_in"),
417 SUNXI_FUNCTION(0x1, "gpio_out")),
418 SUNXI_PIN(SUNXI_PINCTRL_PIN_PG10,
419 SUNXI_FUNCTION(0x0, "gpio_in"),
420 SUNXI_FUNCTION(0x1, "gpio_out")),
421 SUNXI_PIN(SUNXI_PINCTRL_PIN_PG11,
422 SUNXI_FUNCTION(0x0, "gpio_in"),
423 SUNXI_FUNCTION(0x1, "gpio_out")),
424 /* Hole */
425 SUNXI_PIN(SUNXI_PINCTRL_PIN_PH0,
426 SUNXI_FUNCTION(0x0, "gpio_in"),
427 SUNXI_FUNCTION(0x1, "gpio_out")),
428 SUNXI_PIN(SUNXI_PINCTRL_PIN_PH1,
429 SUNXI_FUNCTION(0x0, "gpio_in"),
430 SUNXI_FUNCTION(0x1, "gpio_out")),
431 SUNXI_PIN(SUNXI_PINCTRL_PIN_PH2,
432 SUNXI_FUNCTION(0x0, "gpio_in"),
433 SUNXI_FUNCTION(0x1, "gpio_out")),
434 SUNXI_PIN(SUNXI_PINCTRL_PIN_PH3,
435 SUNXI_FUNCTION(0x0, "gpio_in"),
436 SUNXI_FUNCTION(0x1, "gpio_out")),
437 SUNXI_PIN(SUNXI_PINCTRL_PIN_PH4,
438 SUNXI_FUNCTION(0x0, "gpio_in"),
439 SUNXI_FUNCTION(0x1, "gpio_out")),
440 SUNXI_PIN(SUNXI_PINCTRL_PIN_PH5,
441 SUNXI_FUNCTION(0x0, "gpio_in"),
442 SUNXI_FUNCTION(0x1, "gpio_out")),
443 SUNXI_PIN(SUNXI_PINCTRL_PIN_PH6,
444 SUNXI_FUNCTION(0x0, "gpio_in"),
445 SUNXI_FUNCTION(0x1, "gpio_out")),
446 SUNXI_PIN(SUNXI_PINCTRL_PIN_PH7,
447 SUNXI_FUNCTION(0x0, "gpio_in"),
448 SUNXI_FUNCTION(0x1, "gpio_out")),
449 SUNXI_PIN(SUNXI_PINCTRL_PIN_PH8,
450 SUNXI_FUNCTION(0x0, "gpio_in"),
451 SUNXI_FUNCTION(0x1, "gpio_out")),
452 SUNXI_PIN(SUNXI_PINCTRL_PIN_PH9,
453 SUNXI_FUNCTION(0x0, "gpio_in"),
454 SUNXI_FUNCTION(0x1, "gpio_out")),
455 SUNXI_PIN(SUNXI_PINCTRL_PIN_PH10,
456 SUNXI_FUNCTION(0x0, "gpio_in"),
457 SUNXI_FUNCTION(0x1, "gpio_out")),
458 SUNXI_PIN(SUNXI_PINCTRL_PIN_PH11,
459 SUNXI_FUNCTION(0x0, "gpio_in"),
460 SUNXI_FUNCTION(0x1, "gpio_out")),
461 SUNXI_PIN(SUNXI_PINCTRL_PIN_PH12,
462 SUNXI_FUNCTION(0x0, "gpio_in"),
463 SUNXI_FUNCTION(0x1, "gpio_out")),
464 SUNXI_PIN(SUNXI_PINCTRL_PIN_PH13,
465 SUNXI_FUNCTION(0x0, "gpio_in"),
466 SUNXI_FUNCTION(0x1, "gpio_out")),
467 SUNXI_PIN(SUNXI_PINCTRL_PIN_PH14,
468 SUNXI_FUNCTION(0x0, "gpio_in"),
469 SUNXI_FUNCTION(0x1, "gpio_out")),
470 SUNXI_PIN(SUNXI_PINCTRL_PIN_PH15,
471 SUNXI_FUNCTION(0x0, "gpio_in"),
472 SUNXI_FUNCTION(0x1, "gpio_out")),
473 SUNXI_PIN(SUNXI_PINCTRL_PIN_PH16,
474 SUNXI_FUNCTION(0x0, "gpio_in"),
475 SUNXI_FUNCTION(0x1, "gpio_out")),
476 SUNXI_PIN(SUNXI_PINCTRL_PIN_PH17,
477 SUNXI_FUNCTION(0x0, "gpio_in"),
478 SUNXI_FUNCTION(0x1, "gpio_out")),
479 SUNXI_PIN(SUNXI_PINCTRL_PIN_PH18,
480 SUNXI_FUNCTION(0x0, "gpio_in"),
481 SUNXI_FUNCTION(0x1, "gpio_out")),
482 SUNXI_PIN(SUNXI_PINCTRL_PIN_PH19,
483 SUNXI_FUNCTION(0x0, "gpio_in"),
484 SUNXI_FUNCTION(0x1, "gpio_out")),
485 SUNXI_PIN(SUNXI_PINCTRL_PIN_PH20,
486 SUNXI_FUNCTION(0x0, "gpio_in"),
487 SUNXI_FUNCTION(0x1, "gpio_out")),
488 SUNXI_PIN(SUNXI_PINCTRL_PIN_PH21,
489 SUNXI_FUNCTION(0x0, "gpio_in"),
490 SUNXI_FUNCTION(0x1, "gpio_out")),
491 SUNXI_PIN(SUNXI_PINCTRL_PIN_PH22,
492 SUNXI_FUNCTION(0x0, "gpio_in"),
493 SUNXI_FUNCTION(0x1, "gpio_out")),
494 SUNXI_PIN(SUNXI_PINCTRL_PIN_PH23,
495 SUNXI_FUNCTION(0x0, "gpio_in"),
496 SUNXI_FUNCTION(0x1, "gpio_out")),
497 SUNXI_PIN(SUNXI_PINCTRL_PIN_PH24,
498 SUNXI_FUNCTION(0x0, "gpio_in"),
499 SUNXI_FUNCTION(0x1, "gpio_out")),
500 SUNXI_PIN(SUNXI_PINCTRL_PIN_PH25,
501 SUNXI_FUNCTION(0x0, "gpio_in"),
502 SUNXI_FUNCTION(0x1, "gpio_out")),
503 SUNXI_PIN(SUNXI_PINCTRL_PIN_PH26,
504 SUNXI_FUNCTION(0x0, "gpio_in"),
505 SUNXI_FUNCTION(0x1, "gpio_out")),
506 SUNXI_PIN(SUNXI_PINCTRL_PIN_PH27,
507 SUNXI_FUNCTION(0x0, "gpio_in"),
508 SUNXI_FUNCTION(0x1, "gpio_out")),
509 /* Hole */
510 SUNXI_PIN(SUNXI_PINCTRL_PIN_PI0,
511 SUNXI_FUNCTION(0x0, "gpio_in"),
512 SUNXI_FUNCTION(0x1, "gpio_out")),
513 SUNXI_PIN(SUNXI_PINCTRL_PIN_PI1,
514 SUNXI_FUNCTION(0x0, "gpio_in"),
515 SUNXI_FUNCTION(0x1, "gpio_out")),
516 SUNXI_PIN(SUNXI_PINCTRL_PIN_PI2,
517 SUNXI_FUNCTION(0x0, "gpio_in"),
518 SUNXI_FUNCTION(0x1, "gpio_out")),
519 SUNXI_PIN(SUNXI_PINCTRL_PIN_PI3,
520 SUNXI_FUNCTION(0x0, "gpio_in"),
521 SUNXI_FUNCTION(0x1, "gpio_out")),
522 SUNXI_PIN(SUNXI_PINCTRL_PIN_PI4,
523 SUNXI_FUNCTION(0x0, "gpio_in"),
524 SUNXI_FUNCTION(0x1, "gpio_out")),
525 SUNXI_PIN(SUNXI_PINCTRL_PIN_PI5,
526 SUNXI_FUNCTION(0x0, "gpio_in"),
527 SUNXI_FUNCTION(0x1, "gpio_out")),
528 SUNXI_PIN(SUNXI_PINCTRL_PIN_PI6,
529 SUNXI_FUNCTION(0x0, "gpio_in"),
530 SUNXI_FUNCTION(0x1, "gpio_out")),
531 SUNXI_PIN(SUNXI_PINCTRL_PIN_PI7,
532 SUNXI_FUNCTION(0x0, "gpio_in"),
533 SUNXI_FUNCTION(0x1, "gpio_out")),
534 SUNXI_PIN(SUNXI_PINCTRL_PIN_PI8,
535 SUNXI_FUNCTION(0x0, "gpio_in"),
536 SUNXI_FUNCTION(0x1, "gpio_out")),
537 SUNXI_PIN(SUNXI_PINCTRL_PIN_PI9,
538 SUNXI_FUNCTION(0x0, "gpio_in"),
539 SUNXI_FUNCTION(0x1, "gpio_out")),
540 SUNXI_PIN(SUNXI_PINCTRL_PIN_PI10,
541 SUNXI_FUNCTION(0x0, "gpio_in"),
542 SUNXI_FUNCTION(0x1, "gpio_out")),
543 SUNXI_PIN(SUNXI_PINCTRL_PIN_PI11,
544 SUNXI_FUNCTION(0x0, "gpio_in"),
545 SUNXI_FUNCTION(0x1, "gpio_out")),
546 SUNXI_PIN(SUNXI_PINCTRL_PIN_PI12,
547 SUNXI_FUNCTION(0x0, "gpio_in"),
548 SUNXI_FUNCTION(0x1, "gpio_out")),
549 SUNXI_PIN(SUNXI_PINCTRL_PIN_PI13,
550 SUNXI_FUNCTION(0x0, "gpio_in"),
551 SUNXI_FUNCTION(0x1, "gpio_out")),
552 SUNXI_PIN(SUNXI_PINCTRL_PIN_PI14,
553 SUNXI_FUNCTION(0x0, "gpio_in"),
554 SUNXI_FUNCTION(0x1, "gpio_out")),
555 SUNXI_PIN(SUNXI_PINCTRL_PIN_PI15,
556 SUNXI_FUNCTION(0x0, "gpio_in"),
557 SUNXI_FUNCTION(0x1, "gpio_out")),
558 SUNXI_PIN(SUNXI_PINCTRL_PIN_PI16,
559 SUNXI_FUNCTION(0x0, "gpio_in"),
560 SUNXI_FUNCTION(0x1, "gpio_out")),
561 SUNXI_PIN(SUNXI_PINCTRL_PIN_PI17,
562 SUNXI_FUNCTION(0x0, "gpio_in"),
563 SUNXI_FUNCTION(0x1, "gpio_out")),
564 SUNXI_PIN(SUNXI_PINCTRL_PIN_PI18,
565 SUNXI_FUNCTION(0x0, "gpio_in"),
566 SUNXI_FUNCTION(0x1, "gpio_out")),
567 SUNXI_PIN(SUNXI_PINCTRL_PIN_PI19,
568 SUNXI_FUNCTION(0x0, "gpio_in"),
569 SUNXI_FUNCTION(0x1, "gpio_out")),
570 SUNXI_PIN(SUNXI_PINCTRL_PIN_PI20,
571 SUNXI_FUNCTION(0x0, "gpio_in"),
572 SUNXI_FUNCTION(0x1, "gpio_out")),
573 SUNXI_PIN(SUNXI_PINCTRL_PIN_PI21,
574 SUNXI_FUNCTION(0x0, "gpio_in"),
575 SUNXI_FUNCTION(0x1, "gpio_out")),
576};
577
30static const struct sunxi_desc_pin sun5i_a13_pins[] = { 578static const struct sunxi_desc_pin sun5i_a13_pins[] = {
31 /* Hole */ 579 /* Hole */
32 SUNXI_PIN(SUNXI_PINCTRL_PIN_PB0, 580 SUNXI_PIN(SUNXI_PINCTRL_PIN_PB0,
@@ -274,6 +822,11 @@ static const struct sunxi_desc_pin sun5i_a13_pins[] = {
274 SUNXI_FUNCTION(0x1, "gpio_out")), 822 SUNXI_FUNCTION(0x1, "gpio_out")),
275}; 823};
276 824
825static const struct sunxi_pinctrl_desc sun4i_a10_pinctrl_data = {
826 .pins = sun4i_a10_pins,
827 .npins = ARRAY_SIZE(sun4i_a10_pins),
828};
829
277static const struct sunxi_pinctrl_desc sun5i_a13_pinctrl_data = { 830static const struct sunxi_pinctrl_desc sun5i_a13_pinctrl_data = {
278 .pins = sun5i_a13_pins, 831 .pins = sun5i_a13_pins,
279 .npins = ARRAY_SIZE(sun5i_a13_pins), 832 .npins = ARRAY_SIZE(sun5i_a13_pins),
@@ -720,6 +1273,7 @@ static struct gpio_chip sunxi_pinctrl_gpio_chip = {
720}; 1273};
721 1274
722static struct of_device_id sunxi_pinctrl_match[] = { 1275static struct of_device_id sunxi_pinctrl_match[] = {
1276 { .compatible = "allwinner,sun4i-a10-pinctrl", .data = (void *)&sun4i_a10_pinctrl_data },
723 { .compatible = "allwinner,sun5i-a13-pinctrl", .data = (void *)&sun5i_a13_pinctrl_data }, 1277 { .compatible = "allwinner,sun5i-a13-pinctrl", .data = (void *)&sun5i_a13_pinctrl_data },
724 {} 1278 {}
725}; 1279};
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-14 01:28:31 -0400