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authorLinus Walleij <linus.walleij@linaro.org>2012-11-20 08:28:07 -0500
committerLinus Walleij <linus.walleij@linaro.org>2012-11-21 02:55:17 -0500
commit387923c585ac68ff51e6bf673807438b5e5fdaf3 (patch)
tree1e6faaf633d5d647135ae8f86d45bd103d242fee /drivers/pinctrl/pinctrl-coh901.c
parent9afbefb227792a3c195085d662050dcca748f521 (diff)
pinctrl/u300/coh901: let the gpio_chip register the range
Instead of having the pinctrl driver register the GPIO range for the gpio_chip, making it necessary to instantiate the pin controller from the GPIO driver and pass the GPIO chip as platform data, now let the GPIO chip driver register it's own ranges and have the pinctrl driver look up the GPIO chip from the pinctrl core as necessary. Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/pinctrl-coh901.c')
-rw-r--r--drivers/pinctrl/pinctrl-coh901.c47
1 files changed, 45 insertions, 2 deletions
diff --git a/drivers/pinctrl/pinctrl-coh901.c b/drivers/pinctrl/pinctrl-coh901.c
index 1144dcdf2da0..04574308ea89 100644
--- a/drivers/pinctrl/pinctrl-coh901.c
+++ b/drivers/pinctrl/pinctrl-coh901.c
@@ -658,6 +658,36 @@ static inline void u300_gpio_free_ports(struct u300_gpio *gpio)
658 } 658 }
659} 659}
660 660
661/*
662 * Here we map a GPIO in the local gpio_chip pin space to a pin in
663 * the local pinctrl pin space. The pin controller used is
664 * pinctrl-u300.
665 */
666struct coh901_pinpair {
667 unsigned int offset;
668 unsigned int pin_base;
669};
670
671#define COH901_PINRANGE(a, b) { .offset = a, .pin_base = b }
672
673static struct coh901_pinpair coh901_pintable[] = {
674 COH901_PINRANGE(10, 426),
675 COH901_PINRANGE(11, 180),
676 COH901_PINRANGE(12, 165), /* MS/MMC card insertion */
677 COH901_PINRANGE(13, 179),
678 COH901_PINRANGE(14, 178),
679 COH901_PINRANGE(16, 194),
680 COH901_PINRANGE(17, 193),
681 COH901_PINRANGE(18, 192),
682 COH901_PINRANGE(19, 191),
683 COH901_PINRANGE(20, 186),
684 COH901_PINRANGE(21, 185),
685 COH901_PINRANGE(22, 184),
686 COH901_PINRANGE(23, 183),
687 COH901_PINRANGE(24, 182),
688 COH901_PINRANGE(25, 181),
689};
690
661static int __init u300_gpio_probe(struct platform_device *pdev) 691static int __init u300_gpio_probe(struct platform_device *pdev)
662{ 692{
663 struct u300_gpio_platform *plat = dev_get_platdata(&pdev->dev); 693 struct u300_gpio_platform *plat = dev_get_platdata(&pdev->dev);
@@ -786,16 +816,29 @@ static int __init u300_gpio_probe(struct platform_device *pdev)
786 goto err_no_chip; 816 goto err_no_chip;
787 } 817 }
788 818
789 /* Spawn pin controller device as child of the GPIO, pass gpio chip */ 819 /* Spawn pin controller device as child of the GPIO */
790 plat->pinctrl_device->dev.platform_data = &gpio->chip;
791 err = platform_device_register(plat->pinctrl_device); 820 err = platform_device_register(plat->pinctrl_device);
792 if (err) 821 if (err)
793 goto err_no_pinctrl; 822 goto err_no_pinctrl;
794 823
824 /*
825 * Add pinctrl pin ranges, the pin controller must be registered
826 * at this point
827 */
828 for (i = 0; i < ARRAY_SIZE(coh901_pintable); i++) {
829 struct coh901_pinpair *p = &coh901_pintable[i];
830
831 err = gpiochip_add_pin_range(&gpio->chip, "pinctrl-u300",
832 p->offset, p->pin_base, 1);
833 if (err)
834 goto err_no_range;
835 }
836
795 platform_set_drvdata(pdev, gpio); 837 platform_set_drvdata(pdev, gpio);
796 838
797 return 0; 839 return 0;
798 840
841err_no_range:
799err_no_pinctrl: 842err_no_pinctrl:
800 err = gpiochip_remove(&gpio->chip); 843 err = gpiochip_remove(&gpio->chip);
801err_no_chip: 844err_no_chip: