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authorRussell King <rmk+kernel@arm.linux.org.uk>2010-03-08 15:21:04 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-03-08 15:21:04 -0500
commit988addf82e4c03739375279de73929580a2d4a6a (patch)
tree989ae1cd4e264bbad80c65f04480486246e7b9f3 /drivers/pcmcia/o2micro.h
parent004c1c7096659d352b83047a7593e91d8a30e3c5 (diff)
parent25cf84cf377c0aae5dbcf937ea89bc7893db5176 (diff)
Merge branch 'origin' into devel-stable
Conflicts: arch/arm/mach-mx2/devices.c arch/arm/mach-mx2/devices.h sound/soc/pxa/pxa-ssp.c
Diffstat (limited to 'drivers/pcmcia/o2micro.h')
-rw-r--r--drivers/pcmcia/o2micro.h45
1 files changed, 29 insertions, 16 deletions
diff --git a/drivers/pcmcia/o2micro.h b/drivers/pcmcia/o2micro.h
index 624442fc0d35..e74bebac2695 100644
--- a/drivers/pcmcia/o2micro.h
+++ b/drivers/pcmcia/o2micro.h
@@ -116,13 +116,12 @@ static int o2micro_override(struct yenta_socket *socket)
116 * from Eric Still, 02Micro. 116 * from Eric Still, 02Micro.
117 */ 117 */
118 u8 a, b; 118 u8 a, b;
119 bool use_speedup;
119 120
120 if (PCI_FUNC(socket->dev->devfn) == 0) { 121 if (PCI_FUNC(socket->dev->devfn) == 0) {
121 a = config_readb(socket, O2_RESERVED1); 122 a = config_readb(socket, O2_RESERVED1);
122 b = config_readb(socket, O2_RESERVED2); 123 b = config_readb(socket, O2_RESERVED2);
123 124 dev_dbg(&socket->dev->dev, "O2: 0x94/0xD4: %02x/%02x\n", a, b);
124 dev_printk(KERN_INFO, &socket->dev->dev,
125 "O2: res at 0x94/0xD4: %02x/%02x\n", a, b);
126 125
127 switch (socket->dev->device) { 126 switch (socket->dev->device) {
128 /* 127 /*
@@ -135,23 +134,37 @@ static int o2micro_override(struct yenta_socket *socket)
135 case PCI_DEVICE_ID_O2_6812: 134 case PCI_DEVICE_ID_O2_6812:
136 case PCI_DEVICE_ID_O2_6832: 135 case PCI_DEVICE_ID_O2_6832:
137 case PCI_DEVICE_ID_O2_6836: 136 case PCI_DEVICE_ID_O2_6836:
138 case PCI_DEVICE_ID_O2_6933: 137 case PCI_DEVICE_ID_O2_6933:
139 dev_printk(KERN_INFO, &socket->dev->dev, 138 use_speedup = false;
140 "Yenta O2: old bridge, disabling read "
141 "prefetch/write burst\n");
142 config_writeb(socket, O2_RESERVED1,
143 a & ~(O2_RES_READ_PREFETCH | O2_RES_WRITE_BURST));
144 config_writeb(socket, O2_RESERVED2,
145 b & ~(O2_RES_READ_PREFETCH | O2_RES_WRITE_BURST));
146 break; 139 break;
147
148 default: 140 default:
149 dev_printk(KERN_INFO , &socket->dev->dev, 141 use_speedup = true;
150 "O2: enabling read prefetch/write burst\n"); 142 break;
143 }
144
145 /* the user may override our decision */
146 if (strcasecmp(o2_speedup, "on") == 0)
147 use_speedup = true;
148 else if (strcasecmp(o2_speedup, "off") == 0)
149 use_speedup = false;
150 else if (strcasecmp(o2_speedup, "default") != 0)
151 dev_warn(&socket->dev->dev,
152 "O2: Unknown parameter, using 'default'");
153
154 if (use_speedup) {
155 dev_info(&socket->dev->dev,
156 "O2: enabling read prefetch/write burst\n");
157 config_writeb(socket, O2_RESERVED1,
158 a | O2_RES_READ_PREFETCH | O2_RES_WRITE_BURST);
159 config_writeb(socket, O2_RESERVED2,
160 b | O2_RES_READ_PREFETCH | O2_RES_WRITE_BURST);
161 } else {
162 dev_info(&socket->dev->dev,
163 "O2: disabling read prefetch/write burst\n");
151 config_writeb(socket, O2_RESERVED1, 164 config_writeb(socket, O2_RESERVED1,
152 a | O2_RES_READ_PREFETCH | O2_RES_WRITE_BURST); 165 a & ~(O2_RES_READ_PREFETCH | O2_RES_WRITE_BURST));
153 config_writeb(socket, O2_RESERVED2, 166 config_writeb(socket, O2_RESERVED2,
154 b | O2_RES_READ_PREFETCH | O2_RES_WRITE_BURST); 167 b & ~(O2_RES_READ_PREFETCH | O2_RES_WRITE_BURST));
155 } 168 }
156 } 169 }
157 170