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authorDominik Brodowski <linux@dominikbrodowski.net>2009-10-23 06:56:46 -0400
committerDominik Brodowski <linux@dominikbrodowski.net>2009-11-08 12:23:13 -0500
commitc9f50dddd184a020d64dab63fa795967f0f14aa4 (patch)
treeb8de3c6e2860141e12fec7ba52bd25ef329590ae /drivers/pcmcia/m32r_cfc.c
parentd50dbec3ce52e1608636b8a624d087da9ced8cde (diff)
pcmcia: use dynamic debug in PCMCIA socket drivers
Make use of the dynamic debug infrastructure in various PCMCIA socket drivers. By doing so, only the drivers relying on soc_common make use of CONFIG_PCMCIA_DEBUG. Therefore, update the Kconfig entry accordingly. Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net>
Diffstat (limited to 'drivers/pcmcia/m32r_cfc.c')
-rw-r--r--drivers/pcmcia/m32r_cfc.c105
1 files changed, 46 insertions, 59 deletions
diff --git a/drivers/pcmcia/m32r_cfc.c b/drivers/pcmcia/m32r_cfc.c
index 7dfbee1dcd76..26a621c9e2fc 100644
--- a/drivers/pcmcia/m32r_cfc.c
+++ b/drivers/pcmcia/m32r_cfc.c
@@ -38,17 +38,6 @@
38 38
39#include "m32r_cfc.h" 39#include "m32r_cfc.h"
40 40
41#ifdef CONFIG_PCMCIA_DEBUG
42static int m32r_cfc_debug;
43module_param(m32r_cfc_debug, int, 0644);
44#define debug(lvl, fmt, arg...) do { \
45 if (m32r_cfc_debug > (lvl)) \
46 printk(KERN_DEBUG "m32r_cfc: " fmt , ## arg); \
47} while (0)
48#else
49#define debug(n, args...) do { } while (0)
50#endif
51
52/* Poll status interval -- 0 means default to interrupt */ 41/* Poll status interval -- 0 means default to interrupt */
53static int poll_interval = 0; 42static int poll_interval = 0;
54 43
@@ -123,7 +112,7 @@ void pcc_ioread_byte(int sock, unsigned long port, void *buf, size_t size,
123 unsigned char *bp = (unsigned char *)buf; 112 unsigned char *bp = (unsigned char *)buf;
124 unsigned long flags; 113 unsigned long flags;
125 114
126 debug(3, "m32r_cfc: pcc_ioread_byte: sock=%d, port=%#lx, buf=%p, " 115 pr_debug("m32r_cfc: pcc_ioread_byte: sock=%d, port=%#lx, buf=%p, "
127 "size=%u, nmemb=%d, flag=%d\n", 116 "size=%u, nmemb=%d, flag=%d\n",
128 sock, port, buf, size, nmemb, flag); 117 sock, port, buf, size, nmemb, flag);
129 118
@@ -132,7 +121,7 @@ void pcc_ioread_byte(int sock, unsigned long port, void *buf, size_t size,
132 printk("m32r_cfc:ioread_byte null port :%#lx\n",port); 121 printk("m32r_cfc:ioread_byte null port :%#lx\n",port);
133 return; 122 return;
134 } 123 }
135 debug(3, "m32r_cfc: pcc_ioread_byte: addr=%#lx\n", addr); 124 pr_debug("m32r_cfc: pcc_ioread_byte: addr=%#lx\n", addr);
136 125
137 spin_lock_irqsave(&pcc_lock, flags); 126 spin_lock_irqsave(&pcc_lock, flags);
138 /* read Byte */ 127 /* read Byte */
@@ -148,7 +137,7 @@ void pcc_ioread_word(int sock, unsigned long port, void *buf, size_t size,
148 unsigned short *bp = (unsigned short *)buf; 137 unsigned short *bp = (unsigned short *)buf;
149 unsigned long flags; 138 unsigned long flags;
150 139
151 debug(3, "m32r_cfc: pcc_ioread_word: sock=%d, port=%#lx, " 140 pr_debug("m32r_cfc: pcc_ioread_word: sock=%d, port=%#lx, "
152 "buf=%p, size=%u, nmemb=%d, flag=%d\n", 141 "buf=%p, size=%u, nmemb=%d, flag=%d\n",
153 sock, port, buf, size, nmemb, flag); 142 sock, port, buf, size, nmemb, flag);
154 143
@@ -163,7 +152,7 @@ void pcc_ioread_word(int sock, unsigned long port, void *buf, size_t size,
163 printk("m32r_cfc:ioread_word null port :%#lx\n",port); 152 printk("m32r_cfc:ioread_word null port :%#lx\n",port);
164 return; 153 return;
165 } 154 }
166 debug(3, "m32r_cfc: pcc_ioread_word: addr=%#lx\n", addr); 155 pr_debug("m32r_cfc: pcc_ioread_word: addr=%#lx\n", addr);
167 156
168 spin_lock_irqsave(&pcc_lock, flags); 157 spin_lock_irqsave(&pcc_lock, flags);
169 /* read Word */ 158 /* read Word */
@@ -179,7 +168,7 @@ void pcc_iowrite_byte(int sock, unsigned long port, void *buf, size_t size,
179 unsigned char *bp = (unsigned char *)buf; 168 unsigned char *bp = (unsigned char *)buf;
180 unsigned long flags; 169 unsigned long flags;
181 170
182 debug(3, "m32r_cfc: pcc_iowrite_byte: sock=%d, port=%#lx, " 171 pr_debug("m32r_cfc: pcc_iowrite_byte: sock=%d, port=%#lx, "
183 "buf=%p, size=%u, nmemb=%d, flag=%d\n", 172 "buf=%p, size=%u, nmemb=%d, flag=%d\n",
184 sock, port, buf, size, nmemb, flag); 173 sock, port, buf, size, nmemb, flag);
185 174
@@ -189,7 +178,7 @@ void pcc_iowrite_byte(int sock, unsigned long port, void *buf, size_t size,
189 printk("m32r_cfc:iowrite_byte null port:%#lx\n",port); 178 printk("m32r_cfc:iowrite_byte null port:%#lx\n",port);
190 return; 179 return;
191 } 180 }
192 debug(3, "m32r_cfc: pcc_iowrite_byte: addr=%#lx\n", addr); 181 pr_debug("m32r_cfc: pcc_iowrite_byte: addr=%#lx\n", addr);
193 182
194 spin_lock_irqsave(&pcc_lock, flags); 183 spin_lock_irqsave(&pcc_lock, flags);
195 while (nmemb--) 184 while (nmemb--)
@@ -204,7 +193,7 @@ void pcc_iowrite_word(int sock, unsigned long port, void *buf, size_t size,
204 unsigned short *bp = (unsigned short *)buf; 193 unsigned short *bp = (unsigned short *)buf;
205 unsigned long flags; 194 unsigned long flags;
206 195
207 debug(3, "m32r_cfc: pcc_iowrite_word: sock=%d, port=%#lx, " 196 pr_debug("m32r_cfc: pcc_iowrite_word: sock=%d, port=%#lx, "
208 "buf=%p, size=%u, nmemb=%d, flag=%d\n", 197 "buf=%p, size=%u, nmemb=%d, flag=%d\n",
209 sock, port, buf, size, nmemb, flag); 198 sock, port, buf, size, nmemb, flag);
210 199
@@ -226,7 +215,7 @@ void pcc_iowrite_word(int sock, unsigned long port, void *buf, size_t size,
226 return; 215 return;
227 } 216 }
228#endif 217#endif
229 debug(3, "m32r_cfc: pcc_iowrite_word: addr=%#lx\n", addr); 218 pr_debug("m32r_cfc: pcc_iowrite_word: addr=%#lx\n", addr);
230 219
231 spin_lock_irqsave(&pcc_lock, flags); 220 spin_lock_irqsave(&pcc_lock, flags);
232 while (nmemb--) 221 while (nmemb--)
@@ -262,7 +251,7 @@ static struct timer_list poll_timer;
262static unsigned int pcc_get(u_short sock, unsigned int reg) 251static unsigned int pcc_get(u_short sock, unsigned int reg)
263{ 252{
264 unsigned int val = inw(reg); 253 unsigned int val = inw(reg);
265 debug(3, "m32r_cfc: pcc_get: reg(0x%08x)=0x%04x\n", reg, val); 254 pr_debug("m32r_cfc: pcc_get: reg(0x%08x)=0x%04x\n", reg, val);
266 return val; 255 return val;
267} 256}
268 257
@@ -270,7 +259,7 @@ static unsigned int pcc_get(u_short sock, unsigned int reg)
270static void pcc_set(u_short sock, unsigned int reg, unsigned int data) 259static void pcc_set(u_short sock, unsigned int reg, unsigned int data)
271{ 260{
272 outw(data, reg); 261 outw(data, reg);
273 debug(3, "m32r_cfc: pcc_set: reg(0x%08x)=0x%04x\n", reg, data); 262 pr_debug("m32r_cfc: pcc_set: reg(0x%08x)=0x%04x\n", reg, data);
274} 263}
275 264
276/*====================================================================== 265/*======================================================================
@@ -286,14 +275,14 @@ static int __init is_alive(u_short sock)
286{ 275{
287 unsigned int stat; 276 unsigned int stat;
288 277
289 debug(3, "m32r_cfc: is_alive:\n"); 278 pr_debug("m32r_cfc: is_alive:\n");
290 279
291 printk("CF: "); 280 printk("CF: ");
292 stat = pcc_get(sock, (unsigned int)PLD_CFSTS); 281 stat = pcc_get(sock, (unsigned int)PLD_CFSTS);
293 if (!stat) 282 if (!stat)
294 printk("No "); 283 printk("No ");
295 printk("Card is detected at socket %d : stat = 0x%08x\n", sock, stat); 284 printk("Card is detected at socket %d : stat = 0x%08x\n", sock, stat);
296 debug(3, "m32r_cfc: is_alive: sock stat is 0x%04x\n", stat); 285 pr_debug("m32r_cfc: is_alive: sock stat is 0x%04x\n", stat);
297 286
298 return 0; 287 return 0;
299} 288}
@@ -303,7 +292,7 @@ static void add_pcc_socket(ulong base, int irq, ulong mapaddr,
303{ 292{
304 pcc_socket_t *t = &socket[pcc_sockets]; 293 pcc_socket_t *t = &socket[pcc_sockets];
305 294
306 debug(3, "m32r_cfc: add_pcc_socket: base=%#lx, irq=%d, " 295 pr_debug("m32r_cfc: add_pcc_socket: base=%#lx, irq=%d, "
307 "mapaddr=%#lx, ioaddr=%08x\n", 296 "mapaddr=%#lx, ioaddr=%08x\n",
308 base, irq, mapaddr, ioaddr); 297 base, irq, mapaddr, ioaddr);
309 298
@@ -358,7 +347,7 @@ static void add_pcc_socket(ulong base, int irq, ulong mapaddr,
358 /* eject interrupt */ 347 /* eject interrupt */
359 request_irq(irq+1, pcc_interrupt, 0, "m32r_cfc", pcc_interrupt); 348 request_irq(irq+1, pcc_interrupt, 0, "m32r_cfc", pcc_interrupt);
360#endif 349#endif
361 debug(3, "m32r_cfc: enable CFMSK, RDYSEL\n"); 350 pr_debug("m32r_cfc: enable CFMSK, RDYSEL\n");
362 pcc_set(pcc_sockets, (unsigned int)PLD_CFIMASK, 0x01); 351 pcc_set(pcc_sockets, (unsigned int)PLD_CFIMASK, 0x01);
363#endif /* CONFIG_PLAT_USRV */ 352#endif /* CONFIG_PLAT_USRV */
364#if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_USRV) || defined(CONFIG_PLAT_OPSPUT) 353#if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_USRV) || defined(CONFIG_PLAT_OPSPUT)
@@ -378,26 +367,26 @@ static irqreturn_t pcc_interrupt(int irq, void *dev)
378 u_int events = 0; 367 u_int events = 0;
379 int handled = 0; 368 int handled = 0;
380 369
381 debug(3, "m32r_cfc: pcc_interrupt: irq=%d, dev=%p\n", irq, dev); 370 pr_debug("m32r_cfc: pcc_interrupt: irq=%d, dev=%p\n", irq, dev);
382 for (i = 0; i < pcc_sockets; i++) { 371 for (i = 0; i < pcc_sockets; i++) {
383 if (socket[i].cs_irq1 != irq && socket[i].cs_irq2 != irq) 372 if (socket[i].cs_irq1 != irq && socket[i].cs_irq2 != irq)
384 continue; 373 continue;
385 374
386 handled = 1; 375 handled = 1;
387 debug(3, "m32r_cfc: pcc_interrupt: socket %d irq 0x%02x ", 376 pr_debug("m32r_cfc: pcc_interrupt: socket %d irq 0x%02x ",
388 i, irq); 377 i, irq);
389 events |= SS_DETECT; /* insert or eject */ 378 events |= SS_DETECT; /* insert or eject */
390 if (events) 379 if (events)
391 pcmcia_parse_events(&socket[i].socket, events); 380 pcmcia_parse_events(&socket[i].socket, events);
392 } 381 }
393 debug(3, "m32r_cfc: pcc_interrupt: done\n"); 382 pr_debug("m32r_cfc: pcc_interrupt: done\n");
394 383
395 return IRQ_RETVAL(handled); 384 return IRQ_RETVAL(handled);
396} /* pcc_interrupt */ 385} /* pcc_interrupt */
397 386
398static void pcc_interrupt_wrapper(u_long data) 387static void pcc_interrupt_wrapper(u_long data)
399{ 388{
400 debug(3, "m32r_cfc: pcc_interrupt_wrapper:\n"); 389 pr_debug("m32r_cfc: pcc_interrupt_wrapper:\n");
401 pcc_interrupt(0, NULL); 390 pcc_interrupt(0, NULL);
402 init_timer(&poll_timer); 391 init_timer(&poll_timer);
403 poll_timer.expires = jiffies + poll_interval; 392 poll_timer.expires = jiffies + poll_interval;
@@ -410,17 +399,17 @@ static int _pcc_get_status(u_short sock, u_int *value)
410{ 399{
411 u_int status; 400 u_int status;
412 401
413 debug(3, "m32r_cfc: _pcc_get_status:\n"); 402 pr_debug("m32r_cfc: _pcc_get_status:\n");
414 status = pcc_get(sock, (unsigned int)PLD_CFSTS); 403 status = pcc_get(sock, (unsigned int)PLD_CFSTS);
415 *value = (status) ? SS_DETECT : 0; 404 *value = (status) ? SS_DETECT : 0;
416 debug(3, "m32r_cfc: _pcc_get_status: status=0x%08x\n", status); 405 pr_debug("m32r_cfc: _pcc_get_status: status=0x%08x\n", status);
417 406
418#if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_USRV) || defined(CONFIG_PLAT_OPSPUT) 407#if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_USRV) || defined(CONFIG_PLAT_OPSPUT)
419 if ( status ) { 408 if ( status ) {
420 /* enable CF power */ 409 /* enable CF power */
421 status = inw((unsigned int)PLD_CPCR); 410 status = inw((unsigned int)PLD_CPCR);
422 if (!(status & PLD_CPCR_CF)) { 411 if (!(status & PLD_CPCR_CF)) {
423 debug(3, "m32r_cfc: _pcc_get_status: " 412 pr_debug("m32r_cfc: _pcc_get_status: "
424 "power on (CPCR=0x%08x)\n", status); 413 "power on (CPCR=0x%08x)\n", status);
425 status |= PLD_CPCR_CF; 414 status |= PLD_CPCR_CF;
426 outw(status, (unsigned int)PLD_CPCR); 415 outw(status, (unsigned int)PLD_CPCR);
@@ -439,7 +428,7 @@ static int _pcc_get_status(u_short sock, u_int *value)
439 status &= ~PLD_CPCR_CF; 428 status &= ~PLD_CPCR_CF;
440 outw(status, (unsigned int)PLD_CPCR); 429 outw(status, (unsigned int)PLD_CPCR);
441 udelay(100); 430 udelay(100);
442 debug(3, "m32r_cfc: _pcc_get_status: " 431 pr_debug("m32r_cfc: _pcc_get_status: "
443 "power off (CPCR=0x%08x)\n", status); 432 "power off (CPCR=0x%08x)\n", status);
444 } 433 }
445#elif defined(CONFIG_PLAT_MAPPI2) || defined(CONFIG_PLAT_MAPPI3) 434#elif defined(CONFIG_PLAT_MAPPI2) || defined(CONFIG_PLAT_MAPPI3)
@@ -465,13 +454,13 @@ static int _pcc_get_status(u_short sock, u_int *value)
465 /* disable CF power */ 454 /* disable CF power */
466 pcc_set(sock, (unsigned int)PLD_CPCR, 0); 455 pcc_set(sock, (unsigned int)PLD_CPCR, 0);
467 udelay(100); 456 udelay(100);
468 debug(3, "m32r_cfc: _pcc_get_status: " 457 pr_debug("m32r_cfc: _pcc_get_status: "
469 "power off (CPCR=0x%08x)\n", status); 458 "power off (CPCR=0x%08x)\n", status);
470 } 459 }
471#else 460#else
472#error no platform configuration 461#error no platform configuration
473#endif 462#endif
474 debug(3, "m32r_cfc: _pcc_get_status: GetStatus(%d) = %#4.4x\n", 463 pr_debug("m32r_cfc: _pcc_get_status: GetStatus(%d) = %#4.4x\n",
475 sock, *value); 464 sock, *value);
476 return 0; 465 return 0;
477} /* _get_status */ 466} /* _get_status */
@@ -480,7 +469,7 @@ static int _pcc_get_status(u_short sock, u_int *value)
480 469
481static int _pcc_set_socket(u_short sock, socket_state_t *state) 470static int _pcc_set_socket(u_short sock, socket_state_t *state)
482{ 471{
483 debug(3, "m32r_cfc: SetSocket(%d, flags %#3.3x, Vcc %d, Vpp %d, " 472 pr_debug("m32r_cfc: SetSocket(%d, flags %#3.3x, Vcc %d, Vpp %d, "
484 "io_irq %d, csc_mask %#2.2x)\n", sock, state->flags, 473 "io_irq %d, csc_mask %#2.2x)\n", sock, state->flags,
485 state->Vcc, state->Vpp, state->io_irq, state->csc_mask); 474 state->Vcc, state->Vpp, state->io_irq, state->csc_mask);
486 475
@@ -492,41 +481,39 @@ static int _pcc_set_socket(u_short sock, socket_state_t *state)
492 } 481 }
493#endif 482#endif
494 if (state->flags & SS_RESET) { 483 if (state->flags & SS_RESET) {
495 debug(3, ":RESET\n"); 484 pr_debug(":RESET\n");
496 pcc_set(sock,(unsigned int)PLD_CFRSTCR,0x101); 485 pcc_set(sock,(unsigned int)PLD_CFRSTCR,0x101);
497 }else{ 486 }else{
498 pcc_set(sock,(unsigned int)PLD_CFRSTCR,0x100); 487 pcc_set(sock,(unsigned int)PLD_CFRSTCR,0x100);
499 } 488 }
500 if (state->flags & SS_OUTPUT_ENA){ 489 if (state->flags & SS_OUTPUT_ENA){
501 debug(3, ":OUTPUT_ENA\n"); 490 pr_debug(":OUTPUT_ENA\n");
502 /* bit clear */ 491 /* bit clear */
503 pcc_set(sock,(unsigned int)PLD_CFBUFCR,0); 492 pcc_set(sock,(unsigned int)PLD_CFBUFCR,0);
504 } else { 493 } else {
505 pcc_set(sock,(unsigned int)PLD_CFBUFCR,1); 494 pcc_set(sock,(unsigned int)PLD_CFBUFCR,1);
506 } 495 }
507 496
508#ifdef CONFIG_PCMCIA_DEBUG
509 if(state->flags & SS_IOCARD){ 497 if(state->flags & SS_IOCARD){
510 debug(3, ":IOCARD"); 498 pr_debug(":IOCARD");
511 } 499 }
512 if (state->flags & SS_PWR_AUTO) { 500 if (state->flags & SS_PWR_AUTO) {
513 debug(3, ":PWR_AUTO"); 501 pr_debug(":PWR_AUTO");
514 } 502 }
515 if (state->csc_mask & SS_DETECT) 503 if (state->csc_mask & SS_DETECT)
516 debug(3, ":csc-SS_DETECT"); 504 pr_debug(":csc-SS_DETECT");
517 if (state->flags & SS_IOCARD) { 505 if (state->flags & SS_IOCARD) {
518 if (state->csc_mask & SS_STSCHG) 506 if (state->csc_mask & SS_STSCHG)
519 debug(3, ":STSCHG"); 507 pr_debug(":STSCHG");
520 } else { 508 } else {
521 if (state->csc_mask & SS_BATDEAD) 509 if (state->csc_mask & SS_BATDEAD)
522 debug(3, ":BATDEAD"); 510 pr_debug(":BATDEAD");
523 if (state->csc_mask & SS_BATWARN) 511 if (state->csc_mask & SS_BATWARN)
524 debug(3, ":BATWARN"); 512 pr_debug(":BATWARN");
525 if (state->csc_mask & SS_READY) 513 if (state->csc_mask & SS_READY)
526 debug(3, ":READY"); 514 pr_debug(":READY");
527 } 515 }
528 debug(3, "\n"); 516 pr_debug("\n");
529#endif
530 return 0; 517 return 0;
531} /* _set_socket */ 518} /* _set_socket */
532 519
@@ -536,7 +523,7 @@ static int _pcc_set_io_map(u_short sock, struct pccard_io_map *io)
536{ 523{
537 u_char map; 524 u_char map;
538 525
539 debug(3, "m32r_cfc: SetIOMap(%d, %d, %#2.2x, %d ns, " 526 pr_debug("m32r_cfc: SetIOMap(%d, %d, %#2.2x, %d ns, "
540 "%#llx-%#llx)\n", sock, io->map, io->flags, 527 "%#llx-%#llx)\n", sock, io->map, io->flags,
541 io->speed, (unsigned long long)io->start, 528 io->speed, (unsigned long long)io->start,
542 (unsigned long long)io->stop); 529 (unsigned long long)io->stop);
@@ -554,7 +541,7 @@ static int _pcc_set_mem_map(u_short sock, struct pccard_mem_map *mem)
554 u_long addr; 541 u_long addr;
555 pcc_socket_t *t = &socket[sock]; 542 pcc_socket_t *t = &socket[sock];
556 543
557 debug(3, "m32r_cfc: SetMemMap(%d, %d, %#2.2x, %d ns, " 544 pr_debug("m32r_cfc: SetMemMap(%d, %d, %#2.2x, %d ns, "
558 "%#llx, %#x)\n", sock, map, mem->flags, 545 "%#llx, %#x)\n", sock, map, mem->flags,
559 mem->speed, (unsigned long long)mem->static_start, 546 mem->speed, (unsigned long long)mem->static_start,
560 mem->card_start); 547 mem->card_start);
@@ -640,11 +627,11 @@ static int pcc_get_status(struct pcmcia_socket *s, u_int *value)
640 unsigned int sock = container_of(s, struct pcc_socket, socket)->number; 627 unsigned int sock = container_of(s, struct pcc_socket, socket)->number;
641 628
642 if (socket[sock].flags & IS_ALIVE) { 629 if (socket[sock].flags & IS_ALIVE) {
643 debug(3, "m32r_cfc: pcc_get_status: sock(%d) -EINVAL\n", sock); 630 dev_dbg(&s->dev, "pcc_get_status: sock(%d) -EINVAL\n", sock);
644 *value = 0; 631 *value = 0;
645 return -EINVAL; 632 return -EINVAL;
646 } 633 }
647 debug(3, "m32r_cfc: pcc_get_status: sock(%d)\n", sock); 634 dev_dbg(&s->dev, "pcc_get_status: sock(%d)\n", sock);
648 LOCKED(_pcc_get_status(sock, value)); 635 LOCKED(_pcc_get_status(sock, value));
649} 636}
650 637
@@ -653,10 +640,10 @@ static int pcc_set_socket(struct pcmcia_socket *s, socket_state_t *state)
653 unsigned int sock = container_of(s, struct pcc_socket, socket)->number; 640 unsigned int sock = container_of(s, struct pcc_socket, socket)->number;
654 641
655 if (socket[sock].flags & IS_ALIVE) { 642 if (socket[sock].flags & IS_ALIVE) {
656 debug(3, "m32r_cfc: pcc_set_socket: sock(%d) -EINVAL\n", sock); 643 dev_dbg(&s->dev, "pcc_set_socket: sock(%d) -EINVAL\n", sock);
657 return -EINVAL; 644 return -EINVAL;
658 } 645 }
659 debug(3, "m32r_cfc: pcc_set_socket: sock(%d)\n", sock); 646 dev_dbg(&s->dev, "pcc_set_socket: sock(%d)\n", sock);
660 LOCKED(_pcc_set_socket(sock, state)); 647 LOCKED(_pcc_set_socket(sock, state));
661} 648}
662 649
@@ -665,10 +652,10 @@ static int pcc_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
665 unsigned int sock = container_of(s, struct pcc_socket, socket)->number; 652 unsigned int sock = container_of(s, struct pcc_socket, socket)->number;
666 653
667 if (socket[sock].flags & IS_ALIVE) { 654 if (socket[sock].flags & IS_ALIVE) {
668 debug(3, "m32r_cfc: pcc_set_io_map: sock(%d) -EINVAL\n", sock); 655 dev_dbg(&s->dev, "pcc_set_io_map: sock(%d) -EINVAL\n", sock);
669 return -EINVAL; 656 return -EINVAL;
670 } 657 }
671 debug(3, "m32r_cfc: pcc_set_io_map: sock(%d)\n", sock); 658 dev_dbg(&s->dev, "pcc_set_io_map: sock(%d)\n", sock);
672 LOCKED(_pcc_set_io_map(sock, io)); 659 LOCKED(_pcc_set_io_map(sock, io));
673} 660}
674 661
@@ -677,16 +664,16 @@ static int pcc_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *mem)
677 unsigned int sock = container_of(s, struct pcc_socket, socket)->number; 664 unsigned int sock = container_of(s, struct pcc_socket, socket)->number;
678 665
679 if (socket[sock].flags & IS_ALIVE) { 666 if (socket[sock].flags & IS_ALIVE) {
680 debug(3, "m32r_cfc: pcc_set_mem_map: sock(%d) -EINVAL\n", sock); 667 dev_dbg(&s->dev, "pcc_set_mem_map: sock(%d) -EINVAL\n", sock);
681 return -EINVAL; 668 return -EINVAL;
682 } 669 }
683 debug(3, "m32r_cfc: pcc_set_mem_map: sock(%d)\n", sock); 670 dev_dbg(&s->dev, "pcc_set_mem_map: sock(%d)\n", sock);
684 LOCKED(_pcc_set_mem_map(sock, mem)); 671 LOCKED(_pcc_set_mem_map(sock, mem));
685} 672}
686 673
687static int pcc_init(struct pcmcia_socket *s) 674static int pcc_init(struct pcmcia_socket *s)
688{ 675{
689 debug(3, "m32r_cfc: pcc_init()\n"); 676 dev_dbg(&s->dev, "pcc_init()\n");
690 return 0; 677 return 0;
691} 678}
692 679