PCI: rcar: Write zeroes to reserved PCIEPARL bits

The lower 7 bits of PCIEPARL are reserved.  When we write to this register,
these bits must be 0.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Phil Edworthy <phil.edworthy@renesas.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>

1 files changed, 2 insertions, 1 deletions

diff --git a/drivers/pci/host/pcie-rcar.c b/drivers/pci/host/pcie-rcar.c
index 8f5490f443ff..a910f795bfee 100644
--- a/drivers/pci/host/pcie-rcar.c
+++ b/drivers/pci/host/pcie-rcar.c
@@ -342,7 +342,8 @@ static void rcar_pcie_setup_window(int win, struct rcar_pcie *pcie)
                 res_start = res->start;
 
         rcar_pci_write_reg(pcie, upper_32_bits(res_start), PCIEPARH(win));
-        rcar_pci_write_reg(pcie, lower_32_bits(res_start), PCIEPARL(win));
+        rcar_pci_write_reg(pcie, lower_32_bits(res_start) & ~0x7F,
+                           PCIEPARL(win));
 
         /* First resource is for IO */
         mask = PAR_ENABLE;