Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu

* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (53 commits)
  iommu/amd: Set IOTLB invalidation timeout
  iommu/amd: Init stats for iommu=pt
  iommu/amd: Remove unnecessary cache flushes in amd_iommu_resume
  iommu/amd: Add invalidate-context call-back
  iommu/amd: Add amd_iommu_device_info() function
  iommu/amd: Adapt IOMMU driver to PCI register name changes
  iommu/amd: Add invalid_ppr callback
  iommu/amd: Implement notifiers for IOMMUv2
  iommu/amd: Implement IO page-fault handler
  iommu/amd: Add routines to bind/unbind a pasid
  iommu/amd: Implement device aquisition code for IOMMUv2
  iommu/amd: Add driver stub for AMD IOMMUv2 support
  iommu/amd: Add stat counter for IOMMUv2 events
  iommu/amd: Add device errata handling
  iommu/amd: Add function to get IOMMUv2 domain for pdev
  iommu/amd: Implement function to send PPR completions
  iommu/amd: Implement functions to manage GCR3 table
  iommu/amd: Implement IOMMUv2 TLB flushing routines
  iommu/amd: Add support for IOMMUv2 domain mode
  iommu/amd: Add amd_iommu_domain_direct_map function
  ...

8 files changed, 214 insertions, 85 deletions

diff --git a/drivers/pci/ats.c b/drivers/pci/ats.c
index b0dd08e6a9da..9dd90b30f91a 100644
--- a/drivers/pci/ats.c
+++ b/drivers/pci/ats.c
@@ -175,21 +175,22 @@ int pci_enable_pri(struct pci_dev *pdev, u32 reqs)
         u32 max_requests;
         int pos;
 
-        pos = pci_find_ext_capability(pdev, PCI_PRI_CAP);
+        pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
         if (!pos)
                 return -EINVAL;
 
-        pci_read_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, &control);
-        pci_read_config_word(pdev, pos + PCI_PRI_STATUS_OFF,  &status);
-        if ((control & PCI_PRI_ENABLE) || !(status & PCI_PRI_STATUS_STOPPED))
+        pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control);
+        pci_read_config_word(pdev, pos + PCI_PRI_STATUS, &status);
+        if ((control & PCI_PRI_CTRL_ENABLE) ||
+            !(status & PCI_PRI_STATUS_STOPPED))
                 return -EBUSY;
 
-        pci_read_config_dword(pdev, pos + PCI_PRI_MAX_REQ_OFF, &max_requests);
+        pci_read_config_dword(pdev, pos + PCI_PRI_MAX_REQ, &max_requests);
         reqs = min(max_requests, reqs);
-        pci_write_config_dword(pdev, pos + PCI_PRI_ALLOC_REQ_OFF, reqs);
+        pci_write_config_dword(pdev, pos + PCI_PRI_ALLOC_REQ, reqs);
 
-        control |= PCI_PRI_ENABLE;
-        pci_write_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, control);
+        control |= PCI_PRI_CTRL_ENABLE;
+        pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control);
 
         return 0;
 }
@@ -206,13 +207,13 @@ void pci_disable_pri(struct pci_dev *pdev)
         u16 control;
         int pos;
 
-        pos = pci_find_ext_capability(pdev, PCI_PRI_CAP);
+        pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
         if (!pos)
                 return;
 
-        pci_read_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, &control);
-        control &= ~PCI_PRI_ENABLE;
-        pci_write_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, control);
+        pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control);
+        control &= ~PCI_PRI_CTRL_ENABLE;
+        pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control);
 }
 EXPORT_SYMBOL_GPL(pci_disable_pri);
 
@@ -227,13 +228,13 @@ bool pci_pri_enabled(struct pci_dev *pdev)
         u16 control;
         int pos;
 
-        pos = pci_find_ext_capability(pdev, PCI_PRI_CAP);
+        pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
         if (!pos)
                 return false;
 
-        pci_read_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, &control);
+        pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control);
 
-        return (control & PCI_PRI_ENABLE) ? true : false;
+        return (control & PCI_PRI_CTRL_ENABLE) ? true : false;
 }
 EXPORT_SYMBOL_GPL(pci_pri_enabled);
 
@@ -249,17 +250,17 @@ int pci_reset_pri(struct pci_dev *pdev)
         u16 control;
         int pos;
 
-        pos = pci_find_ext_capability(pdev, PCI_PRI_CAP);
+        pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
         if (!pos)
                 return -EINVAL;
 
-        pci_read_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, &control);
-        if (control & PCI_PRI_ENABLE)
+        pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control);
+        if (control & PCI_PRI_CTRL_ENABLE)
                 return -EBUSY;
 
-        control |= PCI_PRI_RESET;
+        control |= PCI_PRI_CTRL_RESET;
 
-        pci_write_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, control);
+        pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control);
 
         return 0;
 }
@@ -282,14 +283,14 @@ bool pci_pri_stopped(struct pci_dev *pdev)
         u16 control, status;
         int pos;
 
-        pos = pci_find_ext_capability(pdev, PCI_PRI_CAP);
+        pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
         if (!pos)
                 return true;
 
-        pci_read_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, &control);
-        pci_read_config_word(pdev, pos + PCI_PRI_STATUS_OFF,  &status);
+        pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control);
+        pci_read_config_word(pdev, pos + PCI_PRI_STATUS, &status);
 
-        if (control & PCI_PRI_ENABLE)
+        if (control & PCI_PRI_CTRL_ENABLE)
                 return false;
 
         return (status & PCI_PRI_STATUS_STOPPED) ? true : false;
@@ -311,15 +312,15 @@ int pci_pri_status(struct pci_dev *pdev)
         u16 status, control;
         int pos;
 
-        pos = pci_find_ext_capability(pdev, PCI_PRI_CAP);
+        pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
         if (!pos)
                 return -EINVAL;
 
-        pci_read_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, &control);
-        pci_read_config_word(pdev, pos + PCI_PRI_STATUS_OFF,  &status);
+        pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control);
+        pci_read_config_word(pdev, pos + PCI_PRI_STATUS, &status);
 
         /* Stopped bit is undefined when enable == 1, so clear it */
-        if (control & PCI_PRI_ENABLE)
+        if (control & PCI_PRI_CTRL_ENABLE)
                 status &= ~PCI_PRI_STATUS_STOPPED;
 
         return status;
@@ -342,25 +343,25 @@ int pci_enable_pasid(struct pci_dev *pdev, int features)
         u16 control, supported;
         int pos;
 
-        pos = pci_find_ext_capability(pdev, PCI_PASID_CAP);
+        pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID);
         if (!pos)
                 return -EINVAL;
 
-        pci_read_config_word(pdev, pos + PCI_PASID_CONTROL_OFF, &control);
-        pci_read_config_word(pdev, pos + PCI_PASID_CAP_OFF,     &supported);
+        pci_read_config_word(pdev, pos + PCI_PASID_CTRL, &control);
+        pci_read_config_word(pdev, pos + PCI_PASID_CAP, &supported);
 
-        if (!(supported & PCI_PASID_ENABLE))
+        if (control & PCI_PASID_CTRL_ENABLE)
                 return -EINVAL;
 
-        supported &= PCI_PASID_EXEC | PCI_PASID_PRIV;
+        supported &= PCI_PASID_CAP_EXEC | PCI_PASID_CAP_PRIV;
 
         /* User wants to enable anything unsupported? */
         if ((supported & features) != features)
                 return -EINVAL;