Merge branch 'wip-2.6.34' into old-private-masterarchived-private-master

76 files changed, 3686 insertions, 1847 deletions

diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index fdc864f9cf23..7858a117e80b 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -21,17 +21,6 @@ config PCI_MSI
 
            If you don't know what to do here, say N.
 
-config PCI_LEGACY
-        bool "Enable deprecated pci_find_* API"
-        depends on PCI
-        default y
-        help
-          Say Y here if you want to include support for the deprecated
-          pci_find_slot() and pci_find_device() APIs.  Most drivers have
-          been converted over to using the proper hotplug APIs, so this
-          option serves to include/exclude only a few drivers that are
-          still using this API.
-
 config PCI_DEBUG
         bool "PCI Debugging"
         depends on PCI && DEBUG_KERNEL
@@ -69,3 +58,10 @@ config PCI_IOV
           physical resources.
 
           If unsure, say N.
+
+config PCI_IOAPIC
+        bool
+        depends on PCI
+        depends on ACPI
+        depends on HOTPLUG
+        default y
diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
index 4a7f11d8f432..0b51857fbaf7 100644
--- a/drivers/pci/Makefile
+++ b/drivers/pci/Makefile
@@ -2,18 +2,19 @@
 # Makefile for the PCI bus specific drivers.
 #
 
-obj-y           += access.o bus.o probe.o remove.o pci.o quirks.o \
+obj-y           += access.o bus.o probe.o remove.o pci.o \
                         pci-driver.o search.o pci-sysfs.o rom.o setup-res.o \
-                        irq.o
+                        irq.o vpd.o
 obj-$(CONFIG_PROC_FS) += proc.o
 obj-$(CONFIG_SYSFS) += slot.o
 
-obj-$(CONFIG_PCI_LEGACY) += legacy.o
-CFLAGS_legacy.o += -Wno-deprecated-declarations
+obj-$(CONFIG_PCI_QUIRKS) += quirks.o
 
 # Build PCI Express stuff if needed
 obj-$(CONFIG_PCIEPORTBUS) += pcie/
 
+obj-$(CONFIG_PCI_IOAPIC) += ioapic.o
+
 obj-$(CONFIG_HOTPLUG) += hotplug.o
 
 # Build the PCI Hotplug drivers if we were asked to
@@ -47,6 +48,7 @@ obj-$(CONFIG_PPC) += setup-bus.o
 obj-$(CONFIG_MIPS) += setup-bus.o setup-irq.o
 obj-$(CONFIG_X86_VISWS) += setup-irq.o
 obj-$(CONFIG_MN10300) += setup-bus.o
+obj-$(CONFIG_MICROBLAZE) += setup-bus.o
 
 #
 # ACPI Related PCI FW Functions
diff --git a/drivers/pci/access.c b/drivers/pci/access.c
index db23200c4874..2f646fe1260f 100644
--- a/drivers/pci/access.c
+++ b/drivers/pci/access.c
@@ -2,6 +2,7 @@
 #include <linux/pci.h>
 #include <linux/module.h>
 #include <linux/sched.h>
+#include <linux/slab.h>
 #include <linux/ioport.h>
 #include <linux/wait.h>
 
diff --git a/drivers/pci/bus.c b/drivers/pci/bus.c
index cef28a79103f..628ea20a8841 100644
--- a/drivers/pci/bus.c
+++ b/drivers/pci/bus.c
@@ -14,9 +14,56 @@
 #include <linux/ioport.h>
 #include <linux/proc_fs.h>
 #include <linux/init.h>
+#include <linux/slab.h>
 
 #include "pci.h"
 
+void pci_bus_add_resource(struct pci_bus *bus, struct resource *res,
+                          unsigned int flags)
+{
+        struct pci_bus_resource *bus_res;
+
+        bus_res = kzalloc(sizeof(struct pci_bus_resource), GFP_KERNEL);
+        if (!bus_res) {
+                dev_err(&bus->dev, "can't add %pR resource\n", res);
+                return;
+        }
+
+        bus_res->res = res;
+        bus_res->flags = flags;
+        list_add_tail(&bus_res->list, &bus->resources);
+}
+
+struct resource *pci_bus_resource_n(const struct pci_bus *bus, int n)
+{
+        struct pci_bus_resource *bus_res;
+
+        if (n < PCI_BRIDGE_RESOURCE_NUM)
+                return bus->resource[n];
+
+        n -= PCI_BRIDGE_RESOURCE_NUM;
+        list_for_each_entry(bus_res, &bus->resources, list) {
+                if (n-- == 0)
+                        return bus_res->res;
+        }
+        return NULL;
+}
+EXPORT_SYMBOL_GPL(pci_bus_resource_n);
+
+void pci_bus_remove_resources(struct pci_bus *bus)
+{
+        struct pci_bus_resource *bus_res, *tmp;
+        int i;
+
+        for (i = 0; i < PCI_BRIDGE_RESOURCE_NUM; i++)
+                bus->resource[i] = 0;
+
+        list_for_each_entry_safe(bus_res, tmp, &bus->resources, list) {
+                list_del(&bus_res->list);
+                kfree(bus_res);
+        }
+}
+
 /**
  * pci_bus_alloc_resource - allocate a resource from a parent bus
  * @bus: PCI bus
@@ -36,11 +83,14 @@ int
 pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res,
                 resource_size_t size, resource_size_t align,
                 resource_size_t min, unsigned int type_mask,
-                void (*alignf)(void *, struct resource *, resource_size_t,
-                                resource_size_t),
+                resource_size_t (*alignf)(void *,
+                                          const struct resource *,
+                                          resource_size_t,
+                                          resource_size_t),
                 void *alignf_data)
 {
         int i, ret = -ENOMEM;
+        struct resource *r;
         resource_size_t max = -1;
 
         type_mask |= IORESOURCE_IO | IORESOURCE_MEM;
@@ -49,8 +99,7 @@ pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res,
         if (!(res->flags & IORESOURCE_MEM_64))
                 max = PCIBIOS_MAX_MEM_32;
 
-        for (i = 0; i < PCI_BUS_NUM_RESOURCES; i++) {
-                struct resource *r = bus->resource[i];
+        pci_bus_for_each_resource(bus, r, i) {
                 if (!r)
                         continue;
 
@@ -240,9 +289,9 @@ void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *),
                         next = dev->bus_list.next;
 
                 /* Run device routines with the device locked */
-                down(&dev->dev.sem);
+                device_lock(&dev->dev);
                 retval = cb(dev, userdata);
-                up(&dev->dev.sem);
+                device_unlock(&dev->dev);
                 if (retval)
                         break;
         }
diff --git a/drivers/pci/dmar.c b/drivers/pci/dmar.c
index b952ebc7a78b..33ead97f0c4b 100644
--- a/drivers/pci/dmar.c
+++ b/drivers/pci/dmar.c
@@ -35,6 +35,7 @@
 #include <linux/interrupt.h>
 #include <linux/tboot.h>
 #include <linux/dmi.h>
+#include <linux/slab.h>
 
 #define PREFIX "DMAR: "
 
@@ -320,7 +321,7 @@ found:
         for (bus = dev->bus; bus; bus = bus->parent) {
                 struct pci_dev *bridge = bus->self;
 
-                if (!bridge || !bridge->is_pcie ||
+                if (!bridge || !pci_is_pcie(bridge) ||
                     bridge->pcie_type == PCI_EXP_TYPE_PCI_BRIDGE)
                         return 0;
 
@@ -339,6 +340,35 @@ found:
 }
 #endif
 
+#ifdef CONFIG_ACPI_NUMA
+static int __init
+dmar_parse_one_rhsa(struct acpi_dmar_header *header)
+{
+        struct acpi_dmar_rhsa *rhsa;
+        struct dmar_drhd_unit *drhd;
+
+        rhsa = (struct acpi_dmar_rhsa *)header;
+        for_each_drhd_unit(drhd) {
+                if (drhd->reg_base_addr == rhsa->base_address) {
+                        int node = acpi_map_pxm_to_node(rhsa->proximity_domain);
+
+                        if (!node_online(node))
+                                node = -1;
+                        drhd->iommu->node = node;
+                        return 0;
+                }
+        }
+        WARN(1, "Your BIOS is broken; RHSA refers to non-existent DMAR unit at %llx\n"
+             "BIOS vendor: %s; Ver: %s; Product Version: %s\n",
+             drhd->reg_base_addr,
+             dmi_get_system_info(DMI_BIOS_VENDOR),
+             dmi_get_system_info(DMI_BIOS_VERSION),
+             dmi_get_system_info(DMI_PRODUCT_VERSION));
+
+        return 0;
+}
+#endif
+
 static void __init
 dmar_table_print_dmar_entry(struct acpi_dmar_header *header)
 {
@@ -458,7 +488,9 @@ parse_dmar_table(void)
 #endif
                         break;
                 case ACPI_DMAR_HARDWARE_AFFINITY:
-                        /* We don't do anything with RHSA (yet?) */
+#ifdef CONFIG_ACPI_NUMA
+                        ret = dmar_parse_one_rhsa(entry_header);
+#endif
                         break;
                 default:
                         printk(KERN_WARNING PREFIX
@@ -582,6 +614,8 @@ int __init dmar_table_init(void)
         return 0;
 }
 
+static int bios_warned;
+
 int __init check_zero_address(void)
 {
         struct acpi_table_dmar *dmar;
@@ -601,6 +635,9 @@ int __init check_zero_address(void)
                 }
 
                 if (entry_header->type == ACPI_DMAR_TYPE_HARDWARE_UNIT) {
+                        void __iomem *addr;
+                        u64 cap, ecap;
+
                         drhd = (void *)entry_header;
                         if (!drhd->address) {
                                 /* Promote an attitude of violence to a BIOS engineer today */
@@ -609,17 +646,40 @@ int __init check_zero_address(void)
                                      dmi_get_system_info(DMI_BIOS_VENDOR),
                                      dmi_get_system_info(DMI_BIOS_VERSION),
                                      dmi_get_system_info(DMI_PRODUCT_VERSION));
-#ifdef CONFIG_DMAR
-                                dmar_disabled = 1;
-#endif
-                                return 0;
+                                bios_warned = 1;
+                                goto failed;
+                        }
+
+                        addr = early_ioremap(drhd->address, VTD_PAGE_SIZE);
+                        if (!addr ) {
+                                printk("IOMMU: can't validate: %llx\n", drhd->address);
+                                goto failed;
+                        }
+                        cap = dmar_readq(addr + DMAR_CAP_REG);
+                        ecap = dmar_readq(addr + DMAR_ECAP_REG);
+                        early_iounmap(addr, VTD_PAGE_SIZE);
+                        if (cap == (uint64_t)-1 && ecap == (uint64_t)-1) {
+                                /* Promote an attitude of violence to a BIOS engineer today */
+                                WARN(1, "Your BIOS is broken; DMAR reported at address %llx returns all ones!\n"
+                                     "BIOS vendor: %s; Ver: %s; Product Version: %s\n",
+                                      drhd->address,
+                                      dmi_get_system_info(DMI_BIOS_VENDOR),
+                                      dmi_get_system_info(DMI_BIOS_VERSION),
+                                      dmi_get_system_info(DMI_PRODUCT_VERSION));
+                                bios_warned = 1;
+                                goto failed;
                         }
-                        break;
                 }
 
                 entry_header = ((void *)entry_header + entry_header->length);
         }
         return 1;
+
+failed:
+#ifdef CONFIG_DMAR
+        dmar_disabled = 1;
+#endif
+        return 0;
 }
 
 void __init detect_intel_iommu(void)
@@ -645,9 +705,15 @@ void __init detect_intel_iommu(void)
                                "x2apic and Intr-remapping.\n");
 #endif
 #ifdef CONFIG_DMAR
-                if (ret && !no_iommu && !iommu_detected && !swiotlb &&
-                    !dmar_disabled)
+                if (ret && !no_iommu && !iommu_detected && !dmar_disabled) {
                         iommu_detected = 1;
+                        /* Make sure ACS will be enabled */
+                        pci_request_acs();
+                }
+#endif
+#ifdef CONFIG_X86
+                if (ret)
+                        x86_init.iommu.iommu_init = intel_iommu_init;
 #endif
         }
         early_acpi_os_unmap_memory(dmar_tbl, dmar_tbl_size);
@@ -664,6 +730,18 @@ int alloc_iommu(struct dmar_drhd_unit *drhd)
         int agaw = 0;
         int msagaw = 0;
 
+        if (!drhd->reg_base_addr) {
+                if (!bios_warned) {
+                        WARN(1, "Your BIOS is broken; DMAR reported at address zero!\n"
+                             "BIOS vendor: %s; Ver: %s; Product Version: %s\n",
+                             dmi_get_system_info(DMI_BIOS_VENDOR),
+                             dmi_get_system_info(DMI_BIOS_VERSION),
+                             dmi_get_system_info(DMI_PRODUCT_VERSION));
+                        bios_warned = 1;
+                }
+                return -EINVAL;
+        }
+
         iommu = kzalloc(sizeof(*iommu), GFP_KERNEL);
         if (!iommu)
                 return -ENOMEM;
@@ -680,13 +758,16 @@ int alloc_iommu(struct dmar_drhd_unit *drhd)
         iommu->ecap = dmar_readq(iommu->reg + DMAR_ECAP_REG);
 
         if (iommu->cap == (uint64_t)-1 && iommu->ecap == (uint64_t)-1) {
-                /* Promote an attitude of violence to a BIOS engineer today */
-                WARN(1, "Your BIOS is broken; DMAR reported at address %llx returns all ones!\n"
-                     "BIOS vendor: %s; Ver: %s; Product Version: %s\n",
-                     drhd->reg_base_addr,
-                     dmi_get_system_info(DMI_BIOS_VENDOR),
-                     dmi_get_system_info(DMI_BIOS_VERSION),
-                     dmi_get_system_info(DMI_PRODUCT_VERSION));
+                if (!bios_warned) {
+                        /* Promote an attitude of violence to a BIOS engineer today */
+                        WARN(1, "Your BIOS is broken; DMAR reported at address %llx returns all ones!\n"
+                             "BIOS vendor: %s; Ver: %s; Product Version: %s\n",
+                             drhd->reg_base_addr,
+                             dmi_get_system_info(DMI_BIOS_VENDOR),
+                             dmi_get_system_info(DMI_BIOS_VERSION),
+                             dmi_get_system_info(DMI_PRODUCT_VERSION));
+                        bios_warned = 1;
+                }
                 goto err_unmap;
         }
 
@@ -709,6 +790,8 @@ int alloc_iommu(struct dmar_drhd_unit *drhd)
         iommu->agaw = agaw;
         iommu->msagaw = msagaw;
 
+        iommu->node = -1;
+
         /* the registers might be more than one page */
         map_size = max_t(int, ecap_max_iotlb_offset(iommu->ecap),
                 cap_max_fault_reg_offset(iommu->cap));
@@ -1050,6 +1133,7 @@ static void __dmar_enable_qi(struct intel_iommu *iommu)
 int dmar_enable_qi(struct intel_iommu *iommu)
 {
         struct q_inval *qi;
+        struct page *desc_page;
 
         if (!ecap_qis(iommu->ecap))
                 return -ENOENT;
@@ -1066,13 +1150,16 @@ int dmar_enable_qi(struct intel_iommu *iommu)
 
         qi = iommu->qi;
 
-        qi->desc = (void *)(get_zeroed_page(GFP_ATOMIC));
-        if (!qi->desc) {
+
+        desc_page = alloc_pages_node(iommu->node, GFP_ATOMIC | __GFP_ZERO, 0);
+        if (!desc_page) {
                 kfree(qi);
                 iommu->qi = 0;
                 return -ENOMEM;
         }
 
+        qi->desc = page_address(desc_page);
+
         qi->desc_status = kmalloc(QI_LENGTH * sizeof(int), GFP_ATOMIC);
         if (!qi->desc_status) {
                 free_page((unsigned long) qi->desc);
diff --git a/drivers/pci/hotplug/Makefile b/drivers/pci/hotplug/Makefile
index 3625b094bf7e..6cd9f3c9887d 100644
--- a/drivers/pci/hotplug/Makefile
+++ b/drivers/pci/hotplug/Makefile
@@ -6,18 +6,22 @@ obj-$(CONFIG_HOTPLUG_PCI)		+= pci_hotplug.o
 obj-$(CONFIG_HOTPLUG_PCI_COMPAQ)        += cpqphp.o
 obj-$(CONFIG_HOTPLUG_PCI_IBM)           += ibmphp.o
 
-# pciehp should be linked before acpiphp in order to allow the native driver
-# to attempt to bind first. We can then fall back to generic support.
+# native drivers should be linked before acpiphp in order to allow the
+# native driver to attempt to bind first. We can then fall back to
+# generic support.
 
 obj-$(CONFIG_HOTPLUG_PCI_PCIE)          += pciehp.o
-obj-$(CONFIG_HOTPLUG_PCI_ACPI)          += acpiphp.o
-obj-$(CONFIG_HOTPLUG_PCI_ACPI_IBM)      += acpiphp_ibm.o
 obj-$(CONFIG_HOTPLUG_PCI_CPCI_ZT5550)   += cpcihp_zt5550.o
 obj-$(CONFIG_HOTPLUG_PCI_CPCI_GENERIC)  += cpcihp_generic.o
 obj-$(CONFIG_HOTPLUG_PCI_SHPC)          += shpchp.o
 obj-$(CONFIG_HOTPLUG_PCI_RPA)           += rpaphp.o
 obj-$(CONFIG_HOTPLUG_PCI_RPA_DLPAR)     += rpadlpar_io.o
 obj-$(CONFIG_HOTPLUG_PCI_SGI)           += sgi_hotplug.o
+obj-$(CONFIG_HOTPLUG_PCI_ACPI)          += acpiphp.o
+
+# acpiphp_ibm extends acpiphp, so should be linked afterwards.
+
+obj-$(CONFIG_HOTPLUG_PCI_ACPI_IBM)      += acpiphp_ibm.o
 
 # Link this last so it doesn't claim devices that have a real hotplug driver
 obj-$(CONFIG_HOTPLUG_PCI_FAKE)          += fakephp.o
diff --git a/drivers/pci/hotplug/acpi_pcihp.c b/drivers/pci/hotplug/acpi_pcihp.c
index a73028ec52e5..45fcc1e96df9 100644
--- a/drivers/pci/hotplug/acpi_pcihp.c
+++ b/drivers/pci/hotplug/acpi_pcihp.c
@@ -32,6 +32,7 @@
 #include <linux/pci_hotplug.h>
 #include <linux/acpi.h>
 #include <linux/pci-acpi.h>
+#include <linux/slab.h>
 
 #define MY_NAME "acpi_pcihp"
 
@@ -362,6 +363,8 @@ int acpi_get_hp_hw_control_from_firmware(struct pci_dev *pdev, u32 flags)
                 status = acpi_pci_osc_control_set(handle, flags);
                 if (ACPI_SUCCESS(status))
                         goto got_one;
+                if (status == AE_SUPPORT)
+                        goto no_control;
                 kfree(string.pointer);
                 string = (struct acpi_buffer){ ACPI_ALLOCATE_BUFFER, NULL };
         }
@@ -394,10 +397,9 @@ int acpi_get_hp_hw_control_from_firmware(struct pci_dev *pdev, u32 flags)
                 if (ACPI_FAILURE(status))
                         break;
         }
-
+no_control:
         dbg("Cannot get control of hotplug hardware for pci %s\n",
             pci_name(pdev));
-
         kfree(string.pointer);
         return -ENODEV;
 got_one:
@@ -471,7 +473,7 @@ int acpi_pci_detect_ejectable(acpi_handle handle)
                 return found;
 
         acpi_walk_namespace(ACPI_TYPE_DEVICE, handle, 1,
-                            check_hotplug, (void *)&found, NULL);
+                            check_hotplug, NULL, (void *)&found, NULL);
         return found;
 }
 EXPORT_SYMBOL_GPL(acpi_pci_detect_ejectable);
diff --git a/drivers/pci/hotplug/acpiphp.h b/drivers/pci/hotplug/acpiphp.h
index 7d938df79206..bab52047baa8 100644
--- a/drivers/pci/hotplug/acpiphp.h
+++ b/drivers/pci/hotplug/acpiphp.h
@@ -146,12 +146,6 @@ struct acpiphp_attention_info
         struct module *owner;
 };
 
-struct acpiphp_ioapic {
-        struct pci_dev *dev;
-        u32 gsi_base;
-        struct list_head list;
-};
-
 /* PCI bus bridge HID */
 #define ACPI_PCI_HOST_HID               "PNP0A03"
 
diff --git a/drivers/pci/hotplug/acpiphp_core.c b/drivers/pci/hotplug/acpiphp_core.c
index 4dd7114964ac..efa9f2de51c1 100644
--- a/drivers/pci/hotplug/acpiphp_core.c
+++ b/drivers/pci/hotplug/acpiphp_core.c
@@ -332,8 +332,6 @@ int acpiphp_register_hotplug_slot(struct acpiphp_slot *acpiphp_slot)
         slot->hotplug_slot->info->attention_status = 0;
         slot->hotplug_slot->info->latch_status = acpiphp_get_latch_status(slot->acpi_slot);
         slot->hotplug_slot->info->adapter_status = acpiphp_get_adapter_status(slot->acpi_slot);
-        slot->hotplug_slot->info->max_bus_speed = PCI_SPEED_UNKNOWN;
-        slot->hotplug_slot->info->cur_bus_speed = PCI_SPEED_UNKNOWN;
 
         acpiphp_slot->slot = slot;
         snprintf(name, SLOT_NAME_SIZE, "%llu", slot->acpi_slot->sun);
diff --git a/drivers/pci/hotplug/acpiphp_glue.c b/drivers/pci/hotplug/acpiphp_glue.c
index 58d25a163a8b..cb23aa2ebf96 100644
--- a/drivers/pci/hotplug/acpiphp_glue.c
+++ b/drivers/pci/hotplug/acpiphp_glue.c
@@ -47,13 +47,12 @@
 #include <linux/pci_hotplug.h>
 #include <linux/pci-acpi.h>
 #include <linux/mutex.h>
+#include <linux/slab.h>
 
 #include "../pci.h"
 #include "acpiphp.h"
 
 static LIST_HEAD(bridge_list);
-static LIST_HEAD(ioapic_list);
-static DEFINE_SPINLOCK(ioapic_list_lock);
 
 #define MY_NAME "acpiphp_glue"
 
@@ -266,7 +265,7 @@ static int detect_ejectable_slots(acpi_handle handle)
         int found = acpi_pci_detect_ejectable(handle);
         if (!found) {
                 acpi_walk_namespace(ACPI_TYPE_DEVICE, handle, (u32)1,
-                                    is_pci_dock_device, (void *)&found, NULL);
+                                    is_pci_dock_device, NULL, (void *)&found, NULL);
         }
         return found;
 }
@@ -281,7 +280,7 @@ static void init_bridge_misc(struct acpiphp_bridge *bridge)
 
         /* register all slot objects under this bridge */
         status = acpi_walk_namespace(ACPI_TYPE_DEVICE, bridge->handle, (u32)1,
-                                     register_slot, bridge, NULL);
+                                     register_slot, NULL, bridge, NULL);
         if (ACPI_FAILURE(status)) {
                 list_del(&bridge->list);
                 return;
@@ -311,17 +310,13 @@ static void init_bridge_misc(struct acpiphp_bridge *bridge)
 /* find acpiphp_func from acpiphp_bridge */
 static struct acpiphp_func *acpiphp_bridge_handle_to_function(acpi_handle handle)
 {
-        struct list_head *node, *l;
         struct acpiphp_bridge *bridge;
         struct acpiphp_slot *slot;
         struct acpiphp_func *func;
 
-        list_for_each(node, &bridge_list) {
-                bridge = list_entry(node, struct acpiphp_bridge, list);
+        list_for_each_entry(bridge, &bridge_list, list) {
                 for (slot = bridge->slots; slot; slot = slot->next) {
-                        list_for_each(l, &slot->funcs) {
-                                func = list_entry(l, struct acpiphp_func,
-                                                        sibling);
+                        list_for_each_entry(func, &slot->funcs, sibling) {
                                 if (func->handle == handle)
                                         return func;
                         }
@@ -447,7 +442,7 @@ find_p2p_bridge(acpi_handle handle, u32 lvl, void *context, void **rv)
 
         /* search P2P bridges under this p2p bridge */
         status = acpi_walk_namespace(ACPI_TYPE_DEVICE, handle, (u32)1,
-                                     find_p2p_bridge, NULL, NULL);
+                                     find_p2p_bridge, NULL, NULL, NULL);
         if (ACPI_FAILURE(status))
                 warn("find_p2p_bridge failed (error code = 0x%x)\n", status);
 
@@ -485,7 +480,7 @@ static int add_bridge(acpi_handle handle)
 
         /* search P2P bridges under this host bridge */
         status = acpi_walk_namespace(ACPI_TYPE_DEVICE, handle, (u32)1,
-                                     find_p2p_bridge, NULL, NULL);
+                                     find_p2p_bridge, NULL, NULL, NULL);
 
         if (ACPI_FAILURE(status))
                 warn("find_p2p_bridge failed (error code = 0x%x)\n", status);
@@ -495,21 +490,19 @@ static int add_bridge(acpi_handle handle)
 
 static struct acpiphp_bridge *acpiphp_handle_to_bridge(acpi_handle handle)
 {
-        struct list_head *head;
-        list_for_each(head, &bridge_list) {
-                struct acpiphp_bridge *bridge = list_entry(head,
-                                                struct acpiphp_bridge, list);
+        struct acpiphp_bridge *bridge;
+
+        list_for_each_entry(bridge, &bridge_list, list)
                 if (bridge->handle == handle)
                         return bridge;
-        }
 
         return NULL;
 }
 
 static void cleanup_bridge(struct acpiphp_bridge *bridge)
 {
-        struct list_head *list, *tmp;
-        struct acpiphp_slot *slot;
+        struct acpiphp_slot *slot, *next;
+        struct acpiphp_func *func, *tmp;
         acpi_status status;
         acpi_handle handle = bridge->handle;
 
@@ -530,10 +523,8 @@ static void cleanup_bridge(struct acpiphp_bridge *bridge)
 
         slot = bridge->slots;
         while (slot) {
-                struct acpiphp_slot *next = slot->next;
-                list_for_each_safe (list, tmp, &slot->funcs) {
-                        struct acpiphp_func *func;
-                        func = list_entry(list, struct acpiphp_func, sibling);
+                next = slot->next;
+                list_for_each_entry_safe(func, tmp, &slot->funcs, sibling) {
                         if (is_dock_device(func->handle)) {
                                 unregister_hotplug_dock_device(func->handle);
                                 unregister_dock_notifier(&func->nb);
@@ -545,7 +536,7 @@ static void cleanup_bridge(struct acpiphp_bridge *bridge)
                                 if (ACPI_FAILURE(status))
                                         err("failed to remove notify handler\n");
                         }
-                        list_del(list);
+                        list_del(&func->sibling);
                         kfree(func);
                 }
                 acpiphp_unregister_hotplug_slot(slot);
@@ -573,7 +564,7 @@ cleanup_p2p_bridge(acpi_handle handle, u32 lvl, void *context, void **rv)
         /* cleanup p2p bridges under this P2P bridge
            in a depth-first manner */
         acpi_walk_namespace(ACPI_TYPE_DEVICE, handle, (u32)1,
-                                cleanup_p2p_bridge, NULL, NULL);
+                                cleanup_p2p_bridge, NULL, NULL, NULL);
 
         bridge = acpiphp_handle_to_bridge(handle);
         if (bridge)
@@ -589,7 +580,7 @@ static void remove_bridge(acpi_handle handle)
         /* cleanup p2p bridges under this host bridge
            in a depth-first manner */
         acpi_walk_namespace(ACPI_TYPE_DEVICE, handle,
-                                (u32)1, cleanup_p2p_bridge, NULL, NULL);
+                                (u32)1, cleanup_p2p_bridge, NULL, NULL, NULL);
 
         /*
          * On root bridges with hotplug slots directly underneath (ie,
@@ -606,204 +597,17 @@ static void remove_bridge(acpi_handle handle)
                                            handle_hotplug_event_bridge);
 }
 
-static struct pci_dev * get_apic_pci_info(acpi_handle handle)
-{
-        struct pci_dev *dev;
-
-        dev = acpi_get_pci_dev(handle);
-        if (!dev)
-                return NULL;
-
-        if ((dev->class != PCI_CLASS_SYSTEM_PIC_IOAPIC) &&
-            (dev->class != PCI_CLASS_SYSTEM_PIC_IOXAPIC))
-        {
-                pci_dev_put(dev);
-                return NULL;
-        }
-
-        return dev;
-}
-
-static int get_gsi_base(acpi_handle handle, u32 *gsi_base)
-{
-        acpi_status status;
-        int result = -1;
-        unsigned long long gsb;
-        struct acpi_buffer buffer = {ACPI_ALLOCATE_BUFFER, NULL};
-        union acpi_object *obj;
-        void *table;
-
-        status = acpi_evaluate_integer(handle, "_GSB", NULL, &gsb);
-        if (ACPI_SUCCESS(status)) {
-                *gsi_base = (u32)gsb;
-                return 0;
-        }
-
-        status = acpi_evaluate_object(handle, "_MAT", NULL, &buffer);
-        if (ACPI_FAILURE(status) || !buffer.length || !buffer.pointer)
-                return -1;
-
-        obj = buffer.pointer;
-        if (obj->type != ACPI_TYPE_BUFFER)
-                goto out;
-
-        table = obj->buffer.pointer;
-        switch (((struct acpi_subtable_header *)table)->type) {
-        case ACPI_MADT_TYPE_IO_SAPIC:
-                *gsi_base = ((struct acpi_madt_io_sapic *)table)->global_irq_base;
-                result = 0;
-                break;
-        case ACPI_MADT_TYPE_IO_APIC:
-                *gsi_base = ((struct acpi_madt_io_apic *)table)->global_irq_base;
-                result = 0;
-                break;
-        default:
-                break;
-        }
- out:
-        kfree(buffer.pointer);
-        return result;
-}
-
-static acpi_status
-ioapic_add(acpi_handle handle, u32 lvl, void *context, void **rv)
-{
-        acpi_status status;
-        unsigned long long sta;
-        acpi_handle tmp;
-        struct pci_dev *pdev;
-        u32 gsi_base;
-        u64 phys_addr;
-        struct acpiphp_ioapic *ioapic;
-
-        /* Evaluate _STA if present */
-        status = acpi_evaluate_integer(handle, "_STA", NULL, &sta);
-        if (ACPI_SUCCESS(status) && sta != ACPI_STA_ALL)
-                return AE_CTRL_DEPTH;
-
-        /* Scan only PCI bus scope */
-        status = acpi_get_handle(handle, "_HID", &tmp);
-        if (ACPI_SUCCESS(status))
-                return AE_CTRL_DEPTH;
-
-        if (get_gsi_base(handle, &gsi_base))
-                return AE_OK;
-
-        ioapic = kmalloc(sizeof(*ioapic), GFP_KERNEL);
-        if (!ioapic)
-                return AE_NO_MEMORY;
-
-        pdev = get_apic_pci_info(handle);
-        if (!pdev)
-                goto exit_kfree;
-
-        if (pci_enable_device(pdev))
-                goto exit_pci_dev_put;
-
-        pci_set_master(pdev);
-
-        if (pci_request_region(pdev, 0, "I/O APIC(acpiphp)"))
-                goto exit_pci_disable_device;
-
-        phys_addr = pci_resource_start(pdev, 0);
-        if (acpi_register_ioapic(handle, phys_addr, gsi_base))
-                goto exit_pci_release_region;
-
-        ioapic->gsi_base = gsi_base;
-        ioapic->dev = pdev;
-        spin_lock(&ioapic_list_lock);
-        list_add_tail(&ioapic->list, &ioapic_list);
-        spin_unlock(&ioapic_list_lock);
-
-        return AE_OK;
-
- exit_pci_release_region:
-        pci_release_region(pdev, 0);
- exit_pci_disable_device:
-        pci_disable_device(pdev);
- exit_pci_dev_put:
-        pci_dev_put(pdev);
- exit_kfree:
-        kfree(ioapic);
-
-        return AE_OK;
-}
-
-static acpi_status
-ioapic_remove(acpi_handle handle, u32 lvl, void *context, void **rv)
-{
-        acpi_status status;
-        unsigned long long sta;
-        acpi_handle tmp;
-        u32 gsi_base;
-        struct acpiphp_ioapic *pos, *n, *ioapic = NULL;
-
-        /* Evaluate _STA if present */
-        status = acpi_evaluate_integer(handle, "_STA", NULL, &sta);
-        if (ACPI_SUCCESS(status) && sta != ACPI_STA_ALL)
-                return AE_CTRL_DEPTH;
-
-        /* Scan only PCI bus scope */
-        status = acpi_get_handle(handle, "_HID", &tmp);
-        if (ACPI_SUCCESS(status))
-                return AE_CTRL_DEPTH;
-
-        if (get_gsi_base(handle, &gsi_base))
-                return AE_OK;
-
-        acpi_unregister_ioapic(handle, gsi_base);
-
-        spin_lock(&ioapic_list_lock);
-        list_for_each_entry_safe(pos, n, &ioapic_list, list) {
-                if (pos->gsi_base != gsi_base)
-                        continue;
-                ioapic = pos;
-                list_del(&ioapic->list);
-                break;
-        }
-        spin_unlock(&ioapic_list_lock);
-
-        if (!ioapic)
-                return AE_OK;
-
-        pci_release_region(ioapic->dev, 0);
-        pci_disable_device(ioapic->dev);
-        pci_dev_put(ioapic->dev);
-        kfree(ioapic);
-
-        return AE_OK;
-}
-
-static int acpiphp_configure_ioapics(acpi_handle handle)
-{
-        ioapic_add(handle, 0, NULL, NULL);
-        acpi_walk_namespace(ACPI_TYPE_DEVICE, handle,
-                            ACPI_UINT32_MAX, ioapic_add, NULL, NULL);
-        return 0;
-}
-
-static int acpiphp_unconfigure_ioapics(acpi_handle handle)
-{
-        ioapic_remove(handle, 0, NULL, NULL);
-        acpi_walk_namespace(ACPI_TYPE_DEVICE, handle,
-                            ACPI_UINT32_MAX, ioapic_remove, NULL, NULL);
-        return 0;
-}
-
 static int power_on_slot(struct acpiphp_slot *slot)
 {
         acpi_status status;
         struct acpiphp_func *func;
-        struct list_head *l;
         int retval = 0;
 
         /* if already enabled, just skip */
         if (slot->flags & SLOT_POWEREDON)
                 goto err_exit;
 
-        list_for_each (l, &slot->funcs) {
-                func = list_entry(l, struct acpiphp_func, sibling);
-
+        list_for_each_entry(func, &slot->funcs, sibling) {
                 if (func->flags & FUNC_HAS_PS0) {
                         dbg("%s: executing _PS0\n", __func__);
                         status = acpi_evaluate_object(func->handle, "_PS0", NULL, NULL);
@@ -829,7 +633,6 @@ static int power_off_slot(struct acpiphp_slot *slot)
 {
         acpi_status status;
         struct acpiphp_func *func;
-        struct list_head *l;
 
         int retval = 0;
 
@@ -837,9 +640,7 @@ static int power_off_slot(struct acpiphp_slot *slot)
         if ((slot->flags & SLOT_POWEREDON) == 0)
                 goto err_exit;
 
-        list_for_each (l, &slot->funcs) {
-                func = list_entry(l, struct acpiphp_func, sibling);
-
+        list_for_each_entry(func, &slot->funcs, sibling) {
                 if (func->flags & FUNC_HAS_PS3) {
                         status = acpi_evaluate_object(func->handle, "_PS3", NULL, NULL);
                         if (ACPI_FAILURE(status)) {
@@ -920,12 +721,6 @@ static int acpiphp_bus_add(struct acpiphp_func *func)
                         -ret_val);
                 goto acpiphp_bus_add_out;
         }
-        /*
-         * try to start anyway.  We could have failed to add
-         * simply because this bus had previously been added
-         * on another add.  Don't bother with the return value
-         * we just keep going.
-         */
         ret_val = acpi_bus_start(device);
 
 acpiphp_bus_add_out:
@@ -955,6 +750,24 @@ static int acpiphp_bus_trim(acpi_handle handle)
         return retval;
 }
 
+static void acpiphp_set_acpi_region(struct acpiphp_slot *slot)
+{
+        struct acpiphp_func *func;
+        union acpi_object params[2];
+        struct acpi_object_list arg_list;
+
+        list_for_each_entry(func, &slot->funcs, sibling) {
+                arg_list.count = 2;
+                arg_list.pointer = params;
+                params[0].type = ACPI_TYPE_INTEGER;
+                params[0].integer.value = ACPI_ADR_SPACE_PCI_CONFIG;
+                params[1].type = ACPI_TYPE_INTEGER;
+                params[1].integer.value = 1;
+                /* _REG is optional, we don't care about if there is failure */
+                acpi_evaluate_object(func->handle, "_REG", &arg_list, NULL);
+        }
+}
+
 /**
  * enable_device - enable, configure a slot
  * @slot: slot to be enabled
@@ -966,7 +779,6 @@ static int __ref enable_device(struct acpiphp_slot *slot)
 {
         struct pci_dev *dev;
         struct pci_bus *bus = slot->bridge->pci_bus;
-        struct list_head *l;
         struct acpiphp_func *func;
         int retval = 0;
         int num, max, pass;
@@ -1006,21 +818,17 @@ static int __ref enable_device(struct acpiphp_slot *slot)
                 }
         }
 
-        list_for_each (l, &slot->funcs) {
-                func = list_entry(l, struct acpiphp_func, sibling);
+        list_for_each_entry(func, &slot->funcs, sibling)
                 acpiphp_bus_add(func);
-        }
 
         pci_bus_assign_resources(bus);
         acpiphp_sanitize_bus(bus);
         acpiphp_set_hpp_values(bus);
-        list_for_each_entry(func, &slot->funcs, sibling)
-                acpiphp_configure_ioapics(func->handle);
+        acpiphp_set_acpi_region(slot);
         pci_enable_bridges(bus);
         pci_bus_add_devices(bus);
 
-        list_for_each (l, &slot->funcs) {
-                func = list_entry(l, struct acpiphp_func, sibling);
+        list_for_each_entry(func, &slot->funcs, sibling) {
                 dev = pci_get_slot(bus, PCI_DEVFN(slot->device,
                                                   func->function));
                 if (!dev)
@@ -1091,7 +899,6 @@ static int disable_device(struct acpiphp_slot *slot)
         }
 
         list_for_each_entry(func, &slot->funcs, sibling) {
-                acpiphp_unconfigure_ioapics(func->handle);
                 acpiphp_bus_trim(func->handle);
         }
 
@@ -1119,12 +926,9 @@ static unsigned int get_slot_status(struct acpiphp_slot *slot)
         acpi_status status;
         unsigned long long sta = 0;
         u32 dvid;
-        struct list_head *l;
         struct acpiphp_func *func;
 
-        list_for_each (l, &slot->funcs) {
-                func = list_entry(l, struct acpiphp_func, sibling);
-
+        list_for_each_entry(func, &slot->funcs, sibling) {
                 if (func->flags & FUNC_HAS_STA) {
                         status = acpi_evaluate_integer(func->handle, "_STA", NULL, &sta);
                         if (ACPI_SUCCESS(status) && sta)
@@ -1152,13 +956,10 @@ int acpiphp_eject_slot(struct acpiphp_slot *slot)
 {
         acpi_status status;
         struct acpiphp_func *func;
-        struct list_head *l;
         struct acpi_object_list arg_list;
         union acpi_object arg;
 
-        list_for_each (l, &slot->funcs) {
-                func = list_entry(l, struct acpiphp_func, sibling);
-
+        list_for_each_entry(func, &slot->funcs, sibling) {
                 /* We don't want to call _EJ0 on non-existing functions. */
                 if ((func->flags & FUNC_HAS_EJ0)) {
                         /* _EJ0 method take one argument */
@@ -1275,7 +1076,6 @@ static int acpiphp_configure_bridge (acpi_handle handle)
         acpiphp_sanitize_bus(bus);
         acpiphp_set_hpp_values(bus);
         pci_enable_bridges(bus);
-        acpiphp_configure_ioapics(handle);
         return 0;
 }
 
@@ -1367,7 +1167,7 @@ static void handle_hotplug_event_bridge(acpi_handle handle, u32 type, void *cont
         bridge = acpiphp_handle_to_bridge(handle);
         if (type == ACPI_NOTIFY_BUS_CHECK) {
                 acpi_walk_namespace(ACPI_TYPE_DEVICE, handle, ACPI_UINT32_MAX,
-                        count_sub_bridges, &num_sub_bridges, NULL);
+                        count_sub_bridges, NULL, &num_sub_bridges, NULL);
         }
 
         if (!bridge && !num_sub_bridges) {
@@ -1388,7 +1188,7 @@ static void handle_hotplug_event_bridge(acpi_handle handle, u32 type, void *cont
                 }
                 if (num_sub_bridges)
                         acpi_walk_namespace(ACPI_TYPE_DEVICE, handle,
-                                ACPI_UINT32_MAX, check_sub_bridges, NULL, NULL);
+                                ACPI_UINT32_MAX, check_sub_bridges, NULL, NULL, NULL);
                 break;
 
         case ACPI_NOTIFY_DEVICE_CHECK:
@@ -1512,7 +1312,7 @@ int __init acpiphp_glue_init(void)
         int num = 0;
 
         acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT,
-                        ACPI_UINT32_MAX, find_root_bridges, &num, NULL);
+                        ACPI_UINT32_MAX, find_root_bridges, NULL, &num, NULL);
 
         if (num <= 0)
                 return -1;
@@ -1542,7 +1342,7 @@ int __init acpiphp_get_num_slots(void)
         struct acpiphp_bridge *bridge;
         int num_slots = 0;
 
-        list_for_each_entry (bridge, &bridge_list, list) {
+        list_for_each_entry(bridge, &bridge_list, list) {
                 dbg("Bus %04x:%02x has %d slot%s\n",
                                 pci_domain_nr(bridge->pci_bus),
                                 bridge->pci_bus->number, bridge->nr_slots,
diff --git a/drivers/pci/hotplug/acpiphp_ibm.c b/drivers/pci/hotplug/acpiphp_ibm.c
index e7be66dbac21..6ecbfb27db9d 100644
--- a/drivers/pci/hotplug/acpiphp_ibm.c
+++ b/drivers/pci/hotplug/acpiphp_ibm.c
@@ -26,6 +26,7 @@
  */
 
 #include <linux/init.h>
+#include <linux/slab.h>
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <acpi/acpi_bus.h>
@@ -434,7 +435,7 @@ static int __init ibm_acpiphp_init(void)
         dbg("%s\n", __func__);
 
         if (acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT,
-                        ACPI_UINT32_MAX, ibm_find_acpi_device,
+                        ACPI_UINT32_MAX, ibm_find_acpi_device, NULL,
                         &ibm_acpi_handle, NULL) != FOUND_APCI) {
                 err("%s: acpi_walk_namespace failed\n", __func__);
                 retval = -ENODEV;
diff --git a/drivers/pci/hotplug/cpcihp_generic.c b/drivers/pci/hotplug/cpcihp_generic.c
index 148fb463b81c..fb3f84661bdc 100644
--- a/drivers/pci/hotplug/cpcihp_generic.c
+++ b/drivers/pci/hotplug/cpcihp_generic.c
@@ -162,6 +162,7 @@ static int __init cpcihp_generic_init(void)
         dev = pci_get_slot(bus, PCI_DEVFN(bridge_slot, 0));
         if(!dev || dev->hdr_type != PCI_HEADER_TYPE_BRIDGE) {
                 err("Invalid bridge device %s", bridge);
+                pci_dev_put(dev);
                 return -EINVAL;
         }
         bus = dev->subordinate;
diff --git a/drivers/pci/hotplug/cpqphp.h b/drivers/pci/hotplug/cpqphp.h
index 9c6a9fd26812..d8ffc7366801 100644
--- a/drivers/pci/hotplug/cpqphp.h
+++ b/drivers/pci/hotplug/cpqphp.h
@@ -310,8 +310,6 @@ struct controller {
         u8 first_slot;
         u8 add_support;
         u8 push_flag;
-        enum pci_bus_speed speed;
-        enum pci_bus_speed speed_capability;
         u8 push_button;                 /* 0 = no pushbutton, 1 = pushbutton present */
         u8 slot_switch_type;            /* 0 = no switch, 1 = switch present */
         u8 defeature_PHP;               /* 0 = PHP not supported, 1 = PHP supported */
diff --git a/drivers/pci/hotplug/cpqphp_core.c b/drivers/pci/hotplug/cpqphp_core.c
index 075b4f4b6e0d..f184d1d2ecbe 100644
--- a/drivers/pci/hotplug/cpqphp_core.c
+++ b/drivers/pci/hotplug/cpqphp_core.c
@@ -583,30 +583,6 @@ static int get_adapter_status(struct hotplug_slot *hotplug_slot, u8 *value)
         return 0;
 }
 
-static int get_max_bus_speed (struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value)
-{
-        struct slot *slot = hotplug_slot->private;
-        struct controller *ctrl = slot->ctrl;
-
-        dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
-
-        *value = ctrl->speed_capability;
-
-        return 0;
-}
-
-static int get_cur_bus_speed (struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value)
-{
-        struct slot *slot = hotplug_slot->private;
-        struct controller *ctrl = slot->ctrl;
-
-        dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
-
-        *value = ctrl->speed;
-
-        return 0;
-}
-
 static struct hotplug_slot_ops cpqphp_hotplug_slot_ops = {
         .set_attention_status = set_attention_status,
         .enable_slot =          process_SI,
@@ -616,8 +592,6 @@ static struct hotplug_slot_ops cpqphp_hotplug_slot_ops = {
         .get_attention_status = get_attention_status,
         .get_latch_status =     get_latch_status,
         .get_adapter_status =   get_adapter_status,
-        .get_max_bus_speed =    get_max_bus_speed,
-        .get_cur_bus_speed =    get_cur_bus_speed,
 };
 
 #define SLOT_NAME_SIZE 10
@@ -629,6 +603,7 @@ static int ctrl_slot_setup(struct controller *ctrl,
         struct slot *slot;
         struct hotplug_slot *hotplug_slot;
         struct hotplug_slot_info *hotplug_slot_info;
+        struct pci_bus *bus = ctrl->pci_bus;
         u8 number_of_slots;
         u8 slot_device;
         u8 slot_number;
@@ -694,7 +669,7 @@ static int ctrl_slot_setup(struct controller *ctrl,
                         slot->capabilities |= PCISLOT_64_BIT_SUPPORTED;
                 if (is_slot66mhz(slot))
                         slot->capabilities |= PCISLOT_66_MHZ_SUPPORTED;
-                if (ctrl->speed == PCI_SPEED_66MHz)
+                if (bus->cur_bus_speed == PCI_SPEED_66MHz)
                         slot->capabilities |= PCISLOT_66_MHZ_OPERATION;
 
                 ctrl_slot =
@@ -844,6 +819,7 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
         u32 rc;
         struct controller *ctrl;
         struct pci_func *func;
+        struct pci_bus *bus;
         int err;
 
         err = pci_enable_device(pdev);
@@ -852,6 +828,7 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
                         pci_name(pdev), err);
                 return err;
         }
+        bus = pdev->subordinate;
 
         /* Need to read VID early b/c it's used to differentiate CPQ and INTC
          * discovery
@@ -929,22 +906,22 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
                         pci_read_config_byte(pdev, 0x41, &bus_cap);
                         if (bus_cap & 0x80) {
                                 dbg("bus max supports 133MHz PCI-X\n");
-                                ctrl->speed_capability = PCI_SPEED_133MHz_PCIX;
+                                bus->max_bus_speed = PCI_SPEED_133MHz_PCIX;
                                 break;
                         }
                         if (bus_cap & 0x40) {
                                 dbg("bus max supports 100MHz PCI-X\n");
-                                ctrl->speed_capability = PCI_SPEED_100MHz_PCIX;
+                                bus->max_bus_speed = PCI_SPEED_100MHz_PCIX;
                                 break;
                         }
                         if (bus_cap & 20) {
                                 dbg("bus max supports 66MHz PCI-X\n");
-                                ctrl->speed_capability = PCI_SPEED_66MHz_PCIX;
+                                bus->max_bus_speed = PCI_SPEED_66MHz_PCIX;
                                 break;
                         }
                         if (bus_cap & 10) {
                                 dbg("bus max supports 66MHz PCI\n");
-                                ctrl->speed_capability = PCI_SPEED_66MHz;
+                                bus->max_bus_speed = PCI_SPEED_66MHz;
                                 break;
                         }
 
@@ -955,7 +932,7 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
                 case PCI_SUB_HPC_ID:
                         /* Original 6500/7000 implementation */
                         ctrl->slot_switch_type = 1;
-                        ctrl->speed_capability = PCI_SPEED_33MHz;
+                        bus->max_bus_speed = PCI_SPEED_33MHz;
                         ctrl->push_button = 0;
                         ctrl->pci_config_space = 1;
                         ctrl->defeature_PHP = 1;
@@ -966,7 +943,7 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
                         /* First Pushbutton implementation */
                         ctrl->push_flag = 1;
                         ctrl->slot_switch_type = 1;
-                        ctrl->speed_capability = PCI_SPEED_33MHz;
+                        bus->max_bus_speed = PCI_SPEED_33MHz;
                         ctrl->push_button = 1;
                         ctrl->pci_config_space = 1;
                         ctrl->defeature_PHP = 1;
@@ -976,7 +953,7 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
                 case PCI_SUB_HPC_ID_INTC:
                         /* Third party (6500/7000) */
                         ctrl->slot_switch_type = 1;
-                        ctrl->speed_capability = PCI_SPEED_33MHz;
+                        bus->max_bus_speed = PCI_SPEED_33MHz;
                         ctrl->push_button = 0;
                         ctrl->pci_config_space = 1;
                         ctrl->defeature_PHP = 1;
@@ -987,7 +964,7 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
                         /* First 66 Mhz implementation */
                         ctrl->push_flag = 1;
                         ctrl->slot_switch_type = 1;
-                        ctrl->speed_capability = PCI_SPEED_66MHz;
+                        bus->max_bus_speed = PCI_SPEED_66MHz;
                         ctrl->push_button = 1;
                         ctrl->pci_config_space = 1;
                         ctrl->defeature_PHP = 1;
@@ -998,7 +975,7 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
                         /* First PCI-X implementation, 100MHz */
                         ctrl->push_flag = 1;
                         ctrl->slot_switch_type = 1;
-                        ctrl->speed_capability = PCI_SPEED_100MHz_PCIX;
+                        bus->max_bus_speed = PCI_SPEED_100MHz_PCIX;
                         ctrl->push_button = 1;
                         ctrl->pci_config_space = 1;
                         ctrl->defeature_PHP = 1;
@@ -1015,9 +992,9 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
         case PCI_VENDOR_ID_INTEL:
                 /* Check for speed capability (0=33, 1=66) */
                 if (subsystem_deviceid & 0x0001)
-                        ctrl->speed_capability = PCI_SPEED_66MHz;
+                        bus->max_bus_speed = PCI_SPEED_66MHz;
                 else
-                        ctrl->speed_capability = PCI_SPEED_33MHz;
+                        bus->max_bus_speed = PCI_SPEED_33MHz;
 
                 /* Check for push button */
                 if (subsystem_deviceid & 0x0002)
@@ -1079,7 +1056,7 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
                                         pdev->bus->number);
 
         dbg("Hotplug controller capabilities:\n");
-        dbg("    speed_capability       %d\n", ctrl->speed_capability);
+        dbg("    speed_capability       %d\n", bus->max_bus_speed);
         dbg("    slot_switch_type       %s\n", ctrl->slot_switch_type ?
                                         "switch present" : "no switch");
         dbg("    defeature_PHP          %s\n", ctrl->defeature_PHP ?
@@ -1142,7 +1119,7 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
         }
 
         /* Check for 66Mhz operation */
-        ctrl->speed = get_controller_speed(ctrl);
+        bus->cur_bus_speed = get_controller_speed(ctrl);
 
 
         /********************************************************
diff --git a/drivers/pci/hotplug/cpqphp_ctrl.c b/drivers/pci/hotplug/cpqphp_ctrl.c
index 0ff689afa757..e43908d9b5df 100644
--- a/drivers/pci/hotplug/cpqphp_ctrl.c
+++ b/drivers/pci/hotplug/cpqphp_ctrl.c
@@ -1130,12 +1130,13 @@ static int is_bridge(struct pci_func * func)
 static u8 set_controller_speed(struct controller *ctrl, u8 adapter_speed, u8 hp_slot)
 {
         struct slot *slot;
+        struct pci_bus *bus = ctrl->pci_bus;
         u8 reg;
         u8 slot_power = readb(ctrl->hpc_reg + SLOT_POWER);
         u16 reg16;
         u32 leds = readl(ctrl->hpc_reg + LED_CONTROL);
 
-        if (ctrl->speed == adapter_speed)
+        if (bus->cur_bus_speed == adapter_speed)
                 return 0;
 
         /* We don't allow freq/mode changes if we find another adapter running
@@ -1152,7 +1153,7 @@ static u8 set_controller_speed(struct controller *ctrl, u8 adapter_speed, u8 hp_
                  * lower speed/mode, we allow the new adapter to function at
                  * this rate if supported
                  */
-                if (ctrl->speed < adapter_speed)
+                if (bus->cur_bus_speed < adapter_speed)
                         return 0;
 
                 return 1;
@@ -1161,20 +1162,20 @@ static u8 set_controller_speed(struct controller *ctrl, u8 adapter_speed, u8 hp_
         /* If the controller doesn't support freq/mode changes and the
          * controller is running at a higher mode, we bail
          */
-        if ((ctrl->speed > adapter_speed) && (!ctrl->pcix_speed_capability))
+        if ((bus->cur_bus_speed > adapter_speed) && (!ctrl->pcix_speed_capability))
                 return 1;
 
         /* But we allow the adapter to run at a lower rate if possible */
-        if ((ctrl->speed < adapter_speed) && (!ctrl->pcix_speed_capability))
+        if ((bus->cur_bus_speed < adapter_speed) && (!ctrl->pcix_speed_capability))
                 return 0;
 
         /* We try to set the max speed supported by both the adapter and
          * controller
          */
-        if (ctrl->speed_capability < adapter_speed) {
-                if (ctrl->speed == ctrl->speed_capability)
+        if (bus->max_bus_speed < adapter_speed) {
+                if (bus->cur_bus_speed == bus->max_bus_speed)
                         return 0;
-                adapter_speed = ctrl->speed_capability;
+                adapter_speed = bus->max_bus_speed;
         }
 
         writel(0x0L, ctrl->hpc_reg + LED_CONTROL);
@@ -1229,8 +1230,8 @@ static u8 set_controller_speed(struct controller *ctrl, u8 adapter_speed, u8 hp_
         pci_write_config_byte(ctrl->pci_dev, 0x43, reg);
 
         /* Only if mode change...*/
-        if (((ctrl->speed == PCI_SPEED_66MHz) && (adapter_speed == PCI_SPEED_66MHz_PCIX)) ||
-                ((ctrl->speed == PCI_SPEED_66MHz_PCIX) && (adapter_speed == PCI_SPEED_66MHz))) 
+        if (((bus->cur_bus_speed == PCI_SPEED_66MHz) && (adapter_speed == PCI_SPEED_66MHz_PCIX)) ||
+                ((bus->cur_bus_speed == PCI_SPEED_66MHz_PCIX) && (adapter_speed == PCI_SPEED_66MHz))) 
                         set_SOGO(ctrl);
 
         wait_for_ctrl_irq(ctrl);
@@ -1243,7 +1244,7 @@ static u8 set_controller_speed(struct controller *ctrl, u8 adapter_speed, u8 hp_
         set_SOGO(ctrl);
         wait_for_ctrl_irq(ctrl);
 
-        ctrl->speed = adapter_speed;
+        bus->cur_bus_speed = adapter_speed;
         slot = cpqhp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
 
         info("Successfully changed frequency/mode for adapter in slot %d\n",
@@ -1269,6 +1270,7 @@ static u8 set_controller_speed(struct controller *ctrl, u8 adapter_speed, u8 hp_
  */
 static u32 board_replaced(struct pci_func *func, struct controller *ctrl)
 {
+        struct pci_bus *bus = ctrl->pci_bus;
         u8 hp_slot;
         u8 temp_byte;
         u8 adapter_speed;
@@ -1309,7 +1311,7 @@ static u32 board_replaced(struct pci_func *func, struct controller *ctrl)
                 wait_for_ctrl_irq (ctrl);
 
                 adapter_speed = get_adapter_speed(ctrl, hp_slot);
-                if (ctrl->speed != adapter_speed)
+                if (bus->cur_bus_speed != adapter_speed)
                         if (set_controller_speed(ctrl, adapter_speed, hp_slot))
                                 rc = WRONG_BUS_FREQUENCY;
 
@@ -1426,6 +1428,7 @@ static u32 board_added(struct pci_func *func, struct controller *ctrl)
         u32 temp_register = 0xFFFFFFFF;
         u32 rc = 0;
         struct pci_func *new_slot = NULL;
+        struct pci_bus *bus = ctrl->pci_bus;
         struct slot *p_slot;
         struct resource_lists res_lists;
 
@@ -1456,7 +1459,7 @@ static u32 board_added(struct pci_func *func, struct controller *ctrl)
         wait_for_ctrl_irq (ctrl);
 
         adapter_speed = get_adapter_speed(ctrl, hp_slot);
-        if (ctrl->speed != adapter_speed)
+        if (bus->cur_bus_speed != adapter_speed)
                 if (set_controller_speed(ctrl, adapter_speed, hp_slot))
                         rc = WRONG_BUS_FREQUENCY;
 
diff --git a/drivers/pci/hotplug/cpqphp_sysfs.c b/drivers/pci/hotplug/cpqphp_sysfs.c
index e6089bdb6e5b..56215322930a 100644
--- a/drivers/pci/hotplug/cpqphp_sysfs.c
+++ b/drivers/pci/hotplug/cpqphp_sysfs.c
@@ -28,6 +28,7 @@
 
 #include <linux/module.h>
 #include <linux/kernel.h>
+#include <linux/slab.h>
 #include <linux/types.h>
 #include <linux/proc_fs.h>
 #include <linux/workqueue.h>
diff --git a/drivers/pci/hotplug/fakephp.c b/drivers/pci/hotplug/fakephp.c
index 6151389fd903..5317e4d7d96e 100644
--- a/drivers/pci/hotplug/fakephp.c
+++ b/drivers/pci/hotplug/fakephp.c
@@ -19,6 +19,7 @@
 #include <linux/init.h>
 #include <linux/pci.h>
 #include <linux/device.h>
+#include <linux/slab.h>
 #include "../pci.h"
 
 struct legacy_slot {
@@ -73,7 +74,7 @@ static void legacy_release(struct kobject *kobj)
 }
 
 static struct kobj_type legacy_ktype = {
-        .sysfs_ops = &(struct sysfs_ops){
+        .sysfs_ops = &(const struct sysfs_ops){
                 .store = legacy_store, .show = legacy_show
         },
         .release = &legacy_release,
diff --git a/drivers/pci/hotplug/ibmphp_core.c b/drivers/pci/hotplug/ibmphp_core.c
index 7485ffda950c..d934dd4fa873 100644
--- a/drivers/pci/hotplug/ibmphp_core.c
+++ b/drivers/pci/hotplug/ibmphp_core.c
@@ -395,89 +395,40 @@ static int get_adapter_present(struct hotplug_slot *hotplug_slot, u8 * value)
         return rc;
 }
 
-static int get_max_bus_speed(struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value)
+static int get_max_bus_speed(struct slot *slot)
 {
-        int rc = -ENODEV;
-        struct slot *pslot;
+        int rc;
         u8 mode = 0;
+        enum pci_bus_speed speed;
+        struct pci_bus *bus = slot->hotplug_slot->pci_slot->bus;
 
-        debug("%s - Entry hotplug_slot[%p] pvalue[%p]\n", __func__,
-                hotplug_slot, value);
+        debug("%s - Entry slot[%p]\n", __func__, slot);
 
         ibmphp_lock_operations();
-
-        if (hotplug_slot) {
-                pslot = hotplug_slot->private;
-                if (pslot) {
-                        rc = 0;
-                        mode = pslot->supported_bus_mode;
-                        *value = pslot->supported_speed; 
-                        switch (*value) {
-                        case BUS_SPEED_33:
-                                break;
-                        case BUS_SPEED_66:
-                                if (mode == BUS_MODE_PCIX) 
-                                        *value += 0x01;
-                                break;
-                        case BUS_SPEED_100:
-                        case BUS_SPEED_133:
-                                *value = pslot->supported_speed + 0x01;
-                                break;
-                        default:
-                                /* Note (will need to change): there would be soon 256, 512 also */
-                                rc = -ENODEV;
-                        }
-                }
-        }
-
+        mode = slot->supported_bus_mode;
+        speed = slot->supported_speed; 
         ibmphp_unlock_operations();
-        debug("%s - Exit rc[%d] value[%x]\n", __func__, rc, *value);
-        return rc;
-}
 
-static int get_cur_bus_speed(struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value)
-{
-        int rc = -ENODEV;
-        struct slot *pslot;
-        u8 mode = 0;
-
-        debug("%s - Entry hotplug_slot[%p] pvalue[%p]\n", __func__,
-                hotplug_slot, value);
-
-        ibmphp_lock_operations();
-
-        if (hotplug_slot) {
-                pslot = hotplug_slot->private;
-                if (pslot) {
-                        rc = get_cur_bus_info(&pslot);
-                        if (!rc) {
-                                mode = pslot->bus_on->current_bus_mode;
-                                *value = pslot->bus_on->current_speed;
-                                switch (*value) {
-                                case BUS_SPEED_33:
-                                        break;
-                                case BUS_SPEED_66:
-                                        if (mode == BUS_MODE_PCIX) 
-                                                *value += 0x01;
-                                        else if (mode == BUS_MODE_PCI)
-                                                ;
-                                        else
-                                                *value = PCI_SPEED_UNKNOWN;
-                                        break;
-                                case BUS_SPEED_100:
-                                case BUS_SPEED_133:
-                                        *value += 0x01;
-                                        break;
-                                default:
-                                        /* Note of change: there would also be 256, 512 soon */
-                                        rc = -ENODEV;
-                                }
-                        }
-                }
+        switch (speed) {
+        case BUS_SPEED_33:
+                break;
+        case BUS_SPEED_66:
+                if (mode == BUS_MODE_PCIX) 
+                        speed += 0x01;
+                break;
+        case BUS_SPEED_100:
+        case BUS_SPEED_133:
+                speed += 0x01;
+                break;
+        default:
+                /* Note (will need to change): there would be soon 256, 512 also */
+                rc = -ENODEV;
         }
 
-        ibmphp_unlock_operations();
-        debug("%s - Exit rc[%d] value[%x]\n", __func__, rc, *value);
+        if (!rc)
+                bus->max_bus_speed = speed;
+
+        debug("%s - Exit rc[%d] speed[%x]\n", __func__, rc, speed);
         return rc;
 }
 
@@ -572,6 +523,7 @@ static int __init init_ops(void)
                 if (slot_cur->bus_on->current_speed == 0xFF) 
                         if (get_cur_bus_info(&slot_cur)) 
                                 return -1;
+                get_max_bus_speed(slot_cur);
 
                 if (slot_cur->ctrl->options == 0xFF)
                         if (get_hpc_options(slot_cur, &slot_cur->ctrl->options))
@@ -655,6 +607,7 @@ static int validate(struct slot *slot_cur, int opn)
 int ibmphp_update_slot_info(struct slot *slot_cur)
 {
         struct hotplug_slot_info *info;
+        struct pci_bus *bus = slot_cur->hotplug_slot->pci_slot->bus;
         int rc;
         u8 bus_speed;
         u8 mode;
@@ -700,8 +653,7 @@ int ibmphp_update_slot_info(struct slot *slot_cur)
                         bus_speed = PCI_SPEED_UNKNOWN;
         }
 
-        info->cur_bus_speed = bus_speed;
-        info->max_bus_speed = slot_cur->hotplug_slot->info->max_bus_speed;
+        bus->cur_bus_speed = bus_speed;
         // To do: bus_names 
         
         rc = pci_hp_change_slot_info(slot_cur->hotplug_slot, info);
@@ -1326,8 +1278,6 @@ struct hotplug_slot_ops ibmphp_hotplug_slot_ops = {
         .get_attention_status =         get_attention_status,
         .get_latch_status =             get_latch_status,
         .get_adapter_status =           get_adapter_present,
-        .get_max_bus_speed =            get_max_bus_speed,
-        .get_cur_bus_speed =            get_cur_bus_speed,
 /*      .get_max_adapter_speed =        get_max_adapter_speed,
         .get_bus_name_status =          get_bus_name,
 */
diff --git a/drivers/pci/hotplug/ibmphp_ebda.c b/drivers/pci/hotplug/ibmphp_ebda.c
index c1abac8ab5c3..5becbdee4027 100644
--- a/drivers/pci/hotplug/ibmphp_ebda.c
+++ b/drivers/pci/hotplug/ibmphp_ebda.c
@@ -245,7 +245,7 @@ static void __init print_ebda_hpc (void)
 
 int __init ibmphp_access_ebda (void)
 {
-        u8 format, num_ctlrs, rio_complete, hs_complete;
+        u8 format, num_ctlrs, rio_complete, hs_complete, ebda_sz;
         u16 ebda_seg, num_entries, next_offset, offset, blk_id, sub_addr, re, rc_id, re_id, base;
         int rc = 0;
 
@@ -260,7 +260,16 @@ int __init ibmphp_access_ebda (void)
         iounmap (io_mem);
         debug ("returned ebda segment: %x\n", ebda_seg);
         
-        io_mem = ioremap(ebda_seg<<4, 1024);
+        io_mem = ioremap(ebda_seg<<4, 1);
+        if (!io_mem)
+                return -ENOMEM;
+        ebda_sz = readb(io_mem);
+        iounmap(io_mem);
+        debug("ebda size: %d(KiB)\n", ebda_sz);
+        if (ebda_sz == 0)
+                return -ENOMEM;
+
+        io_mem = ioremap(ebda_seg<<4, (ebda_sz * 1024));
         if (!io_mem )
                 return -ENOMEM;
         next_offset = 0x180;
diff --git a/drivers/pci/hotplug/ibmphp_hpc.c b/drivers/pci/hotplug/ibmphp_hpc.c
index 83f337c891a9..1aaf3f32d3cd 100644
--- a/drivers/pci/hotplug/ibmphp_hpc.c
+++ b/drivers/pci/hotplug/ibmphp_hpc.c
@@ -35,6 +35,7 @@
 #include <linux/init.h>
 #include <linux/mutex.h>
 #include <linux/sched.h>
+#include <linux/semaphore.h>
 #include <linux/kthread.h>
 #include "ibmphp.h"
 
@@ -890,7 +891,7 @@ static int poll_hpc(void *data)
                         msleep(POLL_INTERVAL_SEC * 1000);
 
                         if (kthread_should_stop())
-                                break;
+                                goto out_sleep;
                         
                         down (&semOperations);
                         
@@ -904,6 +905,7 @@ static int poll_hpc(void *data)
                 /* give up the hardware semaphore */
                 up (&semOperations);
                 /* sleep for a short time just for good measure */
+out_sleep:
                 msleep(100);
         }
         up (&sem_exit);
diff --git a/drivers/pci/hotplug/ibmphp_res.c b/drivers/pci/hotplug/ibmphp_res.c
index ec73294d1fa6..e2dc289f767c 100644
--- a/drivers/pci/hotplug/ibmphp_res.c
+++ b/drivers/pci/hotplug/ibmphp_res.c
@@ -40,7 +40,7 @@ static void update_resources (struct bus_node *bus_cur, int type, int rangeno);
 static int once_over (void);
 static int remove_ranges (struct bus_node *, struct bus_node *);
 static int update_bridge_ranges (struct bus_node **);
-static int add_range (int type, struct range_node *, struct bus_node *);
+static int add_bus_range (int type, struct range_node *, struct bus_node *);
 static void fix_resources (struct bus_node *);
 static struct bus_node *find_bus_wprev (u8, struct bus_node **, u8);
 
@@ -133,7 +133,7 @@ static int __init alloc_bus_range (struct bus_node **new_bus, struct range_node
                 newrange->rangeno = 1;
         else {
                 /* need to insert our range */
-                add_range (flag, newrange, newbus);
+                add_bus_range (flag, newrange, newbus);
                 debug ("%d resource Primary Bus inserted on bus %x [%x - %x]\n", flag, newbus->busno, newrange->start, newrange->end);
         }
 
@@ -384,7 +384,7 @@ int __init ibmphp_rsrc_init (void)
  * Input: type of the resource, range to add, current bus
  * Output: 0 or -1, bus and range ptrs 
  ********************************************************************************/
-static int add_range (int type, struct range_node *range, struct bus_node *bus_cur)
+static int add_bus_range (int type, struct range_node *range, struct bus_node *bus_cur)
 {
         struct range_node *range_cur = NULL;
         struct range_node *range_prev;
@@ -455,7 +455,7 @@ static int add_range (int type, struct range_node *range, struct bus_node *bus_c
 
 /*******************************************************************************
  * This routine goes through the list of resources of type 'type' and updates
- * the range numbers that they correspond to.  It was called from add_range fnc
+ * the range numbers that they correspond to.  It was called from add_bus_range fnc
  *
  * Input: bus, type of the resource, the rangeno starting from which to update
  ******************************************************************************/
@@ -1999,7 +1999,7 @@ static int __init update_bridge_ranges (struct bus_node **bus)
 
                                                         if (bus_sec->noIORanges > 0) {
                                                                 if (!range_exists_already (range, bus_sec, IO)) {
-                                                                        add_range (IO, range, bus_sec);
+                                                                        add_bus_range (IO, range, bus_sec);
                                                                         ++bus_sec->noIORanges;
                                                                 } else {
                                                                         kfree (range);
@@ -2048,7 +2048,7 @@ static int __init update_bridge_ranges (struct bus_node **bus)
 
                                                         if (bus_sec->noMemRanges > 0) {
                                                                 if (!range_exists_already (range, bus_sec, MEM)) {
-                                                                        add_range (MEM, range, bus_sec);
+                                                                        add_bus_range (MEM, range, bus_sec);
                                                                         ++bus_sec->noMemRanges;
                                                                 } else {
                                                                         kfree (range);
@@ -2102,7 +2102,7 @@ static int __init update_bridge_ranges (struct bus_node **bus)
 
                                                         if (bus_sec->noPFMemRanges > 0) {
                                                                 if (!range_exists_already (range, bus_sec, PFMEM)) {
-                                                                        add_range (PFMEM, range, bus_sec);
+                                                                        add_bus_range (PFMEM, range, bus_sec);
                                                                         ++bus_sec->noPFMemRanges;
                                                                 } else {
                                                                         kfree (range);
diff --git a/drivers/pci/hotplug/pci_hotplug_core.c b/drivers/pci/hotplug/pci_hotplug_core.c
index 0325d989bb46..6d2eea93298f 100644
--- a/drivers/pci/hotplug/pci_hotplug_core.c
+++ b/drivers/pci/hotplug/pci_hotplug_core.c
@@ -33,7 +33,6 @@
 #include <linux/kobject.h>
 #include <linux/sysfs.h>
 #include <linux/pagemap.h>
-#include <linux/slab.h>
 #include <linux/init.h>
 #include <linux/mount.h>
 #include <linux/namei.h>
@@ -64,32 +63,6 @@ static int debug;
 static LIST_HEAD(pci_hotplug_slot_list);
 static DEFINE_MUTEX(pci_hp_mutex);
 
-/* these strings match up with the values in pci_bus_speed */
-static char *pci_bus_speed_strings[] = {
-        "33 MHz PCI",           /* 0x00 */
-        "66 MHz PCI",           /* 0x01 */
-        "66 MHz PCIX",          /* 0x02 */
-        "100 MHz PCIX",         /* 0x03 */
-        "133 MHz PCIX",         /* 0x04 */
-        NULL,                   /* 0x05 */
-        NULL,                   /* 0x06 */
-        NULL,                   /* 0x07 */
-        NULL,                   /* 0x08 */
-        "66 MHz PCIX 266",      /* 0x09 */
-        "100 MHz PCIX 266",     /* 0x0a */
-        "133 MHz PCIX 266",     /* 0x0b */
-        NULL,                   /* 0x0c */
-        NULL,                   /* 0x0d */
-        NULL,                   /* 0x0e */
-        NULL,                   /* 0x0f */
-        NULL,                   /* 0x10 */
-        "66 MHz PCIX 533",      /* 0x11 */
-        "100 MHz PCIX 533",     /* 0x12 */
-        "133 MHz PCIX 533",     /* 0x13 */
-        "2.5 GT/s PCI-E",       /* 0x14 */
-        "5.0 GT/s PCI-E",       /* 0x15 */
-};
-
 #ifdef CONFIG_HOTPLUG_PCI_CPCI
 extern int cpci_hotplug_init(int debug);
 extern void cpci_hotplug_exit(void);
@@ -118,8 +91,6 @@ GET_STATUS(power_status, u8)
 GET_STATUS(attention_status, u8)
 GET_STATUS(latch_status, u8)
 GET_STATUS(adapter_status, u8)
-GET_STATUS(max_bus_speed, enum pci_bus_speed)
-GET_STATUS(cur_bus_speed, enum pci_bus_speed)
 
 static ssize_t power_read_file(struct pci_slot *slot, char *buf)
 {
@@ -263,60 +234,6 @@ static struct pci_slot_attribute hotplug_slot_attr_presence = {
         .show = presence_read_file,
 };
 
-static char *unknown_speed = "Unknown bus speed";
-
-static ssize_t max_bus_speed_read_file(struct pci_slot *slot, char *buf)
-{
-        char *speed_string;
-        int retval;
-        enum pci_bus_speed value;
-        
-        retval = get_max_bus_speed(slot->hotplug, &value);
-        if (retval)
-                goto exit;
-
-        if (value == PCI_SPEED_UNKNOWN)
-                speed_string = unknown_speed;
-        else
-                speed_string = pci_bus_speed_strings[value];
-        
-        retval = sprintf (buf, "%s\n", speed_string);
-
-exit:
-        return retval;
-}
-
-static struct pci_slot_attribute hotplug_slot_attr_max_bus_speed = {
-        .attr = {.name = "max_bus_speed", .mode = S_IFREG | S_IRUGO},
-        .show = max_bus_speed_read_file,
-};
-
-static ssize_t cur_bus_speed_read_file(struct pci_slot *slot, char *buf)
-{
-        char *speed_string;
-        int retval;
-        enum pci_bus_speed value;
-
-        retval = get_cur_bus_speed(slot->hotplug, &value);
-        if (retval)
-                goto exit;
-
-        if (value == PCI_SPEED_UNKNOWN)
-                speed_string = unknown_speed;
-        else
-                speed_string = pci_bus_speed_strings[value];
-        
-        retval = sprintf (buf, "%s\n", speed_string);
-
-exit:
-        return retval;
-}
-
-static struct pci_slot_attribute hotplug_slot_attr_cur_bus_speed = {
-        .attr = {.name = "cur_bus_speed", .mode = S_IFREG | S_IRUGO},
-        .show = cur_bus_speed_read_file,
-};
-
 static ssize_t test_write_file(struct pci_slot *pci_slot, const char *buf,
                 size_t count)
 {
@@ -391,26 +308,6 @@ static bool has_adapter_file(struct pci_slot *pci_slot)
         return false;
 }
 
-static bool has_max_bus_speed_file(struct pci_slot *pci_slot)
-{
-        struct hotplug_slot *slot = pci_slot->hotplug;
-        if ((!slot) || (!slot->ops))
-                return false;
-        if (slot->ops->get_max_bus_speed)
-                return true;
-        return false;
-}
-
-static bool has_cur_bus_speed_file(struct pci_slot *pci_slot)
-{
-        struct hotplug_slot *slot = pci_slot->hotplug;
-        if ((!slot) || (!slot->ops))
-                return false;
-        if (slot->ops->get_cur_bus_speed)
-                return true;
-        return false;
-}
-
 static bool has_test_file(struct pci_slot *pci_slot)
 {
         struct hotplug_slot *slot = pci_slot->hotplug;
@@ -456,20 +353,6 @@ static int fs_add_slot(struct pci_slot *slot)
                         goto exit_adapter;
         }
 
-        if (has_max_bus_speed_file(slot)) {
-                retval = sysfs_create_file(&slot->kobj,
-                                        &hotplug_slot_attr_max_bus_speed.attr);
-                if (retval)
-                        goto exit_max_speed;
-        }
-
-        if (has_cur_bus_speed_file(slot)) {
-                retval = sysfs_create_file(&slot->kobj,
-                                        &hotplug_slot_attr_cur_bus_speed.attr);
-                if (retval)
-                        goto exit_cur_speed;
-        }
-
         if (has_test_file(slot)) {
                 retval = sysfs_create_file(&slot->kobj,
                                            &hotplug_slot_attr_test.attr);
@@ -480,14 +363,6 @@ static int fs_add_slot(struct pci_slot *slot)
         goto exit;
 
 exit_test:
-        if (has_cur_bus_speed_file(slot))
-                sysfs_remove_file(&slot->kobj,
-                                  &hotplug_slot_attr_cur_bus_speed.attr);
-exit_cur_speed:
-        if (has_max_bus_speed_file(slot))
-                sysfs_remove_file(&slot->kobj,
-                                  &hotplug_slot_attr_max_bus_speed.attr);
-exit_max_speed:
         if (has_adapter_file(slot))
                 sysfs_remove_file(&slot->kobj,
                                   &hotplug_slot_attr_presence.attr);
@@ -523,14 +398,6 @@ static void fs_remove_slot(struct pci_slot *slot)
                 sysfs_remove_file(&slot->kobj,
                                   &hotplug_slot_attr_presence.attr);
 
-        if (has_max_bus_speed_file(slot))
-                sysfs_remove_file(&slot->kobj,
-                                  &hotplug_slot_attr_max_bus_speed.attr);
-
-        if (has_cur_bus_speed_file(slot))
-                sysfs_remove_file(&slot->kobj,
-                                  &hotplug_slot_attr_cur_bus_speed.attr);
-
         if (has_test_file(slot))
                 sysfs_remove_file(&slot->kobj, &hotplug_slot_attr_test.attr);
 
diff --git a/drivers/pci/hotplug/pciehp.h b/drivers/pci/hotplug/pciehp.h
index 3070f77eb56a..4ed76b47b6dc 100644
--- a/drivers/pci/hotplug/pciehp.h
+++ b/drivers/pci/hotplug/pciehp.h
@@ -91,7 +91,6 @@ struct controller {
         struct slot *slot;
         wait_queue_head_t queue;        /* sleep & wake process */
         u32 slot_cap;
-        u8 cap_base;
         struct timer_list poll_timer;
         unsigned int cmd_busy:1;
         unsigned int no_cmd_complete:1;
diff --git a/drivers/pci/hotplug/pciehp_acpi.c b/drivers/pci/hotplug/pciehp_acpi.c
index 37c8d3d0323e..1f4000a5a108 100644
--- a/drivers/pci/hotplug/pciehp_acpi.c
+++ b/drivers/pci/hotplug/pciehp_acpi.c
@@ -26,6 +26,7 @@
 #include <linux/acpi.h>
 #include <linux/pci.h>
 #include <linux/pci_hotplug.h>
+#include <linux/slab.h>
 #include "pciehp.h"
 
 #define PCIEHP_DETECT_PCIE      (0)
@@ -87,7 +88,8 @@ static int __init dummy_probe(struct pcie_device *dev)
         /* Note: pciehp_detect_mode != PCIEHP_DETECT_ACPI here */
         if (pciehp_get_hp_hw_control_from_firmware(pdev))
                 return -ENODEV;
-        if (!(pos = pci_find_capability(pdev, PCI_CAP_ID_EXP)))
+        pos = pci_pcie_cap(pdev);
+        if (!pos)
                 return -ENODEV;
         pci_read_config_dword(pdev, pos + PCI_EXP_SLTCAP, &slot_cap);
         slot = kzalloc(sizeof(*slot), GFP_KERNEL);
diff --git a/drivers/pci/hotplug/pciehp_core.c b/drivers/pci/hotplug/pciehp_core.c
index bc234719b1df..3588ea61b0dd 100644
--- a/drivers/pci/hotplug/pciehp_core.c
+++ b/drivers/pci/hotplug/pciehp_core.c
@@ -30,6 +30,7 @@
 #include <linux/module.h>
 #include <linux/moduleparam.h>
 #include <linux/kernel.h>
+#include <linux/slab.h>
 #include <linux/types.h>
 #include <linux/pci.h>
 #include "pciehp.h"
@@ -69,20 +70,6 @@ static int get_power_status	(struct hotplug_slot *slot, u8 *value);
 static int get_attention_status (struct hotplug_slot *slot, u8 *value);
 static int get_latch_status     (struct hotplug_slot *slot, u8 *value);
 static int get_adapter_status   (struct hotplug_slot *slot, u8 *value);
-static int get_max_bus_speed    (struct hotplug_slot *slot, enum pci_bus_speed *value);
-static int get_cur_bus_speed    (struct hotplug_slot *slot, enum pci_bus_speed *value);
-
-static struct hotplug_slot_ops pciehp_hotplug_slot_ops = {
-        .set_attention_status = set_attention_status,
-        .enable_slot =          enable_slot,
-        .disable_slot =         disable_slot,
-        .get_power_status =     get_power_status,
-        .get_attention_status = get_attention_status,
-        .get_latch_status =     get_latch_status,
-        .get_adapter_status =   get_adapter_status,
-        .get_max_bus_speed =    get_max_bus_speed,
-        .get_cur_bus_speed =    get_cur_bus_speed,
-};
 
 /**
  * release_slot - free up the memory used by a slot
@@ -95,6 +82,7 @@ static void release_slot(struct hotplug_slot *hotplug_slot)
         ctrl_dbg(slot->ctrl, "%s: physical_slot = %s\n",
                  __func__, hotplug_slot_name(hotplug_slot));
 
+        kfree(hotplug_slot->ops);
         kfree(hotplug_slot->info);
         kfree(hotplug_slot);
 }
@@ -104,6 +92,7 @@ static int init_slot(struct controller *ctrl)
         struct slot *slot = ctrl->slot;
         struct hotplug_slot *hotplug = NULL;
         struct hotplug_slot_info *info = NULL;
+        struct hotplug_slot_ops *ops = NULL;
         char name[SLOT_NAME_SIZE];
         int retval = -ENOMEM;
 
@@ -115,11 +104,26 @@ static int init_slot(struct controller *ctrl)
         if (!info)
                 goto out;
 
+        /* Setup hotplug slot ops */
+        ops = kzalloc(sizeof(*ops), GFP_KERNEL);
+        if (!ops)
+                goto out;
+        ops->enable_slot = enable_slot;
+        ops->disable_slot = disable_slot;
+        ops->get_power_status = get_power_status;
+        ops->get_adapter_status = get_adapter_status;
+        if (MRL_SENS(ctrl))
+                ops->get_latch_status = get_latch_status;
+        if (ATTN_LED(ctrl)) {
+                ops->get_attention_status = get_attention_status;
+                ops->set_attention_status = set_attention_status;
+        }
+
         /* register this slot with the hotplug pci core */
         hotplug->info = info;
         hotplug->private = slot;
         hotplug->release = &release_slot;
-        hotplug->ops = &pciehp_hotplug_slot_ops;
+        hotplug->ops = ops;
         slot->hotplug_slot = hotplug;
         snprintf(name, SLOT_NAME_SIZE, "%u", PSN(ctrl));
 
@@ -128,17 +132,12 @@ static int init_slot(struct controller *ctrl)
                  ctrl->pcie->port->subordinate->number, PSN(ctrl));
         retval = pci_hp_register(hotplug,
                                  ctrl->pcie->port->subordinate, 0, name);
-        if (retval) {
+        if (retval)
                 ctrl_err(ctrl,
                          "pci_hp_register failed with error %d\n", retval);
-                goto out;
-        }
-        get_power_status(hotplug, &info->power_status);
-        get_attention_status(hotplug, &info->attention_status);
-        get_latch_status(hotplug, &info->latch_status);
-        get_adapter_status(hotplug, &info->adapter_status);
 out:
         if (retval) {
+                kfree(ops);
                 kfree(info);
                 kfree(hotplug);
         }
@@ -160,12 +159,7 @@ static int set_attention_status(struct hotplug_slot *hotplug_slot, u8 status)
         ctrl_dbg(slot->ctrl, "%s: physical_slot = %s\n",
                   __func__, slot_name(slot));
 
-        hotplug_slot->info->attention_status = status;
-
-        if (ATTN_LED(slot->ctrl))
-                pciehp_set_attention_status(slot, status);
-
-        return 0;
+        return pciehp_set_attention_status(slot, status);
 }
 
 
@@ -193,92 +187,41 @@ static int disable_slot(struct hotplug_slot *hotplug_slot)
 static int get_power_status(struct hotplug_slot *hotplug_slot, u8 *value)
 {
         struct slot *slot = hotplug_slot->private;
-        int retval;
 
         ctrl_dbg(slot->ctrl, "%s: physical_slot = %s\n",
                   __func__, slot_name(slot));
 
-        retval = pciehp_get_power_status(slot, value);
-        if (retval < 0)
-                *value = hotplug_slot->info->power_status;
-
-        return 0;
+        return pciehp_get_power_status(slot, value);
 }
 
 static int get_attention_status(struct hotplug_slot *hotplug_slot, u8 *value)
 {
         struct slot *slot = hotplug_slot->private;
-        int retval;
 
         ctrl_dbg(slot->ctrl, "%s: physical_slot = %s\n",
                   __func__, slot_name(slot));
 
-        retval = pciehp_get_attention_status(slot, value);
-        if (retval < 0)
-                *value = hotplug_slot->info->attention_status;
-
-        return 0;
+        return pciehp_get_attention_status(slot, value);
 }
 
 static int get_latch_status(struct hotplug_slot *hotplug_slot, u8 *value)
 {
         struct slot *slot = hotplug_slot->private;
-        int retval;
 
         ctrl_dbg(slot->ctrl, "%s: physical_slot = %s\n",
                  __func__, slot_name(slot));
 
-        retval = pciehp_get_latch_status(slot, value);
-        if (retval < 0)
-                *value = hotplug_slot->info->latch_status;
-
-        return 0;
+        return pciehp_get_latch_status(slot, value);
 }
 
 static int get_adapter_status(struct hotplug_slot *hotplug_slot, u8 *value)
 {
         struct slot *slot = hotplug_slot->private;
-        int retval;
 
         ctrl_dbg(slot->ctrl, "%s: physical_slot = %s\n",
                  __func__, slot_name(slot));
 
-        retval = pciehp_get_adapter_status(slot, value);
-        if (retval < 0)
-                *value = hotplug_slot->info->adapter_status;
-
-        return 0;
-}
-
-static int get_max_bus_speed(struct hotplug_slot *hotplug_slot,
-                                enum pci_bus_speed *value)
-{
-        struct slot *slot = hotplug_slot->private;
-        int retval;
-
-        ctrl_dbg(slot->ctrl, "%s: physical_slot = %s\n",
-                 __func__, slot_name(slot));
-
-        retval = pciehp_get_max_link_speed(slot, value);
-        if (retval < 0)
-                *value = PCI_SPEED_UNKNOWN;
-
-        return 0;
-}
-
-static int get_cur_bus_speed(struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value)
-{
-        struct slot *slot = hotplug_slot->private;
-        int retval;
-
-        ctrl_dbg(slot->ctrl, "%s: physical_slot = %s\n",
-                 __func__, slot_name(slot));
-
-        retval = pciehp_get_cur_link_speed(slot, value);
-        if (retval < 0)
-                *value = PCI_SPEED_UNKNOWN;
-
-        return 0;
+        return pciehp_get_adapter_status(slot, value);
 }
 
 static int pciehp_probe(struct pcie_device *dev)
@@ -286,14 +229,13 @@ static int pciehp_probe(struct pcie_device *dev)
         int rc;
         struct controller *ctrl;
         struct slot *slot;
-        u8 value;
-        struct pci_dev *pdev = dev->port;
+        u8 occupied, poweron;
 
         if (pciehp_force)
                 dev_info(&dev->device,
                          "Bypassing BIOS check for pciehp use on %s\n",
-                         pci_name(pdev));
-        else if (pciehp_get_hp_hw_control_from_firmware(pdev))
+                         pci_name(dev->port));
+        else if (pciehp_get_hp_hw_control_from_firmware(dev->port))
                 goto err_out_none;
 
         ctrl = pcie_init(dev);
@@ -318,23 +260,18 @@ static int pciehp_probe(struct pcie_device *dev)
         rc = pcie_init_notification(ctrl);
         if (rc) {
                 ctrl_err(ctrl, "Notification initialization failed\n");
-                goto err_out_release_ctlr;
+                goto err_out_free_ctrl_slot;
         }
 
         /* Check if slot is occupied */
         slot = ctrl->slot;
-        pciehp_get_adapter_status(slot, &value);
-        if (value) {
-                if (pciehp_force)
-                        pciehp_enable_slot(slot);
-        } else {
-                /* Power off slot if not occupied */
-                if (POWER_CTRL(ctrl)) {
-                        rc = pciehp_power_off_slot(slot);
-                        if (rc)
-                                goto err_out_free_ctrl_slot;
-                }
-        }
+        pciehp_get_adapter_status(slot, &occupied);
+        pciehp_get_power_status(slot, &poweron);
+        if (occupied && pciehp_force)
+                pciehp_enable_slot(slot);
+        /* If empty slot's power status is on, turn power off */
+        if (!occupied && poweron && POWER_CTRL(ctrl))
+                pciehp_power_off_slot(slot);
 
         return 0;
 
diff --git a/drivers/pci/hotplug/pciehp_ctrl.c b/drivers/pci/hotplug/pciehp_ctrl.c
index 84487d126e4d..8f58148be044 100644
--- a/drivers/pci/hotplug/pciehp_ctrl.c
+++ b/drivers/pci/hotplug/pciehp_ctrl.c
@@ -30,6 +30,7 @@
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/types.h>
+#include <linux/slab.h>
 #include <linux/pci.h>
 #include <linux/workqueue.h>
 #include "../pci.h"
@@ -142,23 +143,9 @@ u8 pciehp_handle_power_fault(struct slot *p_slot)
 
         /* power fault */
         ctrl_dbg(ctrl, "Power fault interrupt received\n");
-
-        if (!pciehp_query_power_fault(p_slot)) {
-                /*
-                 * power fault Cleared
-                 */
-                ctrl_info(ctrl, "Power fault cleared on Slot(%s)\n",
-                          slot_name(p_slot));
-                event_type = INT_POWER_FAULT_CLEAR;
-        } else {
-                /*
-                 *   power fault
-                 */
-                ctrl_info(ctrl, "Power fault on Slot(%s)\n", slot_name(p_slot));
-                event_type = INT_POWER_FAULT;
-                ctrl_info(ctrl, "Power fault bit %x set\n", 0);
-        }
-
+        ctrl_err(ctrl, "Power fault on slot %s\n", slot_name(p_slot));
+        event_type = INT_POWER_FAULT;
+        ctrl_info(ctrl, "Power fault bit %x set\n", 0);
         queue_interrupt_event(p_slot, event_type);
 
         return 1;
@@ -224,13 +211,12 @@ static int board_added(struct slot *p_slot)
         retval = pciehp_check_link_status(ctrl);
         if (retval) {
                 ctrl_err(ctrl, "Failed to check link status\n");
-                set_slot_off(ctrl, p_slot);
-                return retval;
+                goto err_exit;
         }
 
         /* Check for a power fault */
-        if (pciehp_query_power_fault(p_slot)) {
-                ctrl_dbg(ctrl, "Power fault detected\n");
+        if (ctrl->power_fault_detected || pciehp_query_power_fault(p_slot)) {
+                ctrl_err(ctrl, "Power fault on slot %s\n", slot_name(p_slot));
                 retval = -EIO;
                 goto err_exit;
         }
@@ -356,6 +342,7 @@ void pciehp_queue_pushbutton_work(struct work_struct *work)
                 p_slot->state = POWERON_STATE;
                 break;
         default:
+                kfree(info);
                 goto out;
         }
         queue_work(pciehp_wq, &info->work);
@@ -363,25 +350,6 @@ void pciehp_queue_pushbutton_work(struct work_struct *work)
         mutex_unlock(&p_slot->lock);
 }
 
-static int update_slot_info(struct slot *slot)
-{
-        struct hotplug_slot_info *info;
-        int result;
-
-        info = kmalloc(sizeof(*info), GFP_KERNEL);
-        if (!info)
-                return -ENOMEM;
-
-        pciehp_get_power_status(slot, &info->power_status);
-        pciehp_get_attention_status(slot, &info->attention_status);
-        pciehp_get_latch_status(slot, &info->latch_status);
-        pciehp_get_adapter_status(slot, &info->adapter_status);
-
-        result = pci_hp_change_slot_info(slot->hotplug_slot, info);
-        kfree (info);
-        return result;
-}
-
 /*
  * Note: This function must be called with slot->lock held
  */
@@ -442,7 +410,6 @@ static void handle_button_press_event(struct slot *p_slot)
                  * to hot-add or hot-remove is undergoing
                  */
                 ctrl_info(ctrl, "Button ignore on Slot(%s)\n", slot_name(p_slot));
-                update_slot_info(p_slot);
                 break;
         default:
                 ctrl_warn(ctrl, "Not a valid state\n");
@@ -500,11 +467,9 @@ static void interrupt_event_handler(struct work_struct *work)
                 if (!HP_SUPR_RM(ctrl))
                         break;
                 ctrl_dbg(ctrl, "Surprise Removal\n");
-                update_slot_info(p_slot);
                 handle_surprise_event(p_slot);
                 break;
         default:
-                update_slot_info(p_slot);
                 break;
         }
         mutex_unlock(&p_slot->lock);
@@ -547,9 +512,6 @@ int pciehp_enable_slot(struct slot *p_slot)
         if (rc) {
                 pciehp_get_latch_status(p_slot, &getstatus);
         }
-
-        update_slot_info(p_slot);
-
         return rc;
 }
 
@@ -590,10 +552,7 @@ int pciehp_disable_slot(struct slot *p_slot)
                 }
         }
 
-        ret = remove_board(p_slot);
-        update_slot_info(p_slot);
-
-        return ret;
+        return remove_board(p_slot);
 }
 
 int pciehp_sysfs_enable_slot(struct slot *p_slot)
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index 9ef4605c1ef6..0cd42047d89b 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -36,6 +36,7 @@
 #include <linux/pci.h>
 #include <linux/interrupt.h>
 #include <linux/time.h>
+#include <linux/slab.h>
 
 #include "../pci.h"
 #include "pciehp.h"
@@ -45,25 +46,25 @@ static atomic_t pciehp_num_controllers = ATOMIC_INIT(0);
 static inline int pciehp_readw(struct controller *ctrl, int reg, u16 *value)
 {
         struct pci_dev *dev = ctrl->pcie->port;
-        return pci_read_config_word(dev, ctrl->cap_base + reg, value);
+        return pci_read_config_word(dev, pci_pcie_cap(dev) + reg, value);
 }
 
 static inline int pciehp_readl(struct controller *ctrl, int reg, u32 *value)
 {
         struct pci_dev *dev = ctrl->pcie->port;
-        return pci_read_config_dword(dev, ctrl->cap_base + reg, value);
+        return pci_read_config_dword(dev, pci_pcie_cap(dev) + reg, value);
 }
 
 static inline int pciehp_writew(struct controller *ctrl, int reg, u16 value)
 {
         struct pci_dev *dev = ctrl->pcie->port;
-        return pci_write_config_word(dev, ctrl->cap_base + reg, value);
+        return pci_write_config_word(dev, pci_pcie_cap(dev) + reg, value);
 }
 
 static inline int pciehp_writel(struct controller *ctrl, int reg, u32 value)
 {
         struct pci_dev *dev = ctrl->pcie->port;
-        return pci_write_config_dword(dev, ctrl->cap_base + reg, value);
+        return pci_write_config_dword(dev, pci_pcie_cap(dev) + reg, value);
 }
 
 /* Power Control Command */
@@ -318,8 +319,8 @@ int pciehp_get_attention_status(struct slot *slot, u8 *status)
                 return retval;
         }
 
-        ctrl_dbg(ctrl, "%s: SLOTCTRL %x, value read %x\n",
-                 __func__, ctrl->cap_base + PCI_EXP_SLTCTL, slot_ctrl);
+        ctrl_dbg(ctrl, "%s: SLOTCTRL %x, value read %x\n", __func__,
+                 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_ctrl);
 
         atten_led_state = (slot_ctrl & PCI_EXP_SLTCTL_AIC) >> 6;
 
@@ -356,8 +357,8 @@ int pciehp_get_power_status(struct slot *slot, u8 *status)
                 ctrl_err(ctrl, "%s: Cannot read SLOTCTRL register\n", __func__);
                 return retval;
         }
-        ctrl_dbg(ctrl, "%s: SLOTCTRL %x value read %x\n",
-                 __func__, ctrl->cap_base + PCI_EXP_SLTCTL, slot_ctrl);
+        ctrl_dbg(ctrl, "%s: SLOTCTRL %x value read %x\n", __func__,
+                 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_ctrl);
 
         pwr_state = (slot_ctrl & PCI_EXP_SLTCTL_PCC) >> 10;
 
@@ -427,27 +428,24 @@ int pciehp_set_attention_status(struct slot *slot, u8 value)
         struct controller *ctrl = slot->ctrl;
         u16 slot_cmd;
         u16 cmd_mask;
-        int rc;
 
         cmd_mask = PCI_EXP_SLTCTL_AIC;
         switch (value) {
-                case 0 :        /* turn off */
-                        slot_cmd = 0x00C0;
-                        break;
-                case 1:         /* turn on */
-                        slot_cmd = 0x0040;
-                        break;
-                case 2:         /* turn blink */
-                        slot_cmd = 0x0080;
-                        break;
-                default:
-                        return -1;
+        case 0 :        /* turn off */
+                slot_cmd = 0x00C0;
+                break;
+        case 1:         /* turn on */
+                slot_cmd = 0x0040;
+                break;
+        case 2:         /* turn blink */
+                slot_cmd = 0x0080;
+                break;
+        default:
+                return -EINVAL;
         }
-        rc = pcie_write_cmd(ctrl, slot_cmd, cmd_mask);
-        ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n",
-                 __func__, ctrl->cap_base + PCI_EXP_SLTCTL, slot_cmd);
-
-        return rc;
+        ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__,
+                 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_cmd);
+        return pcie_write_cmd(ctrl, slot_cmd, cmd_mask);
 }
 
 void pciehp_green_led_on(struct slot *slot)
@@ -459,8 +457,8 @@ void pciehp_green_led_on(struct slot *slot)
         slot_cmd = 0x0100;
         cmd_mask = PCI_EXP_SLTCTL_PIC;
         pcie_write_cmd(ctrl, slot_cmd, cmd_mask);
-        ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n",
-                 __func__, ctrl->cap_base + PCI_EXP_SLTCTL, slot_cmd);
+        ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__,
+                 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_cmd);
 }
 
 void pciehp_green_led_off(struct slot *slot)
@@ -472,8 +470,8 @@ void pciehp_green_led_off(struct slot *slot)
         slot_cmd = 0x0300;
         cmd_mask = PCI_EXP_SLTCTL_PIC;
         pcie_write_cmd(ctrl, slot_cmd, cmd_mask);
-        ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n",
-                 __func__, ctrl->cap_base + PCI_EXP_SLTCTL, slot_cmd);
+        ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__,
+                 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_cmd);
 }
 
 void pciehp_green_led_blink(struct slot *slot)
@@ -485,8 +483,8 @@ void pciehp_green_led_blink(struct slot *slot)
         slot_cmd = 0x0200;
         cmd_mask = PCI_EXP_SLTCTL_PIC;
         pcie_write_cmd(ctrl, slot_cmd, cmd_mask);
-        ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n",
-                 __func__, ctrl->cap_base + PCI_EXP_SLTCTL, slot_cmd);
+        ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__,
+                 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_cmd);
 }
 
 int pciehp_power_on_slot(struct slot * slot)
@@ -495,6 +493,7 @@ int pciehp_power_on_slot(struct slot * slot)
         u16 slot_cmd;
         u16 cmd_mask;
         u16 slot_status;
+        u16 lnk_status;
         int retval = 0;
 
         /* Clear sticky power-fault bit from previous power failures */
@@ -514,58 +513,27 @@ int pciehp_power_on_slot(struct slot * slot)
                         return retval;
                 }
         }
+        ctrl->power_fault_detected = 0;
 
         slot_cmd = POWER_ON;
         cmd_mask = PCI_EXP_SLTCTL_PCC;
-        if (!pciehp_poll_mode) {
-                /* Enable power fault detection turned off at power off time */
-                slot_cmd |= PCI_EXP_SLTCTL_PFDE;
-                cmd_mask |= PCI_EXP_SLTCTL_PFDE;
-        }
-
         retval = pcie_write_cmd(ctrl, slot_cmd, cmd_mask);
         if (retval) {
                 ctrl_err(ctrl, "Write %x command failed!\n", slot_cmd);
                 return retval;
         }
-        ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n",
-                 __func__, ctrl->cap_base + PCI_EXP_SLTCTL, slot_cmd);
-
-        ctrl->power_fault_detected = 0;
-        return retval;
-}
-
-static inline int pcie_mask_bad_dllp(struct controller *ctrl)
-{
-        struct pci_dev *dev = ctrl->pcie->port;
-        int pos;
-        u32 reg;
-
-        pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
-        if (!pos)
-                return 0;
-        pci_read_config_dword(dev, pos + PCI_ERR_COR_MASK, &reg);
-        if (reg & PCI_ERR_COR_BAD_DLLP)
-                return 0;
-        reg |= PCI_ERR_COR_BAD_DLLP;
-        pci_write_config_dword(dev, pos + PCI_ERR_COR_MASK, reg);
-        return 1;
-}
+        ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__,
+                 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_cmd);
 
-static inline void pcie_unmask_bad_dllp(struct controller *ctrl)
-{
-        struct pci_dev *dev = ctrl->pcie->port;
-        u32 reg;
-        int pos;
+        retval = pciehp_readw(ctrl, PCI_EXP_LNKSTA, &lnk_status);
+        if (retval) {
+                ctrl_err(ctrl, "%s: Cannot read LNKSTA register\n",
+                                __func__);
+                return retval;
+        }
+        pcie_update_link_speed(ctrl->pcie->port->subordinate, lnk_status);
 
-        pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
-        if (!pos)
-                return;
-        pci_read_config_dword(dev, pos + PCI_ERR_COR_MASK, &reg);
-        if (!(reg & PCI_ERR_COR_BAD_DLLP))
-                return;
-        reg &= ~PCI_ERR_COR_BAD_DLLP;
-        pci_write_config_dword(dev, pos + PCI_ERR_COR_MASK, reg);
+        return retval;
 }
 
 int pciehp_power_off_slot(struct slot * slot)
@@ -573,38 +541,18 @@ int pciehp_power_off_slot(struct slot * slot)
         struct controller *ctrl = slot->ctrl;
         u16 slot_cmd;
         u16 cmd_mask;
-        int retval = 0;
-        int changed;
-
-        /*
-         * Set Bad DLLP Mask bit in Correctable Error Mask
-         * Register. This is the workaround against Bad DLLP error
-         * that sometimes happens during turning power off the slot
-         * which conforms to PCI Express 1.0a spec.
-         */
-        changed = pcie_mask_bad_dllp(ctrl);
+        int retval;
 
         slot_cmd = POWER_OFF;
         cmd_mask = PCI_EXP_SLTCTL_PCC;
-        if (!pciehp_poll_mode) {
-                /* Disable power fault detection */
-                slot_cmd &= ~PCI_EXP_SLTCTL_PFDE;
-                cmd_mask |= PCI_EXP_SLTCTL_PFDE;
-        }
-
         retval = pcie_write_cmd(ctrl, slot_cmd, cmd_mask);
         if (retval) {
                 ctrl_err(ctrl, "Write command failed!\n");
-                retval = -1;
-                goto out;
+                return retval;
         }
-        ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n",
-                 __func__, ctrl->cap_base + PCI_EXP_SLTCTL, slot_cmd);
- out:
-        if (changed)
-                pcie_unmask_bad_dllp(ctrl);
-
-        return retval;
+        ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__,
+                 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_cmd);
+        return 0;
 }
 
 static irqreturn_t pcie_isr(int irq, void *dev_id)
@@ -672,37 +620,6 @@ static irqreturn_t pcie_isr(int irq, void *dev_id)
         return IRQ_HANDLED;
 }
 
-int pciehp_get_max_link_speed(struct slot *slot, enum pci_bus_speed *value)
-{
-        struct controller *ctrl = slot->ctrl;
-        enum pcie_link_speed lnk_speed;
-        u32     lnk_cap;
-        int retval = 0;
-
-        retval = pciehp_readl(ctrl, PCI_EXP_LNKCAP, &lnk_cap);
-        if (retval) {
-                ctrl_err(ctrl, "%s: Cannot read LNKCAP register\n", __func__);
-                return retval;
-        }
-
-        switch (lnk_cap & 0x000F) {
-        case 1:
-                lnk_speed = PCIE_2_5GB;
-                break;
-        case 2:
-                lnk_speed = PCIE_5_0GB;
-                break;
-        default:
-                lnk_speed = PCIE_LNK_SPEED_UNKNOWN;
-                break;
-        }
-
-        *value = lnk_speed;
-        ctrl_dbg(ctrl, "Max link speed = %d\n", lnk_speed);
-
-        return retval;
-}
-
 int pciehp_get_max_lnk_width(struct slot *slot,
                                  enum pcie_link_width *value)
 {
@@ -753,38 +670,6 @@ int pciehp_get_max_lnk_width(struct slot *slot,
         return retval;
 }
 
-int pciehp_get_cur_link_speed(struct slot *slot, enum pci_bus_speed *value)
-{
-        struct controller *ctrl = slot->ctrl;
-        enum pcie_link_speed lnk_speed = PCI_SPEED_UNKNOWN;
-        int retval = 0;
-        u16 lnk_status;
-
-        retval = pciehp_readw(ctrl, PCI_EXP_LNKSTA, &lnk_status);
-        if (retval) {
-                ctrl_err(ctrl, "%s: Cannot read LNKSTATUS register\n",
-                         __func__);
-                return retval;
-        }
-
-        switch (lnk_status & PCI_EXP_LNKSTA_CLS) {
-        case 1:
-                lnk_speed = PCIE_2_5GB;
-                break;
-        case 2:
-                lnk_speed = PCIE_5_0GB;
-                break;
-        default:
-                lnk_speed = PCIE_LNK_SPEED_UNKNOWN;
-                break;
-        }
-
-        *value = lnk_speed;
-        ctrl_dbg(ctrl, "Current link speed = %d\n", lnk_speed);
-
-        return retval;
-}
-
 int pciehp_get_cur_lnk_width(struct slot *slot,
                                  enum pcie_link_width *value)
 {
@@ -840,11 +725,19 @@ int pcie_enable_notification(struct controller *ctrl)
 {
         u16 cmd, mask;
 
+        /*
+         * TBD: Power fault detected software notification support.
+         *
+         * Power fault detected software notification is not enabled
+         * now, because it caused power fault detected interrupt storm
+         * on some machines. On those machines, power fault detected
+         * bit in the slot status register was set again immediately
+         * when it is cleared in the interrupt service routine, and
+         * next power fault detected interrupt was notified again.
+         */
         cmd = PCI_EXP_SLTCTL_PDCE;
         if (ATTN_BUTTN(ctrl))
                 cmd |= PCI_EXP_SLTCTL_ABPE;
-        if (POWER_CTRL(ctrl))
-                cmd |= PCI_EXP_SLTCTL_PFDE;
         if (MRL_SENS(ctrl))
                 cmd |= PCI_EXP_SLTCTL_MRLSCE;
         if (!pciehp_poll_mode)
@@ -866,7 +759,8 @@ static void pcie_disable_notification(struct controller *ctrl)
         u16 mask;
         mask = (PCI_EXP_SLTCTL_PDCE | PCI_EXP_SLTCTL_ABPE |
                 PCI_EXP_SLTCTL_MRLSCE | PCI_EXP_SLTCTL_PFDE |
-                PCI_EXP_SLTCTL_HPIE | PCI_EXP_SLTCTL_CCIE);
+                PCI_EXP_SLTCTL_HPIE | PCI_EXP_SLTCTL_CCIE |
+                PCI_EXP_SLTCTL_DLLSCE);
         if (pcie_write_cmd(ctrl, 0, mask))
                 ctrl_warn(ctrl, "Cannot disable software notification\n");
 }
@@ -934,13 +828,13 @@ static inline void dbg_ctrl(struct controller *ctrl)
                   pdev->subsystem_device);
         ctrl_info(ctrl, "  Subsystem Vendor ID  : 0x%04x\n",
                   pdev->subsystem_vendor);
-        ctrl_info(ctrl, "  PCIe Cap offset      : 0x%02x\n", ctrl->cap_base);
+        ctrl_info(ctrl, "  PCIe Cap offset      : 0x%02x\n",
+                  pci_pcie_cap(pdev));
         for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
                 if (!pci_resource_len(pdev, i))
                         continue;
-                ctrl_info(ctrl, "  PCI resource [%d]     : 0x%llx@0x%llx\n",
-                          i, (unsigned long long)pci_resource_len(pdev, i),
-                          (unsigned long long)pci_resource_start(pdev, i));
+                ctrl_info(ctrl, "  PCI resource [%d]     : %pR\n",
+                          i, &pdev->resource[i]);
         }
         ctrl_info(ctrl, "Slot Capabilities      : 0x%08x\n", ctrl->slot_cap);
         ctrl_info(ctrl, "  Physical Slot Number : %d\n", PSN(ctrl));
@@ -978,8 +872,7 @@ struct controller *pcie_init(struct pcie_device *dev)
                 goto abort;
         }
         ctrl->pcie = dev;
-        ctrl->cap_base = pci_find_capability(pdev, PCI_CAP_ID_EXP);
-        if (!ctrl->cap_base) {
+        if (!pci_pcie_cap(pdev)) {
                 ctrl_err(ctrl, "Cannot find PCI Express capability\n");
                 goto abort_ctrl;
         }
diff --git a/drivers/pci/hotplug/pciehp_pci.c b/drivers/pci/hotplug/pciehp_pci.c
index 21733108adde..0a16444c14c9 100644
--- a/drivers/pci/hotplug/pciehp_pci.c
+++ b/drivers/pci/hotplug/pciehp_pci.c
@@ -53,17 +53,15 @@ static int __ref pciehp_add_bridge(struct pci_dev *dev)
                 busnr = pci_scan_bridge(parent, dev, busnr, pass);
         if (!dev->subordinate)
                 return -1;
-        pci_bus_size_bridges(dev->subordinate);
-        pci_bus_assign_resources(parent);
-        pci_enable_bridges(parent);
-        pci_bus_add_devices(parent);
+
         return 0;
 }
 
 int pciehp_configure_device(struct slot *p_slot)
 {
         struct pci_dev *dev;
-        struct pci_bus *parent = p_slot->ctrl->pcie->port->subordinate;
+        struct pci_dev *bridge = p_slot->ctrl->pcie->port;
+        struct pci_bus *parent = bridge->subordinate;
         int num, fn;
         struct controller *ctrl = p_slot->ctrl;
 
@@ -96,12 +94,25 @@ int pciehp_configure_device(struct slot *p_slot)
                                 (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)) {
                         pciehp_add_bridge(dev);
                 }
+                pci_dev_put(dev);
+        }
+
+        pci_assign_unassigned_bridge_resources(bridge);
+
+        for (fn = 0; fn < 8; fn++) {
+                dev = pci_get_slot(parent, PCI_DEVFN(0, fn));
+                if (!dev)
+                        continue;
+                if ((dev->class >> 16) == PCI_BASE_CLASS_DISPLAY) {
+                        pci_dev_put(dev);
+                        continue;
+                }
                 pci_configure_slot(dev);
                 pci_dev_put(dev);
         }
 
-        pci_bus_assign_resources(parent);
         pci_bus_add_devices(parent);
+
         return 0;
 }
 
diff --git a/drivers/pci/hotplug/pcihp_slot.c b/drivers/pci/hotplug/pcihp_slot.c
index cc8ec3aa41a7..80b461c98557 100644
--- a/drivers/pci/hotplug/pcihp_slot.c
+++ b/drivers/pci/hotplug/pcihp_slot.c
@@ -43,7 +43,7 @@ static void program_hpp_type0(struct pci_dev *dev, struct hpp_type0 *hpp)
                  * Perhaps we *should* use default settings for PCIe, but
                  * pciehp didn't, so we won't either.
                  */
-                if (dev->is_pcie)
+                if (pci_is_pcie(dev))
                         return;
                 dev_info(&dev->dev, "using default PCI settings\n");
                 hpp = &pci_default_type0;
@@ -102,7 +102,7 @@ static void program_hpp_type2(struct pci_dev *dev, struct hpp_type2 *hpp)
                 return;
 
         /* Find PCI Express capability */
-        pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
+        pos = pci_pcie_cap(dev);
         if (!pos)
                 return;
 
diff --git a/drivers/pci/hotplug/rpadlpar_core.c b/drivers/pci/hotplug/rpadlpar_core.c
index 4e3e0382c16e..083034710fa6 100644
--- a/drivers/pci/hotplug/rpadlpar_core.c
+++ b/drivers/pci/hotplug/rpadlpar_core.c
@@ -20,6 +20,7 @@
 #include <linux/init.h>
 #include <linux/pci.h>
 #include <linux/string.h>
+#include <linux/vmalloc.h>
 
 #include <asm/pci-bridge.h>
 #include <linux/mutex.h>
@@ -430,6 +431,8 @@ int dlpar_remove_slot(char *drc_name)
                         rc = dlpar_remove_pci_slot(drc_name, dn);
                         break;
         }
+        vm_unmap_aliases();
+
         printk(KERN_INFO "%s: slot %s removed\n", DLPAR_MODULE_NAME, drc_name);
 exit:
         mutex_unlock(&rpadlpar_mutex);
diff --git a/drivers/pci/hotplug/rpaphp_core.c b/drivers/pci/hotplug/rpaphp_core.c
index c159223389ec..ef7411c660b9 100644
--- a/drivers/pci/hotplug/rpaphp_core.c
+++ b/drivers/pci/hotplug/rpaphp_core.c
@@ -27,9 +27,9 @@
 #include <linux/moduleparam.h>
 #include <linux/pci.h>
 #include <linux/pci_hotplug.h>
-#include <linux/slab.h>
 #include <linux/smp.h>
 #include <linux/init.h>
+#include <linux/vmalloc.h>
 #include <asm/eeh.h>       /* for eeh_add_device() */
 #include <asm/rtas.h>           /* rtas_call */
 #include <asm/pci-bridge.h>     /* for pci_controller */
@@ -130,10 +130,9 @@ static int get_adapter_status(struct hotplug_slot *hotplug_slot, u8 * value)
         return 0;
 }
 
-static int get_max_bus_speed(struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value)
+static enum pci_bus_speed get_max_bus_speed(struct slot *slot)
 {
-        struct slot *slot = (struct slot *)hotplug_slot->private;
-
+        enum pci_bus_speed speed;
         switch (slot->type) {
         case 1:
         case 2:
@@ -141,30 +140,30 @@ static int get_max_bus_speed(struct hotplug_slot *hotplug_slot, enum pci_bus_spe
         case 4:
         case 5:
         case 6:
-                *value = PCI_SPEED_33MHz;       /* speed for case 1-6 */
+                speed = PCI_SPEED_33MHz;        /* speed for case 1-6 */
                 break;
         case 7:
         case 8:
-                *value = PCI_SPEED_66MHz;
+                speed = PCI_SPEED_66MHz;
                 break;
         case 11:
         case 14:
-                *value = PCI_SPEED_66MHz_PCIX;
+                speed = PCI_SPEED_66MHz_PCIX;
                 break;
         case 12:
         case 15:
-                *value = PCI_SPEED_100MHz_PCIX;
+                speed = PCI_SPEED_100MHz_PCIX;
                 break;
         case 13:
         case 16:
-                *value = PCI_SPEED_133MHz_PCIX;
+                speed = PCI_SPEED_133MHz_PCIX;
                 break;
         default:
-                *value = PCI_SPEED_UNKNOWN;
+                speed = PCI_SPEED_UNKNOWN;
                 break;
-
         }
-        return 0;
+
+        return speed;
 }
 
 static int get_children_props(struct device_node *dn, const int **drc_indexes,
@@ -408,6 +407,8 @@ static int enable_slot(struct hotplug_slot *hotplug_slot)
                 slot->state = NOT_VALID;
                 return -EINVAL;
         }
+
+        slot->bus->max_bus_speed = get_max_bus_speed(slot);
         return 0;
 }
 
@@ -418,6 +419,8 @@ static int disable_slot(struct hotplug_slot *hotplug_slot)
                 return -EINVAL;
 
         pcibios_remove_pci_devices(slot->bus);
+        vm_unmap_aliases();
+
         slot->state = NOT_CONFIGURED;
         return 0;
 }
@@ -429,7 +432,6 @@ struct hotplug_slot_ops rpaphp_hotplug_slot_ops = {
         .get_power_status = get_power_status,
         .get_attention_status = get_attention_status,
         .get_adapter_status = get_adapter_status,
-        .get_max_bus_speed = get_max_bus_speed,
 };
 
 module_init(rpaphp_init);
diff --git a/drivers/pci/hotplug/sgi_hotplug.c b/drivers/pci/hotplug/sgi_hotplug.c
index 8aebe1e9d3d6..72d507b6a2aa 100644
--- a/drivers/pci/hotplug/sgi_hotplug.c
+++ b/drivers/pci/hotplug/sgi_hotplug.c
@@ -15,6 +15,7 @@
 #include <linux/pci.h>
 #include <linux/pci_hotplug.h>
 #include <linux/proc_fs.h>
+#include <linux/slab.h>
 #include <linux/types.h>
 #include <linux/mutex.h>
 
diff --git a/drivers/pci/hotplug/shpchp.h b/drivers/pci/hotplug/shpchp.h
index bd588eb8e922..d2627e1c3ac1 100644
--- a/drivers/pci/hotplug/shpchp.h
+++ b/drivers/pci/hotplug/shpchp.h
@@ -121,7 +121,7 @@ struct controller {
 #define PCI_DEVICE_ID_AMD_GOLAM_7450    0x7450
 #define PCI_DEVICE_ID_AMD_POGO_7458     0x7458
 
-/* AMD PCIX bridge registers */
+/* AMD PCI-X bridge registers */
 #define PCIX_MEM_BASE_LIMIT_OFFSET      0x1C
 #define PCIX_MISCII_OFFSET              0x48
 #define PCIX_MISC_BRIDGE_ERRORS_OFFSET  0x80
@@ -333,8 +333,6 @@ struct hpc_ops {
         int (*set_attention_status)(struct slot *slot, u8 status);
         int (*get_latch_status)(struct slot *slot, u8 *status);
         int (*get_adapter_status)(struct slot *slot, u8 *status);
-        int (*get_max_bus_speed)(struct slot *slot, enum pci_bus_speed *speed);
-        int (*get_cur_bus_speed)(struct slot *slot, enum pci_bus_speed *speed);
         int (*get_adapter_speed)(struct slot *slot, enum pci_bus_speed *speed);
         int (*get_mode1_ECC_cap)(struct slot *slot, u8 *mode);
         int (*get_prog_int)(struct slot *slot, u8 *prog_int);
diff --git a/drivers/pci/hotplug/shpchp_core.c b/drivers/pci/hotplug/shpchp_core.c
index 8a520a3d0f59..a7bd5048396e 100644
--- a/drivers/pci/hotplug/shpchp_core.c
+++ b/drivers/pci/hotplug/shpchp_core.c
@@ -31,6 +31,7 @@
 #include <linux/moduleparam.h>
 #include <linux/kernel.h>
 #include <linux/types.h>
+#include <linux/slab.h>
 #include <linux/pci.h>
 #include <linux/workqueue.h>
 #include "shpchp.h"
@@ -65,8 +66,6 @@ static int get_power_status	(struct hotplug_slot *slot, u8 *value);
 static int get_attention_status (struct hotplug_slot *slot, u8 *value);
 static int get_latch_status     (struct hotplug_slot *slot, u8 *value);
 static int get_adapter_status   (struct hotplug_slot *slot, u8 *value);
-static int get_max_bus_speed    (struct hotplug_slot *slot, enum pci_bus_speed *value);
-static int get_cur_bus_speed    (struct hotplug_slot *slot, enum pci_bus_speed *value);
 
 static struct hotplug_slot_ops shpchp_hotplug_slot_ops = {
         .set_attention_status = set_attention_status,
@@ -76,8 +75,6 @@ static struct hotplug_slot_ops shpchp_hotplug_slot_ops = {
         .get_attention_status = get_attention_status,
         .get_latch_status =     get_latch_status,
         .get_adapter_status =   get_adapter_status,
-        .get_max_bus_speed =    get_max_bus_speed,
-        .get_cur_bus_speed =    get_cur_bus_speed,
 };
 
 /**
@@ -279,37 +276,6 @@ static int get_adapter_status (struct hotplug_slot *hotplug_slot, u8 *value)
         return 0;
 }
 
-static int get_max_bus_speed(struct hotplug_slot *hotplug_slot,
-                                enum pci_bus_speed *value)
-{
-        struct slot *slot = get_slot(hotplug_slot);
-        int retval;
-
-        ctrl_dbg(slot->ctrl, "%s: physical_slot = %s\n",
-                 __func__, slot_name(slot));
-
-        retval = slot->hpc_ops->get_max_bus_speed(slot, value);
-        if (retval < 0)
-                *value = PCI_SPEED_UNKNOWN;
-
-        return 0;
-}
-
-static int get_cur_bus_speed (struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value)
-{
-        struct slot *slot = get_slot(hotplug_slot);
-        int retval;
-
-        ctrl_dbg(slot->ctrl, "%s: physical_slot = %s\n",
-                 __func__, slot_name(slot));
-
-        retval = slot->hpc_ops->get_cur_bus_speed(slot, value);
-        if (retval < 0)
-                *value = PCI_SPEED_UNKNOWN;
-
-        return 0;
-}
-
 static int is_shpc_capable(struct pci_dev *dev)
 {
         if ((dev->vendor == PCI_VENDOR_ID_AMD) || (dev->device ==
diff --git a/drivers/pci/hotplug/shpchp_ctrl.c b/drivers/pci/hotplug/shpchp_ctrl.c
index b8ab2796e66a..3387fbfb0c54 100644
--- a/drivers/pci/hotplug/shpchp_ctrl.c
+++ b/drivers/pci/hotplug/shpchp_ctrl.c
@@ -30,6 +30,7 @@
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/types.h>
+#include <linux/slab.h>
 #include <linux/pci.h>
 #include <linux/workqueue.h>
 #include "../pci.h"
@@ -285,17 +286,8 @@ static int board_added(struct slot *p_slot)
                 return WRONG_BUS_FREQUENCY;
         }
 
-        rc = p_slot->hpc_ops->get_cur_bus_speed(p_slot, &bsp);
-        if (rc) {
-                ctrl_err(ctrl, "Can't get bus operation speed\n");
-                return WRONG_BUS_FREQUENCY;
-        }
-
-        rc = p_slot->hpc_ops->get_max_bus_speed(p_slot, &msp);
-        if (rc) {
-                ctrl_err(ctrl, "Can't get max bus operation speed\n");
-                msp = bsp;
-        }
+        bsp = ctrl->pci_dev->bus->cur_bus_speed;
+        msp = ctrl->pci_dev->bus->max_bus_speed;
 
         /* Check if there are other slots or devices on the same bus */
         if (!list_empty(&ctrl->pci_dev->subordinate->devices))
@@ -462,6 +454,7 @@ void shpchp_queue_pushbutton_work(struct work_struct *work)
                 p_slot->state = POWERON_STATE;
                 break;
         default:
+                kfree(info);
                 goto out;
         }
         queue_work(shpchp_wq, &info->work);
diff --git a/drivers/pci/hotplug/shpchp_hpc.c b/drivers/pci/hotplug/shpchp_hpc.c
index 86dc39847769..5f5e8d2e3552 100644
--- a/drivers/pci/hotplug/shpchp_hpc.c
+++ b/drivers/pci/hotplug/shpchp_hpc.c
@@ -660,6 +660,75 @@ static int hpc_slot_disable(struct slot * slot)
         return retval;
 }
 
+static int shpc_get_cur_bus_speed(struct controller *ctrl)
+{
+        int retval = 0;
+        struct pci_bus *bus = ctrl->pci_dev->subordinate;
+        enum pci_bus_speed bus_speed = PCI_SPEED_UNKNOWN;
+        u16 sec_bus_reg = shpc_readw(ctrl, SEC_BUS_CONFIG);
+        u8 pi = shpc_readb(ctrl, PROG_INTERFACE);
+        u8 speed_mode = (pi == 2) ? (sec_bus_reg & 0xF) : (sec_bus_reg & 0x7);
+
+        if ((pi == 1) && (speed_mode > 4)) {
+                retval = -ENODEV;
+                goto out;
+        }
+
+        switch (speed_mode) {
+        case 0x0:
+                bus_speed = PCI_SPEED_33MHz;
+                break;
+        case 0x1:
+                bus_speed = PCI_SPEED_66MHz;
+                break;
+        case 0x2:
+                bus_speed = PCI_SPEED_66MHz_PCIX;
+                break;
+        case 0x3:
+                bus_speed = PCI_SPEED_100MHz_PCIX;
+                break;
+        case 0x4:
+                bus_speed = PCI_SPEED_133MHz_PCIX;
+                break;
+        case 0x5:
+                bus_speed = PCI_SPEED_66MHz_PCIX_ECC;
+                break;
+        case 0x6:
+                bus_speed = PCI_SPEED_100MHz_PCIX_ECC;
+                break;
+        case 0x7:
+                bus_speed = PCI_SPEED_133MHz_PCIX_ECC;
+                break;
+        case 0x8:
+                bus_speed = PCI_SPEED_66MHz_PCIX_266;
+                break;
+        case 0x9:
+                bus_speed = PCI_SPEED_100MHz_PCIX_266;
+                break;
+        case 0xa:
+                bus_speed = PCI_SPEED_133MHz_PCIX_266;
+                break;
+        case 0xb:
+                bus_speed = PCI_SPEED_66MHz_PCIX_533;
+                break;
+        case 0xc:
+                bus_speed = PCI_SPEED_100MHz_PCIX_533;
+                break;
+        case 0xd:
+                bus_speed = PCI_SPEED_133MHz_PCIX_533;
+                break;
+        default:
+                retval = -ENODEV;
+                break;
+        }
+
+ out:
+        bus->cur_bus_speed = bus_speed;
+        dbg("Current bus speed = %d\n", bus_speed);
+        return retval;
+}
+
+
 static int hpc_set_bus_speed_mode(struct slot * slot, enum pci_bus_speed value)
 {
         int retval;
@@ -720,6 +789,8 @@ static int hpc_set_bus_speed_mode(struct slot * slot, enum pci_bus_speed value)
         retval = shpc_write_cmd(slot, 0, cmd);
         if (retval)
                 ctrl_err(ctrl, "%s: Write command failed!\n", __func__);
+        else
+                shpc_get_cur_bus_speed(ctrl);
 
         return retval;
 }
@@ -803,10 +874,10 @@ static irqreturn_t shpc_isr(int irq, void *dev_id)
         return IRQ_HANDLED;
 }
 
-static int hpc_get_max_bus_speed (struct slot *slot, enum pci_bus_speed *value)
+static int shpc_get_max_bus_speed(struct controller *ctrl)
 {
         int retval = 0;
-        struct controller *ctrl = slot->ctrl;
+        struct pci_bus *bus = ctrl->pci_dev->subordinate;
         enum pci_bus_speed bus_speed = PCI_SPEED_UNKNOWN;
         u8 pi = shpc_readb(ctrl, PROG_INTERFACE);
         u32 slot_avail1 = shpc_readl(ctrl, SLOT_AVAIL1);
@@ -842,79 +913,12 @@ static int hpc_get_max_bus_speed (struct slot *slot, enum pci_bus_speed *value)
                         retval = -ENODEV;
         }
 
-        *value = bus_speed;
+        bus->max_bus_speed = bus_speed;
         ctrl_dbg(ctrl, "Max bus speed = %d\n", bus_speed);
 
         return retval;
 }
 
-static int hpc_get_cur_bus_speed (struct slot *slot, enum pci_bus_speed *value)
-{
-        int retval = 0;
-        struct controller *ctrl = slot->ctrl;
-        enum pci_bus_speed bus_speed = PCI_SPEED_UNKNOWN;
-        u16 sec_bus_reg = shpc_readw(ctrl, SEC_BUS_CONFIG);
-        u8 pi = shpc_readb(ctrl, PROG_INTERFACE);
-        u8 speed_mode = (pi == 2) ? (sec_bus_reg & 0xF) : (sec_bus_reg & 0x7);
-
-        if ((pi == 1) && (speed_mode > 4)) {
-                *value = PCI_SPEED_UNKNOWN;
-                return -ENODEV;
-        }
-
-        switch (speed_mode) {
-        case 0x0:
-                *value = PCI_SPEED_33MHz;
-                break;
-        case 0x1:
-                *value = PCI_SPEED_66MHz;
-                break;
-        case 0x2:
-                *value = PCI_SPEED_66MHz_PCIX;
-                break;
-        case 0x3:
-                *value = PCI_SPEED_100MHz_PCIX;
-                break;
-        case 0x4:
-                *value = PCI_SPEED_133MHz_PCIX;
-                break;
-        case 0x5:
-                *value = PCI_SPEED_66MHz_PCIX_ECC;
-                break;
-        case 0x6:
-                *value = PCI_SPEED_100MHz_PCIX_ECC;
-                break;
-        case 0x7:
-                *value = PCI_SPEED_133MHz_PCIX_ECC;
-                break;
-        case 0x8:
-                *value = PCI_SPEED_66MHz_PCIX_266;
-                break;
-        case 0x9:
-                *value = PCI_SPEED_100MHz_PCIX_266;
-                break;
-        case 0xa:
-                *value = PCI_SPEED_133MHz_PCIX_266;
-                break;
-        case 0xb:
-                *value = PCI_SPEED_66MHz_PCIX_533;
-                break;
-        case 0xc:
-                *value = PCI_SPEED_100MHz_PCIX_533;
-                break;
-        case 0xd:
-                *value = PCI_SPEED_133MHz_PCIX_533;
-                break;
-        default:
-                *value = PCI_SPEED_UNKNOWN;
-                retval = -ENODEV;
-                break;
-        }
-
-        ctrl_dbg(ctrl, "Current bus speed = %d\n", bus_speed);
-        return retval;
-}
-
 static struct hpc_ops shpchp_hpc_ops = {
         .power_on_slot                  = hpc_power_on_slot,
         .slot_enable                    = hpc_slot_enable,
@@ -926,8 +930,6 @@ static struct hpc_ops shpchp_hpc_ops = {
         .get_latch_status               = hpc_get_latch_status,
         .get_adapter_status             = hpc_get_adapter_status,
 
-        .get_max_bus_speed              = hpc_get_max_bus_speed,
-        .get_cur_bus_speed              = hpc_get_cur_bus_speed,
         .get_adapter_speed              = hpc_get_adapter_speed,
         .get_mode1_ECC_cap              = hpc_get_mode1_ECC_cap,
         .get_prog_int                   = hpc_get_prog_int,
@@ -1086,6 +1088,9 @@ int shpc_init(struct controller *ctrl, struct pci_dev *pdev)
         }
         ctrl_dbg(ctrl, "HPC at %s irq=%x\n", pci_name(pdev), pdev->irq);
 
+        shpc_get_max_bus_speed(ctrl);
+        shpc_get_cur_bus_speed(ctrl);
+
         /*
          * If this is the first controller to be initialized,
          * initialize the shpchpd work queue
diff --git a/drivers/pci/hotplug/shpchp_sysfs.c b/drivers/pci/hotplug/shpchp_sysfs.c
index 29fa9d26adae..071b7dc0094b 100644
--- a/drivers/pci/hotplug/shpchp_sysfs.c
+++ b/drivers/pci/hotplug/shpchp_sysfs.c
@@ -47,8 +47,7 @@ static ssize_t show_ctrl (struct device *dev, struct device_attribute *attr, cha
         bus = pdev->subordinate;
 
         out += sprintf(buf, "Free resources: memory\n");
-        for (index = 0; index < PCI_BUS_NUM_RESOURCES; index++) {
-                res = bus->resource[index];
+        pci_bus_for_each_resource(bus, res, index) {
                 if (res && (res->flags & IORESOURCE_MEM) &&
                                 !(res->flags & IORESOURCE_PREFETCH)) {
                         out += sprintf(out, "start = %8.8llx, "
@@ -58,8 +57,7 @@ static ssize_t show_ctrl (struct device *dev, struct device_attribute *attr, cha
                 }
         }
         out += sprintf(out, "Free resources: prefetchable memory\n");
-        for (index = 0; index < PCI_BUS_NUM_RESOURCES; index++) {
-                res = bus->resource[index];
+        pci_bus_for_each_resource(bus, res, index) {
                 if (res && (res->flags & IORESOURCE_MEM) &&
                                (res->flags & IORESOURCE_PREFETCH)) {
                         out += sprintf(out, "start = %8.8llx, "
@@ -69,8 +67,7 @@ static ssize_t show_ctrl (struct device *dev, struct device_attribute *attr, cha
                 }
         }
         out += sprintf(out, "Free resources: IO\n");
-        for (index = 0; index < PCI_BUS_NUM_RESOURCES; index++) {
-                res = bus->resource[index];
+        pci_bus_for_each_resource(bus, res, index) {
                 if (res && (res->flags & IORESOURCE_IO)) {
                         out += sprintf(out, "start = %8.8llx, "
                                         "length = %8.8llx\n",
diff --git a/drivers/pci/htirq.c b/drivers/pci/htirq.c
index 737a1c44b07a..98abf8b91294 100644
--- a/drivers/pci/htirq.c
+++ b/drivers/pci/htirq.c
@@ -10,7 +10,6 @@
 #include <linux/pci.h>
 #include <linux/spinlock.h>
 #include <linux/slab.h>
-#include <linux/gfp.h>
 #include <linux/htirq.h>
 
 /* Global ht irq lock.
diff --git a/drivers/pci/intel-iommu.c b/drivers/pci/intel-iommu.c
index 1840a0578a42..417312528ddf 100644
--- a/drivers/pci/intel-iommu.c
+++ b/drivers/pci/intel-iommu.c
@@ -277,6 +277,7 @@ static int hw_pass_through = 1;
 
 struct dmar_domain {
         int     id;                     /* domain id */
+        int     nid;                    /* node id */
         unsigned long iommu_bmp;        /* bitmap of iommus this domain uses*/
 
         struct list_head devices;       /* all devices' list */
@@ -304,7 +305,7 @@ struct device_domain_info {
         int segment;            /* PCI domain */
         u8 bus;                 /* PCI bus number */
         u8 devfn;               /* PCI devfn number */
-        struct pci_dev *dev; /* it's NULL for PCIE-to-PCI bridge */
+        struct pci_dev *dev; /* it's NULL for PCIe-to-PCI bridge */
         struct intel_iommu *iommu; /* IOMMU used by this device */
         struct dmar_domain *domain; /* pointer to domain */
 };
@@ -386,30 +387,14 @@ static struct kmem_cache *iommu_domain_cache;
 static struct kmem_cache *iommu_devinfo_cache;
 static struct kmem_cache *iommu_iova_cache;
 
-static inline void *iommu_kmem_cache_alloc(struct kmem_cache *cachep)
+static inline void *alloc_pgtable_page(int node)
 {
-        unsigned int flags;
-        void *vaddr;
-
-        /* trying to avoid low memory issues */
-        flags = current->flags & PF_MEMALLOC;
-        current->flags |= PF_MEMALLOC;
-        vaddr = kmem_cache_alloc(cachep, GFP_ATOMIC);
-        current->flags &= (~PF_MEMALLOC | flags);
-        return vaddr;
-}
-
+        struct page *page;
+        void *vaddr = NULL;
 
-static inline void *alloc_pgtable_page(void)
-{
-        unsigned int flags;
-        void *vaddr;
-
-        /* trying to avoid low memory issues */
-        flags = current->flags & PF_MEMALLOC;
-        current->flags |= PF_MEMALLOC;
-        vaddr = (void *)get_zeroed_page(GFP_ATOMIC);
-        current->flags &= (~PF_MEMALLOC | flags);
+        page = alloc_pages_node(node, GFP_ATOMIC | __GFP_ZERO, 0);
+        if (page)
+                vaddr = page_address(page);
         return vaddr;
 }
 
@@ -420,7 +405,7 @@ static inline void free_pgtable_page(void *vaddr)
 
 static inline void *alloc_domain_mem(void)
 {
-        return iommu_kmem_cache_alloc(iommu_domain_cache);
+        return kmem_cache_alloc(iommu_domain_cache, GFP_ATOMIC);
 }
 
 static void free_domain_mem(void *vaddr)
@@ -430,7 +415,7 @@ static void free_domain_mem(void *vaddr)
 
 static inline void * alloc_devinfo_mem(void)
 {
-        return iommu_kmem_cache_alloc(iommu_devinfo_cache);
+        return kmem_cache_alloc(iommu_devinfo_cache, GFP_ATOMIC);
 }
 
 static inline void free_devinfo_mem(void *vaddr)
@@ -440,7 +425,7 @@ static inline void free_devinfo_mem(void *vaddr)
 
 struct iova *alloc_iova_mem(void)
 {
-        return iommu_kmem_cache_alloc(iommu_iova_cache);
+        return kmem_cache_alloc(iommu_iova_cache, GFP_ATOMIC);
 }
 
 void free_iova_mem(struct iova *iova)
@@ -589,7 +574,8 @@ static struct context_entry * device_to_context_entry(struct intel_iommu *iommu,
         root = &iommu->root_entry[bus];
         context = get_context_addr_from_root(root);
         if (!context) {
-                context = (struct context_entry *)alloc_pgtable_page();
+                context = (struct context_entry *)
+                                alloc_pgtable_page(iommu->node);
                 if (!context) {
                         spin_unlock_irqrestore(&iommu->lock, flags);
                         return NULL;
@@ -732,7 +718,7 @@ static struct dma_pte *pfn_to_dma_pte(struct dmar_domain *domain,
                 if (!dma_pte_present(pte)) {
                         uint64_t pteval;
 
-                        tmp_page = alloc_pgtable_page();
+                        tmp_page = alloc_pgtable_page(domain->nid);
 
                         if (!tmp_page)
                                 return NULL;
@@ -868,7 +854,7 @@ static int iommu_alloc_root_entry(struct intel_iommu *iommu)
         struct root_entry *root;
         unsigned long flags;
 
-        root = (struct root_entry *)alloc_pgtable_page();
+        root = (struct root_entry *)alloc_pgtable_page(iommu->node);
         if (!root)
                 return -ENOMEM;
 
@@ -1263,6 +1249,7 @@ static struct dmar_domain *alloc_domain(void)
         if (!domain)
                 return NULL;
 
+        domain->nid = -1;
         memset(&domain->iommu_bmp, 0, sizeof(unsigned long));
         domain->flags = 0;
 
@@ -1420,9 +1407,10 @@ static int domain_init(struct dmar_domain *domain, int guest_width)
                 domain->iommu_snooping = 0;
 
         domain->iommu_count = 1;
+        domain->nid = iommu->node;
 
         /* always allocate the top pgd */
-        domain->pgd = (struct dma_pte *)alloc_pgtable_page();
+        domain->pgd = (struct dma_pte *)alloc_pgtable_page(domain->nid);
         if (!domain->pgd)
                 return -ENOMEM;
         __iommu_flush_cache(iommu, domain->pgd, PAGE_SIZE);
@@ -1523,12 +1511,15 @@ static int domain_context_mapping_one(struct dmar_domain *domain, int segment,
 
                 /* Skip top levels of page tables for
                  * iommu which has less agaw than default.
+                 * Unnecessary for PT mode.
                  */
-                for (agaw = domain->agaw; agaw != iommu->agaw; agaw--) {
-                        pgd = phys_to_virt(dma_pte_addr(pgd));
-                        if (!dma_pte_present(pgd)) {
-                                spin_unlock_irqrestore(&iommu->lock, flags);
-                                return -ENOMEM;
+                if (translation != CONTEXT_TT_PASS_THROUGH) {
+                        for (agaw = domain->agaw; agaw != iommu->agaw; agaw--) {
+                                pgd = phys_to_virt(dma_pte_addr(pgd));
+                                if (!dma_pte_present(pgd)) {
+                                        spin_unlock_irqrestore(&iommu->lock, flags);
+                                        return -ENOMEM;
+                                }
                         }
                 }
         }
@@ -1577,6 +1568,8 @@ static int domain_context_mapping_one(struct dmar_domain *domain, int segment,
         spin_lock_irqsave(&domain->iommu_lock, flags);
         if (!test_and_set_bit(iommu->seq_id, &domain->iommu_bmp)) {
                 domain->iommu_count++;
+                if (domain->iommu_count == 1)
+                        domain->nid = iommu->node;
                 domain_update_iommu_cap(domain);
         }
         spin_unlock_irqrestore(&domain->iommu_lock, flags);
@@ -1611,7 +1604,7 @@ domain_context_mapping(struct dmar_domain *domain, struct pci_dev *pdev,
                         return ret;
                 parent = parent->bus->self;
         }
-        if (tmp->is_pcie) /* this is a PCIE-to-PCI bridge */
+        if (pci_is_pcie(tmp)) /* this is a PCIe-to-PCI bridge */
                 return domain_context_mapping_one(domain,
                                         pci_domain_nr(tmp->subordinate),
                                         tmp->subordinate->number, 0,
@@ -1651,7 +1644,7 @@ static int domain_context_mapped(struct pci_dev *pdev)
                         return ret;
                 parent = parent->bus->self;
         }
-        if (tmp->is_pcie)
+        if (pci_is_pcie(tmp))
                 return device_context_mapped(iommu, tmp->subordinate->number,
                                              0);
         else
@@ -1821,7 +1814,7 @@ static struct dmar_domain *get_domain_for_dev(struct pci_dev *pdev, int gaw)
 
         dev_tmp = pci_find_upstream_pcie_bridge(pdev);
         if (dev_tmp) {
-                if (dev_tmp->is_pcie) {
+                if (pci_is_pcie(dev_tmp)) {
                         bus = dev_tmp->subordinate->number;
                         devfn = 0;
                 } else {
@@ -1991,6 +1984,16 @@ static int iommu_prepare_identity_map(struct pci_dev *pdev,
                "IOMMU: Setting identity map for device %s [0x%Lx - 0x%Lx]\n",
                pci_name(pdev), start, end);
         
+        if (end < start) {
+                WARN(1, "Your BIOS is broken; RMRR ends before it starts!\n"
+                        "BIOS vendor: %s; Ver: %s; Product Version: %s\n",
+                        dmi_get_system_info(DMI_BIOS_VENDOR),
+                        dmi_get_system_info(DMI_BIOS_VERSION),
+                     dmi_get_system_info(DMI_PRODUCT_VERSION));
+                ret = -EIO;
+                goto error;
+        }
+
         if (end >> agaw_to_width(domain->agaw)) {
                 WARN(1, "Your BIOS is broken; RMRR exceeds permitted address width (%d bits)\n"
                      "BIOS vendor: %s; Ver: %s; Product Version: %s\n",
@@ -2182,7 +2185,7 @@ static int iommu_should_identity_map(struct pci_dev *pdev, int startup)
          * the 1:1 domain, just in _case_ one of their siblings turns out
          * not to be able to map all of memory.
          */
-        if (!pdev->is_pcie) {
+        if (!pci_is_pcie(pdev)) {
                 if (!pci_is_root_bus(pdev->bus))
                         return 0;
                 if (pdev->class >> 8 == PCI_CLASS_BRIDGE_PCI)
@@ -3228,6 +3231,9 @@ static int device_notifier(struct notifier_block *nb,
         struct pci_dev *pdev = to_pci_dev(dev);
         struct dmar_domain *domain;
 
+        if (iommu_no_mapping(dev))
+                return 0;
+
         domain = find_domain(pdev);
         if (!domain)
                 return 0;
@@ -3266,7 +3272,7 @@ int __init intel_iommu_init(void)
          * Check the need for DMA-remapping initialization now.
          * Above initialization will also be used by Interrupt-remapping.
          */
-        if (no_iommu || swiotlb || dmar_disabled)
+        if (no_iommu || dmar_disabled)
                 return -ENODEV;
 
         iommu_init_mempool();
@@ -3287,7 +3293,9 @@ int __init intel_iommu_init(void)
         "PCI-DMA: Intel(R) Virtualization Technology for Directed I/O\n");
 
         init_timer(&unmap_timer);
-        force_iommu = 1;
+#ifdef CONFIG_SWIOTLB
+        swiotlb = 0;
+#endif
         dma_ops = &intel_dma_ops;
 
         init_iommu_sysfs();
@@ -3317,7 +3325,7 @@ static void iommu_detach_dependent_devices(struct intel_iommu *iommu,
                                          parent->devfn);
                         parent = parent->bus->self;
                 }
-                if (tmp->is_pcie) /* this is a PCIE-to-PCI bridge */
+                if (pci_is_pcie(tmp)) /* this is a PCIe-to-PCI bridge */
                         iommu_detach_dev(iommu,
                                 tmp->subordinate->number, 0);
                 else /* this is a legacy PCI bridge */
@@ -3453,6 +3461,7 @@ static struct dmar_domain *iommu_alloc_vm_domain(void)
                 return NULL;
 
         domain->id = vm_domid++;
+        domain->nid = -1;
         memset(&domain->iommu_bmp, 0, sizeof(unsigned long));
         domain->flags = DOMAIN_FLAG_VIRTUAL_MACHINE;
 
@@ -3479,9 +3488,10 @@ static int md_domain_init(struct dmar_domain *domain, int guest_width)
         domain->iommu_coherency = 0;
         domain->iommu_snooping = 0;
         domain->max_addr = 0;
+        domain->nid = -1;
 
         /* always allocate the top pgd */
-        domain->pgd = (struct dma_pte *)alloc_pgtable_page();
+        domain->pgd = (struct dma_pte *)alloc_pgtable_page(domain->nid);
         if (!domain->pgd)
                 return -ENOMEM;
         domain_flush_cache(domain, domain->pgd, PAGE_SIZE);
diff --git a/drivers/pci/intr_remapping.c b/drivers/pci/intr_remapping.c
index 0ed78a764ded..6ee98a56946f 100644
--- a/drivers/pci/intr_remapping.c
+++ b/drivers/pci/intr_remapping.c
@@ -1,7 +1,9 @@
 #include <linux/interrupt.h>
 #include <linux/dmar.h>
 #include <linux/spinlock.h>
+#include <linux/slab.h>
 #include <linux/jiffies.h>
+#include <linux/hpet.h>
 #include <linux/pci.h>
 #include <linux/irq.h>
 #include <asm/io_apic.h>
@@ -14,7 +16,8 @@
 #include "pci.h"
 
 static struct ioapic_scope ir_ioapic[MAX_IO_APICS];
-static int ir_ioapic_num;
+static struct hpet_scope ir_hpet[MAX_HPET_TBS];
+static int ir_ioapic_num, ir_hpet_num;
 int intr_remapping_enabled;
 
 static int disable_intremap;
@@ -343,6 +346,16 @@ int flush_irte(int irq)
         return rc;
 }
 
+struct intel_iommu *map_hpet_to_ir(u8 hpet_id)
+{
+        int i;
+
+        for (i = 0; i < MAX_HPET_TBS; i++)
+                if (ir_hpet[i].id == hpet_id)
+                        return ir_hpet[i].iommu;
+        return NULL;
+}
+
 struct intel_iommu *map_ioapic_to_ir(int apic)
 {
         int i;
@@ -470,6 +483,36 @@ int set_ioapic_sid(struct irte *irte, int apic)
         return 0;
 }
 
+int set_hpet_sid(struct irte *irte, u8 id)
+{
+        int i;
+        u16 sid = 0;
+
+        if (!irte)
+                return -1;
+
+        for (i = 0; i < MAX_HPET_TBS; i++) {
+                if (ir_hpet[i].id == id) {
+                        sid = (ir_hpet[i].bus << 8) | ir_hpet[i].devfn;
+                        break;
+                }
+        }
+
+        if (sid == 0) {
+                pr_warning("Failed to set source-id of HPET block (%d)\n", id);
+                return -1;
+        }
+
+        /*
+         * Should really use SQ_ALL_16. Some platforms are broken.
+         * While we figure out the right quirks for these broken platforms, use
+         * SQ_13_IGNORE_3 for now.
+         */
+        set_irte_sid(irte, SVT_VERIFY_SID_SQ, SQ_13_IGNORE_3, sid);
+
+        return 0;
+}
+
 int set_msi_sid(struct irte *irte, struct pci_dev *dev)
 {
         struct pci_dev *bridge;
@@ -478,7 +521,7 @@ int set_msi_sid(struct irte *irte, struct pci_dev *dev)
                 return -1;
 
         /* PCIe device or Root Complex integrated PCI device */
-        if (dev->is_pcie || !dev->bus->parent) {
+        if (pci_is_pcie(dev) || !dev->bus->parent) {
                 set_irte_sid(irte, SVT_VERIFY_SID_SQ, SQ_ALL_16,
                              (dev->bus->number << 8) | dev->devfn);
                 return 0;
@@ -486,7 +529,7 @@ int set_msi_sid(struct irte *irte, struct pci_dev *dev)
 
         bridge = pci_find_upstream_pcie_bridge(dev);
         if (bridge) {
-                if (bridge->is_pcie) /* this is a PCIE-to-PCI/PCIX bridge */
+                if (pci_is_pcie(bridge))/* this is a PCIe-to-PCI/PCIX bridge */
                         set_irte_sid(irte, SVT_VERIFY_BUS, SQ_ALL_16,
                                 (bridge->bus->number << 8) | dev->bus->number);
                 else /* this is a legacy PCI bridge */
@@ -548,7 +591,8 @@ static int setup_intr_remapping(struct intel_iommu *iommu, int mode)
         if (!iommu->ir_table)
                 return -ENOMEM;
 
-        pages = alloc_pages(GFP_ATOMIC | __GFP_ZERO, INTR_REMAP_PAGE_ORDER);
+        pages = alloc_pages_node(iommu->node, GFP_ATOMIC | __GFP_ZERO,
+                                 INTR_REMAP_PAGE_ORDER);
 
         if (!pages) {
                 printk(KERN_ERR "failed to allocate pages of order %d\n",
@@ -711,6 +755,34 @@ error:
         return -1;
 }
 
+static void ir_parse_one_hpet_scope(struct acpi_dmar_device_scope *scope,
+                                      struct intel_iommu *iommu)
+{
+        struct acpi_dmar_pci_path *path;
+        u8 bus;
+        int count;
+
+        bus = scope->bus;
+        path = (struct acpi_dmar_pci_path *)(scope + 1);
+        count = (scope->length - sizeof(struct acpi_dmar_device_scope))
+                / sizeof(struct acpi_dmar_pci_path);
+
+        while (--count > 0) {
+                /*
+                 * Access PCI directly due to the PCI
+                 * subsystem isn't initialized yet.
+                 */
+                bus = read_pci_config_byte(bus, path->dev, path->fn,
+                                           PCI_SECONDARY_BUS);
+                path++;
+        }
+        ir_hpet[ir_hpet_num].bus   = bus;
+        ir_hpet[ir_hpet_num].devfn = PCI_DEVFN(path->dev, path->fn);
+        ir_hpet[ir_hpet_num].iommu = iommu;
+        ir_hpet[ir_hpet_num].id    = scope->enumeration_id;
+        ir_hpet_num++;
+}
+
 static void ir_parse_one_ioapic_scope(struct acpi_dmar_device_scope *scope,
                                       struct intel_iommu *iommu)
 {
@@ -740,8 +812,8 @@ static void ir_parse_one_ioapic_scope(struct acpi_dmar_device_scope *scope,
         ir_ioapic_num++;
 }
 
-static int ir_parse_ioapic_scope(struct acpi_dmar_header *header,
-                                 struct intel_iommu *iommu)
+static int ir_parse_ioapic_hpet_scope(struct acpi_dmar_header *header,
+                                      struct intel_iommu *iommu)
 {
         struct acpi_dmar_hardware_unit *drhd;
         struct acpi_dmar_device_scope *scope;
@@ -765,6 +837,17 @@ static int ir_parse_ioapic_scope(struct acpi_dmar_header *header,
                                drhd->address);
 
                         ir_parse_one_ioapic_scope(scope, iommu);
+                } else if (scope->entry_type == ACPI_DMAR_SCOPE_TYPE_HPET) {
+                        if (ir_hpet_num == MAX_HPET_TBS) {
+                                printk(KERN_WARNING "Exceeded Max HPET blocks\n");
+                                return -1;
+                        }
+
+                        printk(KERN_INFO "HPET id %d under DRHD base"
+                               " 0x%Lx\n", scope->enumeration_id,
+                               drhd->address);
+
+                        ir_parse_one_hpet_scope(scope, iommu);
                 }
                 start += scope->length;
         }
@@ -785,7 +868,7 @@ int __init parse_ioapics_under_ir(void)
                 struct intel_iommu *iommu = drhd->iommu;
 
                 if (ecap_ir_support(iommu->ecap)) {
-                        if (ir_parse_ioapic_scope(drhd->hdr, iommu))
+                        if (ir_parse_ioapic_hpet_scope(drhd->hdr, iommu))
                                 return -1;
 
                         ir_supported = 1;
diff --git a/drivers/pci/intr_remapping.h b/drivers/pci/intr_remapping.h
index 63a263c18415..5662fecfee60 100644
--- a/drivers/pci/intr_remapping.h
+++ b/drivers/pci/intr_remapping.h
@@ -7,4 +7,11 @@ struct ioapic_scope {
         unsigned int devfn;     /* PCI devfn number */
 };
 
+struct hpet_scope {
+        struct intel_iommu *iommu;
+        u8 id;
+        unsigned int bus;
+        unsigned int devfn;
+};
+
 #define IR_X2APIC_MODE(mode) (mode ? (1 << 11) : 0)
diff --git a/drivers/pci/ioapic.c b/drivers/pci/ioapic.c
new file mode 100644
index 000000000000..203508b227b7
--- /dev/null
+++ b/drivers/pci/ioapic.c
@@ -0,0 +1,127 @@
+/*
+ * IOAPIC/IOxAPIC/IOSAPIC driver
+ *
+ * Copyright (C) 2009 Fujitsu Limited.
+ * (c) Copyright 2009 Hewlett-Packard Development Company, L.P.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/*
+ * This driver manages PCI I/O APICs added by hotplug after boot.  We try to
+ * claim all I/O APIC PCI devices, but those present at boot were registered
+ * when we parsed the ACPI MADT, so we'll fail when we try to re-register
+ * them.
+ */
+
+#include <linux/pci.h>
+#include <linux/acpi.h>
+#include <linux/slab.h>
+#include <acpi/acpi_bus.h>
+
+struct ioapic {
+        acpi_handle     handle;
+        u32             gsi_base;
+};
+
+static int ioapic_probe(struct pci_dev *dev, const struct pci_device_id *ent)
+{
+        acpi_handle handle;
+        acpi_status status;
+        unsigned long long gsb;
+        struct ioapic *ioapic;
+        int ret;
+        char *type;
+        struct resource *res;
+
+        handle = DEVICE_ACPI_HANDLE(&dev->dev);
+        if (!handle)
+                return -EINVAL;
+
+        status = acpi_evaluate_integer(handle, "_GSB", NULL, &gsb);
+        if (ACPI_FAILURE(status))
+                return -EINVAL;
+
+        /*
+         * The previous code in acpiphp evaluated _MAT if _GSB failed, but
+         * ACPI spec 4.0 sec 6.2.2 requires _GSB for hot-pluggable I/O APICs.
+         */
+
+        ioapic = kzalloc(sizeof(*ioapic), GFP_KERNEL);
+        if (!ioapic)
+                return -ENOMEM;
+
+        ioapic->handle = handle;
+        ioapic->gsi_base = (u32) gsb;
+
+        if (dev->class == PCI_CLASS_SYSTEM_PIC_IOAPIC)
+                type = "IOAPIC";
+        else
+                type = "IOxAPIC";
+
+        ret = pci_enable_device(dev);
+        if (ret < 0)
+                goto exit_free;
+
+        pci_set_master(dev);
+
+        if (pci_request_region(dev, 0, type))
+                goto exit_disable;
+
+        res = &dev->resource[0];
+        if (acpi_register_ioapic(ioapic->handle, res->start, ioapic->gsi_base))
+                goto exit_release;
+
+        pci_set_drvdata(dev, ioapic);
+        dev_info(&dev->dev, "%s at %pR, GSI %u\n", type, res, ioapic->gsi_base);
+        return 0;
+
+exit_release:
+        pci_release_region(dev, 0);
+exit_disable:
+        pci_disable_device(dev);
+exit_free:
+        kfree(ioapic);
+        return -ENODEV;
+}
+
+static void ioapic_remove(struct pci_dev *dev)
+{
+        struct ioapic *ioapic = pci_get_drvdata(dev);
+
+        acpi_unregister_ioapic(ioapic->handle, ioapic->gsi_base);
+        pci_release_region(dev, 0);
+        pci_disable_device(dev);
+        kfree(ioapic);
+}
+
+
+static struct pci_device_id ioapic_devices[] = {
+        { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
+          PCI_CLASS_SYSTEM_PIC_IOAPIC << 8, 0xffff00, },
+        { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
+          PCI_CLASS_SYSTEM_PIC_IOXAPIC << 8, 0xffff00, },
+        { }
+};
+
+static struct pci_driver ioapic_driver = {
+        .name           = "ioapic",
+        .id_table       = ioapic_devices,
+        .probe          = ioapic_probe,
+        .remove         = __devexit_p(ioapic_remove),
+};
+
+static int __init ioapic_init(void)
+{
+        return pci_register_driver(&ioapic_driver);
+}
+
+static void __exit ioapic_exit(void)
+{
+        pci_unregister_driver(&ioapic_driver);
+}
+
+module_init(ioapic_init);
+module_exit(ioapic_exit);
diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c
index e03fe98f0619..ce6a3666b3d9 100644
--- a/drivers/pci/iov.c
+++ b/drivers/pci/iov.c
@@ -9,6 +9,7 @@
  */
 
 #include <linux/pci.h>
+#include <linux/slab.h>
 #include <linux/mutex.h>
 #include <linux/string.h>
 #include <linux/delay.h>
@@ -555,7 +556,7 @@ int pci_iov_init(struct pci_dev *dev)
 {
         int pos;
 
-        if (!dev->is_pcie)
+        if (!pci_is_pcie(dev))
                 return -ENODEV;
 
         pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
@@ -706,6 +707,21 @@ irqreturn_t pci_sriov_migration(struct pci_dev *dev)
 }
 EXPORT_SYMBOL_GPL(pci_sriov_migration);
 
+/**
+ * pci_num_vf - return number of VFs associated with a PF device_release_driver
+ * @dev: the PCI device
+ *
+ * Returns number of VFs, or 0 if SR-IOV is not enabled.
+ */
+int pci_num_vf(struct pci_dev *dev)
+{
+        if (!dev || !dev->is_physfn)
+                return 0;
+        else
+                return dev->sriov->nr_virtfn;
+}
+EXPORT_SYMBOL_GPL(pci_num_vf);
+
 static int ats_alloc_one(struct pci_dev *dev, int ps)
 {
         int pos;
diff --git a/drivers/pci/legacy.c b/drivers/pci/legacy.c
deleted file mode 100644
index 871f65c15936..000000000000
--- a/drivers/pci/legacy.c
+++ /dev/null
@@ -1,34 +0,0 @@
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <linux/module.h>
-#include <linux/interrupt.h>
-#include "pci.h"
-
-/**
- * pci_find_device - begin or continue searching for a PCI device by vendor/device id
- * @vendor: PCI vendor id to match, or %PCI_ANY_ID to match all vendor ids
- * @device: PCI device id to match, or %PCI_ANY_ID to match all device ids
- * @from: Previous PCI device found in search, or %NULL for new search.
- *
- * Iterates through the list of known PCI devices.  If a PCI device is found
- * with a matching @vendor and @device, a pointer to its device structure is
- * returned.  Otherwise, %NULL is returned.
- * A new search is initiated by passing %NULL as the @from argument.
- * Otherwise if @from is not %NULL, searches continue from next device
- * on the global list.
- *
- * NOTE: Do not use this function any more; use pci_get_device() instead, as
- * the PCI device returned by this function can disappear at any moment in
- * time.
- */
-struct pci_dev *pci_find_device(unsigned int vendor, unsigned int device,
-                                struct pci_dev *from)
-{
-        struct pci_dev *pdev;
-
-        pci_dev_get(from);
-        pdev = pci_get_subsys(vendor, device, PCI_ANY_ID, PCI_ANY_ID, from);
-        pci_dev_put(pdev);
-        return pdev;
-}
-EXPORT_SYMBOL(pci_find_device);
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index f9cf3173b23d..77b68eaf021e 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -18,6 +18,7 @@
 #include <linux/smp.h>
 #include <linux/errno.h>
 #include <linux/io.h>
+#include <linux/slab.h>
 
 #include "pci.h"
 #include "msi.h"
diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c
index 33317df47699..2e7a3bf13824 100644
--- a/drivers/pci/pci-acpi.c
+++ b/drivers/pci/pci-acpi.c
@@ -16,8 +16,144 @@
 #include <acpi/acpi_bus.h>
 
 #include <linux/pci-acpi.h>
+#include <linux/pm_runtime.h>
 #include "pci.h"
 
+static DEFINE_MUTEX(pci_acpi_pm_notify_mtx);
+
+/**
+ * pci_acpi_wake_bus - Wake-up notification handler for root buses.
+ * @handle: ACPI handle of a device the notification is for.
+ * @event: Type of the signaled event.
+ * @context: PCI root bus to wake up devices on.
+ */
+static void pci_acpi_wake_bus(acpi_handle handle, u32 event, void *context)
+{
+        struct pci_bus *pci_bus = context;
+
+        if (event == ACPI_NOTIFY_DEVICE_WAKE && pci_bus)
+                pci_pme_wakeup_bus(pci_bus);
+}
+
+/**
+ * pci_acpi_wake_dev - Wake-up notification handler for PCI devices.
+ * @handle: ACPI handle of a device the notification is for.
+ * @event: Type of the signaled event.
+ * @context: PCI device object to wake up.
+ */
+static void pci_acpi_wake_dev(acpi_handle handle, u32 event, void *context)
+{
+        struct pci_dev *pci_dev = context;
+
+        if (event == ACPI_NOTIFY_DEVICE_WAKE && pci_dev) {
+                pci_check_pme_status(pci_dev);
+                pm_runtime_resume(&pci_dev->dev);
+                if (pci_dev->subordinate)
+                        pci_pme_wakeup_bus(pci_dev->subordinate);
+        }
+}
+
+/**
+ * add_pm_notifier - Register PM notifier for given ACPI device.
+ * @dev: ACPI device to add the notifier for.
+ * @context: PCI device or bus to check for PME status if an event is signaled.
+ *
+ * NOTE: @dev need not be a run-wake or wake-up device to be a valid source of
+ * PM wake-up events.  For example, wake-up events may be generated for bridges
+ * if one of the devices below the bridge is signaling PME, even if the bridge
+ * itself doesn't have a wake-up GPE associated with it.
+ */
+static acpi_status add_pm_notifier(struct acpi_device *dev,
+                                   acpi_notify_handler handler,
+                                   void *context)
+{
+        acpi_status status = AE_ALREADY_EXISTS;
+
+        mutex_lock(&pci_acpi_pm_notify_mtx);
+
+        if (dev->wakeup.flags.notifier_present)
+                goto out;
+
+        status = acpi_install_notify_handler(dev->handle,
+                                             ACPI_SYSTEM_NOTIFY,
+                                             handler, context);
+        if (ACPI_FAILURE(status))
+                goto out;
+
+        dev->wakeup.flags.notifier_present = true;
+
+ out:
+        mutex_unlock(&pci_acpi_pm_notify_mtx);
+        return status;
+}
+
+/**
+ * remove_pm_notifier - Unregister PM notifier from given ACPI device.
+ * @dev: ACPI device to remove the notifier from.
+ */
+static acpi_status remove_pm_notifier(struct acpi_device *dev,
+                                      acpi_notify_handler handler)
+{
+        acpi_status status = AE_BAD_PARAMETER;
+
+        mutex_lock(&pci_acpi_pm_notify_mtx);
+
+        if (!dev->wakeup.flags.notifier_present)
+                goto out;
+
+        status = acpi_remove_notify_handler(dev->handle,
+                                            ACPI_SYSTEM_NOTIFY,
+                                            handler);
+        if (ACPI_FAILURE(status))
+                goto out;
+
+        dev->wakeup.flags.notifier_present = false;
+
+ out:
+        mutex_unlock(&pci_acpi_pm_notify_mtx);
+        return status;
+}
+
+/**
+ * pci_acpi_add_bus_pm_notifier - Register PM notifier for given PCI bus.
+ * @dev: ACPI device to add the notifier for.
+ * @pci_bus: PCI bus to walk checking for PME status if an event is signaled.
+ */
+acpi_status pci_acpi_add_bus_pm_notifier(struct acpi_device *dev,
+                                         struct pci_bus *pci_bus)
+{
+        return add_pm_notifier(dev, pci_acpi_wake_bus, pci_bus);
+}
+
+/**
+ * pci_acpi_remove_bus_pm_notifier - Unregister PCI bus PM notifier.
+ * @dev: ACPI device to remove the notifier from.
+ */
+acpi_status pci_acpi_remove_bus_pm_notifier(struct acpi_device *dev)
+{
+        return remove_pm_notifier(dev, pci_acpi_wake_bus);
+}
+
+/**
+ * pci_acpi_add_pm_notifier - Register PM notifier for given PCI device.
+ * @dev: ACPI device to add the notifier for.
+ * @pci_dev: PCI device to check for the PME status if an event is signaled.
+ */
+acpi_status pci_acpi_add_pm_notifier(struct acpi_device *dev,
+                                     struct pci_dev *pci_dev)
+{
+        return add_pm_notifier(dev, pci_acpi_wake_dev, pci_dev);
+}
+
+/**
+ * pci_acpi_remove_pm_notifier - Unregister PCI device PM notifier.
+ * @dev: ACPI device to remove the notifier from.
+ */
+acpi_status pci_acpi_remove_pm_notifier(struct acpi_device *dev)
+{
+        return remove_pm_notifier(dev, pci_acpi_wake_dev);
+}
+
 /*
  * _SxD returns the D-state with the highest power
  * (lowest D-state number) supported in the S-state "x".
@@ -112,11 +248,7 @@ static bool acpi_pci_can_wakeup(struct pci_dev *dev)
 static void acpi_pci_propagate_wakeup_enable(struct pci_bus *bus, bool enable)
 {
         while (bus->parent) {
-                struct pci_dev *bridge = bus->self;
-                int ret;
-
-                ret = acpi_pm_device_sleep_wake(&bridge->dev, enable);
-                if (!ret || bridge->is_pcie)
+                if (!acpi_pm_device_sleep_wake(&bus->self->dev, enable))
                         return;
                 bus = bus->parent;
         }
@@ -131,9 +263,81 @@ static int acpi_pci_sleep_wake(struct pci_dev *dev, bool enable)
         if (acpi_pci_can_wakeup(dev))
                 return acpi_pm_device_sleep_wake(&dev->dev, enable);
 
-        if (!dev->is_pcie)
-                acpi_pci_propagate_wakeup_enable(dev->bus, enable);
+        acpi_pci_propagate_wakeup_enable(dev->bus, enable);
+        return 0;
+}
+
+/**
+ * acpi_dev_run_wake - Enable/disable wake-up for given device.
+ * @phys_dev: Device to enable/disable the platform to wake-up the system for.
+ * @enable: Whether enable or disable the wake-up functionality.
+ *
+ * Find the ACPI device object corresponding to @pci_dev and try to
+ * enable/disable the GPE associated with it.
+ */
+static int acpi_dev_run_wake(struct device *phys_dev, bool enable)
+{
+        struct acpi_device *dev;
+        acpi_handle handle;
+        int error = -ENODEV;
+
+        if (!device_run_wake(phys_dev))
+                return -EINVAL;
+
+        handle = DEVICE_ACPI_HANDLE(phys_dev);
+        if (!handle || ACPI_FAILURE(acpi_bus_get_device(handle, &dev))) {
+                dev_dbg(phys_dev, "ACPI handle has no context in %s!\n",
+                        __func__);
+                return -ENODEV;
+        }
+
+        if (enable) {
+                if (!dev->wakeup.run_wake_count++) {
+                        acpi_enable_wakeup_device_power(dev, ACPI_STATE_S0);
+                        acpi_enable_gpe(dev->wakeup.gpe_device,
+                                        dev->wakeup.gpe_number,
+                                        ACPI_GPE_TYPE_RUNTIME);
+                }
+        } else if (dev->wakeup.run_wake_count > 0) {
+                if (!--dev->wakeup.run_wake_count) {
+                        acpi_disable_gpe(dev->wakeup.gpe_device,
+                                         dev->wakeup.gpe_number,
+                                         ACPI_GPE_TYPE_RUNTIME);
+                        acpi_disable_wakeup_device_power(dev);
+                }
+        } else {
+                error = -EALREADY;
+        }
+
+        return error;
+}
+
+static void acpi_pci_propagate_run_wake(struct pci_bus *bus, bool enable)
+{
+        while (bus->parent) {
+                struct pci_dev *bridge = bus->self;
+
+                if (bridge->pme_interrupt)
+                        return;
+                if (!acpi_dev_run_wake(&bridge->dev, enable))
+                        return;
+                bus = bus->parent;
+        }
+
+        /* We have reached the root bus. */
+        if (bus->bridge)
+                acpi_dev_run_wake(bus->bridge, enable);
+}
+
+static int acpi_pci_run_wake(struct pci_dev *dev, bool enable)
+{
+        if (dev->pme_interrupt)
+                return 0;
+
+        if (!acpi_dev_run_wake(&dev->dev, enable))
+                return 0;
 
+        acpi_pci_propagate_run_wake(dev->bus, enable);
         return 0;
 }
 
@@ -143,13 +347,14 @@ static struct pci_platform_pm_ops acpi_pci_platform_pm = {
         .choose_state = acpi_pci_choose_state,
         .can_wakeup = acpi_pci_can_wakeup,
         .sleep_wake = acpi_pci_sleep_wake,
+        .run_wake = acpi_pci_run_wake,
 };
 
 /* ACPI bus type */
 static int acpi_pci_find_device(struct device *dev, acpi_handle *handle)
 {
         struct pci_dev * pci_dev;
-        acpi_integer    addr;
+        u64     addr;
 
         pci_dev = to_pci_dev(dev);
         /* Please ref to ACPI spec for the syntax of _ADR */
diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c
index e5d47be3c6d7..f9a0aec3abcf 100644
--- a/drivers/pci/pci-driver.c
+++ b/drivers/pci/pci-driver.c
@@ -17,6 +17,7 @@
 #include <linux/slab.h>
 #include <linux/sched.h>
 #include <linux/cpu.h>
+#include <linux/pm_runtime.h>
 #include "pci.h"
 
 struct pci_dynid {
@@ -404,6 +405,35 @@ static void pci_device_shutdown(struct device *dev)
         pci_msix_shutdown(pci_dev);
 }
 
+#ifdef CONFIG_PM_OPS
+
+/* Auxiliary functions used for system resume and run-time resume. */
+
+/**
+ * pci_restore_standard_config - restore standard config registers of PCI device
+ * @pci_dev: PCI device to handle
+ */
+static int pci_restore_standard_config(struct pci_dev *pci_dev)
+{
+        pci_update_current_state(pci_dev, PCI_UNKNOWN);
+
+        if (pci_dev->current_state != PCI_D0) {
+                int error = pci_set_power_state(pci_dev, PCI_D0);
+                if (error)
+                        return error;
+        }
+
+        return pci_restore_state(pci_dev);
+}
+
+static void pci_pm_default_resume_early(struct pci_dev *pci_dev)
+{
+        pci_restore_standard_config(pci_dev);
+        pci_fixup_device(pci_fixup_resume_early, pci_dev);
+}
+
+#endif
+
 #ifdef CONFIG_PM_SLEEP
 
 /*
@@ -520,29 +550,6 @@ static int pci_legacy_resume(struct device *dev)
 
 /* Auxiliary functions used by the new power management framework */
 
-/**
- * pci_restore_standard_config - restore standard config registers of PCI device
- * @pci_dev: PCI device to handle
- */
-static int pci_restore_standard_config(struct pci_dev *pci_dev)
-{
-        pci_update_current_state(pci_dev, PCI_UNKNOWN);
-
-        if (pci_dev->current_state != PCI_D0) {
-                int error = pci_set_power_state(pci_dev, PCI_D0);
-                if (error)
-                        return error;
-        }
-
-        return pci_restore_state(pci_dev);
-}
-
-static void pci_pm_default_resume_noirq(struct pci_dev *pci_dev)
-{
-        pci_restore_standard_config(pci_dev);
-        pci_fixup_device(pci_fixup_resume_early, pci_dev);
-}
-
 static void pci_pm_default_resume(struct pci_dev *pci_dev)
 {
         pci_fixup_device(pci_fixup_resume, pci_dev);
@@ -581,6 +588,17 @@ static int pci_pm_prepare(struct device *dev)
         struct device_driver *drv = dev->driver;
         int error = 0;
 
+        /*
+         * PCI devices suspended at run time need to be resumed at this
+         * point, because in general it is necessary to reconfigure them for
+         * system suspend.  Namely, if the device is supposed to wake up the
+         * system from the sleep state, we may need to reconfigure it for this
+         * purpose.  In turn, if the device is not supposed to wake up the
+         * system from the sleep state, we'll have to prevent it from signaling
+         * wake-up.
+         */
+        pm_runtime_resume(dev);
+
         if (drv && drv->pm && drv->pm->prepare)
                 error = drv->pm->prepare(dev);
 
@@ -595,6 +613,13 @@ static void pci_pm_complete(struct device *dev)
                 drv->pm->complete(dev);
 }
 
+#else /* !CONFIG_PM_SLEEP */
+
+#define pci_pm_prepare  NULL
+#define pci_pm_complete NULL
+
+#endif /* !CONFIG_PM_SLEEP */
+
 #ifdef CONFIG_SUSPEND
 
 static int pci_pm_suspend(struct device *dev)
@@ -681,7 +706,7 @@ static int pci_pm_resume_noirq(struct device *dev)
         struct device_driver *drv = dev->driver;
         int error = 0;
 
-        pci_pm_default_resume_noirq(pci_dev);
+        pci_pm_default_resume_early(pci_dev);
 
         if (pci_has_legacy_pm_support(pci_dev))
                 return pci_legacy_resume_early(dev);
@@ -879,7 +904,7 @@ static int pci_pm_restore_noirq(struct device *dev)
         struct device_driver *drv = dev->driver;
         int error = 0;
 
-        pci_pm_default_resume_noirq(pci_dev);
+        pci_pm_default_resume_early(pci_dev);
 
         if (pci_has_legacy_pm_support(pci_dev))
                 return pci_legacy_resume_early(dev);
@@ -931,6 +956,84 @@ static int pci_pm_restore(struct device *dev)
 
 #endif /* !CONFIG_HIBERNATION */
 
+#ifdef CONFIG_PM_RUNTIME
+
+static int pci_pm_runtime_suspend(struct device *dev)
+{
+        struct pci_dev *pci_dev = to_pci_dev(dev);
+        const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
+        pci_power_t prev = pci_dev->current_state;
+        int error;
+
+        if (!pm || !pm->runtime_suspend)
+                return -ENOSYS;
+
+        error = pm->runtime_suspend(dev);
+        suspend_report_result(pm->runtime_suspend, error);
+        if (error)
+                return error;
+
+        pci_fixup_device(pci_fixup_suspend, pci_dev);
+
+        if (!pci_dev->state_saved && pci_dev->current_state != PCI_D0
+            && pci_dev->current_state != PCI_UNKNOWN) {
+                WARN_ONCE(pci_dev->current_state != prev,
+                        "PCI PM: State of device not saved by %pF\n",
+                        pm->runtime_suspend);
+                return 0;
+        }
+
+        if (!pci_dev->state_saved)
+                pci_save_state(pci_dev);
+
+        pci_finish_runtime_suspend(pci_dev);
+
+        return 0;
+}
+
+static int pci_pm_runtime_resume(struct device *dev)
+{
+        struct pci_dev *pci_dev = to_pci_dev(dev);
+        const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
+
+        if (!pm || !pm->runtime_resume)
+                return -ENOSYS;
+
+        pci_pm_default_resume_early(pci_dev);
+        __pci_enable_wake(pci_dev, PCI_D0, true, false);
+        pci_fixup_device(pci_fixup_resume, pci_dev);
+
+        return pm->runtime_resume(dev);
+}
+
+static int pci_pm_runtime_idle(struct device *dev)
+{
+        const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
+
+        if (!pm)
+                return -ENOSYS;
+
+        if (pm->runtime_idle) {
+                int ret = pm->runtime_idle(dev);
+                if (ret)
+                        return ret;
+        }
+
+        pm_runtime_suspend(dev);
+
+        return 0;
+}
+
+#else /* !CONFIG_PM_RUNTIME */
+
+#define pci_pm_runtime_suspend  NULL
+#define pci_pm_runtime_resume   NULL
+#define pci_pm_runtime_idle     NULL
+
+#endif /* !CONFIG_PM_RUNTIME */
+
+#ifdef CONFIG_PM_OPS
+
 const struct dev_pm_ops pci_dev_pm_ops = {
         .prepare = pci_pm_prepare,
         .complete = pci_pm_complete,
@@ -946,15 +1049,18 @@ const struct dev_pm_ops pci_dev_pm_ops = {
         .thaw_noirq = pci_pm_thaw_noirq,
         .poweroff_noirq = pci_pm_poweroff_noirq,
         .restore_noirq = pci_pm_restore_noirq,
+        .runtime_suspend = pci_pm_runtime_suspend,
+        .runtime_resume = pci_pm_runtime_resume,
+        .runtime_idle = pci_pm_runtime_idle,
 };
 
 #define PCI_PM_OPS_PTR  (&pci_dev_pm_ops)
 
-#else /* !CONFIG_PM_SLEEP */
+#else /* !COMFIG_PM_OPS */
 
 #define PCI_PM_OPS_PTR  NULL
 
-#endif /* !CONFIG_PM_SLEEP */
+#endif /* !COMFIG_PM_OPS */
 
 /**
  * __pci_register_driver - register a new pci driver
diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c
index 0f6382f090ee..fad93983bfed 100644
--- a/drivers/pci/pci-sysfs.c
+++ b/drivers/pci/pci-sysfs.c
@@ -23,6 +23,7 @@
 #include <linux/mm.h>
 #include <linux/capability.h>
 #include <linux/pci-aspm.h>
+#include <linux/slab.h>
 #include "pci.h"
 
 static int sysfs_initialized;   /* = 0 */
@@ -74,7 +75,12 @@ static ssize_t local_cpus_show(struct device *dev,
         const struct cpumask *mask;
         int len;
 
+#ifdef CONFIG_NUMA
+        mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
+                                          cpumask_of_node(dev_to_node(dev));
+#else
         mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
+#endif
         len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
         buf[len++] = '\n';
         buf[len] = '\0';
@@ -88,7 +94,12 @@ static ssize_t local_cpulist_show(struct device *dev,
         const struct cpumask *mask;
         int len;
 
+#ifdef CONFIG_NUMA
+        mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
+                                          cpumask_of_node(dev_to_node(dev));
+#else
         mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
+#endif
         len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
         buf[len++] = '\n';
         buf[len] = '\0';
@@ -176,6 +187,21 @@ numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
 #endif
 
 static ssize_t
+dma_mask_bits_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+        struct pci_dev *pdev = to_pci_dev(dev);
+
+        return sprintf (buf, "%d\n", fls64(pdev->dma_mask));
+}
+
+static ssize_t
+consistent_dma_mask_bits_show(struct device *dev, struct device_attribute *attr,
+                                 char *buf)
+{
+        return sprintf (buf, "%d\n", fls64(dev->coherent_dma_mask));
+}
+
+static ssize_t
 msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
 {
         struct pci_dev *pdev = to_pci_dev(dev);
@@ -306,6 +332,8 @@ struct device_attribute pci_dev_attrs[] = {
 #ifdef CONFIG_NUMA
         __ATTR_RO(numa_node),
 #endif
+        __ATTR_RO(dma_mask_bits),
+        __ATTR_RO(consistent_dma_mask_bits),
         __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
         __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
                 broken_parity_status_show,broken_parity_status_store),
@@ -615,6 +643,7 @@ void pci_create_legacy_files(struct pci_bus *b)
         if (!b->legacy_io)
                 goto kzalloc_err;
 
+        sysfs_bin_attr_init(b->legacy_io);
         b->legacy_io->attr.name = "legacy_io";
         b->legacy_io->size = 0xffff;
         b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
@@ -628,6 +657,7 @@ void pci_create_legacy_files(struct pci_bus *b)
 
         /* Allocated above after the legacy_io struct */
         b->legacy_mem = b->legacy_io + 1;
+        sysfs_bin_attr_init(b->legacy_mem);
         b->legacy_mem->attr.name = "legacy_mem";
         b->legacy_mem->size = 1024*1024;
         b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
@@ -773,6 +803,7 @@ static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
         if (res_attr) {
                 char *res_attr_name = (char *)(res_attr + 1);
 
+                sysfs_bin_attr_init(res_attr);
                 if (write_combine) {
                         pdev->res_attr_wc[num] = res_attr;
                         sprintf(res_attr_name, "resource%d_wc", num);
@@ -945,6 +976,7 @@ static int pci_create_capabilities_sysfs(struct pci_dev *dev)
                 if (!attr)
                         return -ENOMEM;
 
+                sysfs_bin_attr_init(attr);
                 attr->size = dev->vpd->len;
                 attr->attr.name = "vpd";
                 attr->attr.mode = S_IRUSR | S_IWUSR;
@@ -1011,6 +1043,7 @@ int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
                         retval = -ENOMEM;
                         goto err_resource_files;
                 }
+                sysfs_bin_attr_init(attr);
                 attr->size = rom_size;
                 attr->attr.name = "rom";
                 attr->attr.mode = S_IRUSR;
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 4e4c295a049f..37499127c801 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -12,6 +12,7 @@
 #include <linux/init.h>
 #include <linux/pci.h>
 #include <linux/pm.h>
+#include <linux/slab.h>
 #include <linux/module.h>
 #include <linux/spinlock.h>
 #include <linux/string.h>
@@ -19,8 +20,8 @@
 #include <linux/pci-aspm.h>
 #include <linux/pm_wakeup.h>
 #include <linux/interrupt.h>
-#include <asm/dma.h>    /* isa_dma_bridge_buggy */
 #include <linux/device.h>
+#include <linux/pm_runtime.h>
 #include <asm/setup.h>
 #include "pci.h"
 
@@ -29,7 +30,23 @@ const char *pci_power_names[] = {
 };
 EXPORT_SYMBOL_GPL(pci_power_names);
 
-unsigned int pci_pm_d3_delay = PCI_PM_D3_WAIT;
+int isa_dma_bridge_buggy;
+EXPORT_SYMBOL(isa_dma_bridge_buggy);
+
+int pci_pci_problems;
+EXPORT_SYMBOL(pci_pci_problems);
+
+unsigned int pci_pm_d3_delay;
+
+static void pci_dev_d3_sleep(struct pci_dev *dev)
+{
+        unsigned int delay = dev->d3_delay;
+
+        if (delay < pci_pm_d3_delay)
+                delay = pci_pm_d3_delay;
+
+        msleep(delay);
+}
 
 #ifdef CONFIG_PCI_DOMAINS
 int pci_domains_supported = 1;
@@ -47,6 +64,15 @@ unsigned long pci_cardbus_mem_size = DEFAULT_CARDBUS_MEM_SIZE;
 unsigned long pci_hotplug_io_size  = DEFAULT_HOTPLUG_IO_SIZE;
 unsigned long pci_hotplug_mem_size = DEFAULT_HOTPLUG_MEM_SIZE;
 
+/*
+ * The default CLS is used if arch didn't set CLS explicitly and not
+ * all pci devices agree on the same value.  Arch can override either
+ * the dfl or actual value as it sees fit.  Don't forget this is
+ * measured in 32-bit words, not bytes.
+ */
+u8 pci_dfl_cache_line_size __devinitdata = L1_CACHE_BYTES >> 2;
+u8 pci_cache_line_size;
+
 /**
  * pci_bus_max_busnr - returns maximum PCI bus number of given bus' children
  * @bus: pointer to PCI bus structure to search
@@ -278,6 +304,49 @@ int pci_find_ext_capability(struct pci_dev *dev, int cap)
 }
 EXPORT_SYMBOL_GPL(pci_find_ext_capability);
 
+/**
+ * pci_bus_find_ext_capability - find an extended capability
+ * @bus:   the PCI bus to query
+ * @devfn: PCI device to query
+ * @cap:   capability code
+ *
+ * Like pci_find_ext_capability() but works for pci devices that do not have a
+ * pci_dev structure set up yet.
+ *
+ * Returns the address of the requested capability structure within the
+ * device's PCI configuration space or 0 in case the device does not
+ * support it.
+ */
+int pci_bus_find_ext_capability(struct pci_bus *bus, unsigned int devfn,
+                                int cap)
+{
+        u32 header;
+        int ttl;
+        int pos = PCI_CFG_SPACE_SIZE;
+
+        /* minimum 8 bytes per capability */
+        ttl = (PCI_CFG_SPACE_EXP_SIZE - PCI_CFG_SPACE_SIZE) / 8;
+
+        if (!pci_bus_read_config_dword(bus, devfn, pos, &header))
+                return 0;
+        if (header == 0xffffffff || header == 0)
+                return 0;
+
+        while (ttl-- > 0) {
+                if (PCI_EXT_CAP_ID(header) == cap)
+                        return pos;
+
+                pos = PCI_EXT_CAP_NEXT(header);
+                if (pos < PCI_CFG_SPACE_SIZE)
+                        break;
+
+                if (!pci_bus_read_config_dword(bus, devfn, pos, &header))
+                        break;
+        }
+
+        return 0;
+}
+
 static int __pci_find_next_ht_cap(struct pci_dev *dev, int pos, int ht_cap)
 {
         int rc, ttl = PCI_FIND_CAP_TTL;
@@ -361,10 +430,9 @@ pci_find_parent_resource(const struct pci_dev *dev, struct resource *res)
 {
         const struct pci_bus *bus = dev->bus;
         int i;
-        struct resource *best = NULL;
+        struct resource *best = NULL, *r;
 
-        for(i = 0; i < PCI_BUS_NUM_RESOURCES; i++) {
-                struct resource *r = bus->resource[i];
+        pci_bus_for_each_resource(bus, r, i) {
                 if (!r)
                         continue;
                 if (res->start && !(res->start >= r->start && res->end <= r->end))
@@ -373,8 +441,12 @@ pci_find_parent_resource(const struct pci_dev *dev, struct resource *res)
                         continue;       /* Wrong type */
                 if (!((res->flags ^ r->flags) & IORESOURCE_PREFETCH))
                         return r;       /* Exact match */
-                if ((res->flags & IORESOURCE_PREFETCH) && !(r->flags & IORESOURCE_PREFETCH))
-                        best = r;       /* Approximating prefetchable by non-prefetchable */
+                /* We can't insert a non-prefetch resource inside a prefetchable parent .. */
+                if (r->flags & IORESOURCE_PREFETCH)
+                        continue;
+                /* .. but we can put a prefetchable resource inside a non-prefetchable one */
+                if (!best)
+                        best = r;
         }
         return best;
 }
@@ -434,6 +506,12 @@ static inline int platform_pci_sleep_wake(struct pci_dev *dev, bool enable)
                         pci_platform_pm->sleep_wake(dev, enable) : -ENODEV;
 }
 
+static inline int platform_pci_run_wake(struct pci_dev *dev, bool enable)
+{
+        return pci_platform_pm ?
+                        pci_platform_pm->run_wake(dev, enable) : -ENODEV;
+}
+
 /**
  * pci_raw_set_power_state - Use PCI PM registers to set the power state of
  *                           given PCI device
@@ -509,7 +587,7 @@ static int pci_raw_set_power_state(struct pci_dev *dev, pci_power_t state)
         /* Mandatory power management transition delays */
         /* see PCI PM 1.1 5.6.1 table 18 */
         if (state == PCI_D3hot || dev->current_state == PCI_D3hot)
-                msleep(pci_pm_d3_delay);
+                pci_dev_d3_sleep(dev);
         else if (state == PCI_D2 || dev->current_state == PCI_D2)
                 udelay(PCI_PM_D2_DELAY);
 
@@ -601,7 +679,7 @@ static void __pci_start_power_transition(struct pci_dev *dev, pci_power_t state)
  */
 int __pci_complete_power_transition(struct pci_dev *dev, pci_power_t state)
 {
-        return state > PCI_D0 ?
+        return state >= PCI_D0 ?
                         pci_platform_power_transition(dev, state) : -EINVAL;
 }
 EXPORT_SYMBOL_GPL(__pci_complete_power_transition);
@@ -638,10 +716,6 @@ int pci_set_power_state(struct pci_dev *dev, pci_power_t state)
                  */
                 return 0;
 
-        /* Check if we're already there */
-        if (dev->current_state == state)
-                return 0;
-
         __pci_start_power_transition(dev, state);
 
         /* This device is quirked not to be put into D3, so
@@ -728,8 +802,8 @@ static int pci_save_pcie_state(struct pci_dev *dev)
         u16 *cap;
         u16 flags;
 
-        pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
-        if (pos <= 0)
+        pos = pci_pcie_cap(dev);
+        if (!pos)
                 return 0;
 
         save_state = pci_find_saved_cap(dev, PCI_CAP_ID_EXP);
@@ -837,7 +911,7 @@ pci_save_state(struct pci_dev *dev)
         int i;
         /* XXX: 100% dword access ok here? */
         for (i = 0; i < 16; i++)
-                pci_read_config_dword(dev, i * 4,&dev->saved_config_space[i]);
+                pci_read_config_dword(dev, i * 4, &dev->saved_config_space[i]);
         dev->state_saved = true;
         if ((i = pci_save_pcie_state(dev)) != 0)
                 return i;
@@ -1140,11 +1214,11 @@ pci_disable_device(struct pci_dev *dev)
 
 /**
  * pcibios_set_pcie_reset_state - set reset state for device dev
- * @dev: the PCI-E device reset
+ * @dev: the PCIe device reset
  * @state: Reset state to enter into
  *
  *
- * Sets the PCI-E reset state for the device. This is the default
+ * Sets the PCIe reset state for the device. This is the default
  * implementation. Architecture implementations can override this.
  */
 int __attribute__ ((weak)) pcibios_set_pcie_reset_state(struct pci_dev *dev,
@@ -1155,7 +1229,7 @@ int __attribute__ ((weak)) pcibios_set_pcie_reset_state(struct pci_dev *dev,
 
 /**
  * pci_set_pcie_reset_state - set reset state for device dev
- * @dev: the PCI-E device reset
+ * @dev: the PCIe device reset
  * @state: Reset state to enter into
  *
  *
@@ -1167,6 +1241,66 @@ int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state)
 }
 
 /**
+ * pci_check_pme_status - Check if given device has generated PME.
+ * @dev: Device to check.
+ *
+ * Check the PME status of the device and if set, clear it and clear PME enable
+ * (if set).  Return 'true' if PME status and PME enable were both set or
+ * 'false' otherwise.
+ */
+bool pci_check_pme_status(struct pci_dev *dev)
+{
+        int pmcsr_pos;
+        u16 pmcsr;
+        bool ret = false;
+
+        if (!dev->pm_cap)
+                return false;
+
+        pmcsr_pos = dev->pm_cap + PCI_PM_CTRL;
+        pci_read_config_word(dev, pmcsr_pos, &pmcsr);
+        if (!(pmcsr & PCI_PM_CTRL_PME_STATUS))
+                return false;
+
+        /* Clear PME status. */
+        pmcsr |= PCI_PM_CTRL_PME_STATUS;
+        if (pmcsr & PCI_PM_CTRL_PME_ENABLE) {
+                /* Disable PME to avoid interrupt flood. */
+                pmcsr &= ~PCI_PM_CTRL_PME_ENABLE;
+                ret = true;
+        }
+
+        pci_write_config_word(dev, pmcsr_pos, pmcsr);
+
+        return ret;
+}
+
+/**
+ * pci_pme_wakeup - Wake up a PCI device if its PME Status bit is set.
+ * @dev: Device to handle.
+ * @ign: Ignored.
+ *
+ * Check if @dev has generated PME and queue a resume request for it in that
+ * case.
+ */
+static int pci_pme_wakeup(struct pci_dev *dev, void *ign)
+{
+        if (pci_check_pme_status(dev))
+                pm_request_resume(&dev->dev);
+        return 0;
+}
+
+/**
+ * pci_pme_wakeup_bus - Walk given bus and wake up devices on it, if necessary.
+ * @bus: Top bus of the subtree to walk.
+ */
+void pci_pme_wakeup_bus(struct pci_bus *bus)
+{
+        if (bus)
+                pci_walk_bus(bus, pci_pme_wakeup, NULL);
+}
+
+/**
  * pci_pme_capable - check the capability of PCI device to generate PME#
  * @dev: PCI device to handle.
  * @state: PCI state from which device will issue PME#.
@@ -1202,14 +1336,15 @@ void pci_pme_active(struct pci_dev *dev, bool enable)
 
         pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, pmcsr);
 
-        dev_printk(KERN_INFO, &dev->dev, "PME# %s\n",
+        dev_printk(KERN_DEBUG, &dev->dev, "PME# %s\n",
                         enable ? "enabled" : "disabled");
 }
 
 /**
- * pci_enable_wake - enable PCI device as wakeup event source
+ * __pci_enable_wake - enable PCI device as wakeup event source
  * @dev: PCI device affected
  * @state: PCI state from which device will issue wakeup events
+ * @runtime: True if the events are to be generated at run time
  * @enable: True to enable event generation; false to disable
  *
  * This enables the device as a wakeup event source, or disables it.
@@ -1225,11 +1360,12 @@ void pci_pme_active(struct pci_dev *dev, bool enable)
  * Error code depending on the platform is returned if both the platform and
  * the native mechanism fail to enable the generation of wake-up events
  */
-int pci_enable_wake(struct pci_dev *dev, pci_power_t state, bool enable)
+int __pci_enable_wake(struct pci_dev *dev, pci_power_t state,
+                      bool runtime, bool enable)
 {
         int ret = 0;
 
-        if (enable && !device_may_wakeup(&dev->dev))
+        if (enable && !runtime && !device_may_wakeup(&dev->dev))
                 return -EINVAL;
 
         /* Don't do the same thing twice in a row for one device. */
@@ -1249,19 +1385,24 @@ int pci_enable_wake(struct pci_dev *dev, pci_power_t state, bool enable)
                         pci_pme_active(dev, true);
                 else
                         ret = 1;
-                error = platform_pci_sleep_wake(dev, true);
+                error = runtime ? platform_pci_run_wake(dev, true) :
+                                        platform_pci_sleep_wake(dev, true);
                 if (ret)
                         ret = error;
                 if (!ret)
                         dev->wakeup_prepared = true;
         } else {
-                platform_pci_sleep_wake(dev, false);
+                if (runtime)
+                        platform_pci_run_wake(dev, false);
+                else
+                        platform_pci_sleep_wake(dev, false);
                 pci_pme_active(dev, false);
                 dev->wakeup_prepared = false;
         }
 
         return ret;
 }
+EXPORT_SYMBOL(__pci_enable_wake);
 
 /**
  * pci_wake_from_d3 - enable/disable device to wake up from D3_hot or D3_cold
@@ -1371,6 +1512,66 @@ int pci_back_from_sleep(struct pci_dev *dev)
 }
 
 /**
+ * pci_finish_runtime_suspend - Carry out PCI-specific part of runtime suspend.
+ * @dev: PCI device being suspended.
+ *
+ * Prepare @dev to generate wake-up events at run time and put it into a low
+ * power state.
+ */
+int pci_finish_runtime_suspend(struct pci_dev *dev)
+{
+        pci_power_t target_state = pci_target_state(dev);
+        int error;
+
+        if (target_state == PCI_POWER_ERROR)
+                return -EIO;
+
+        __pci_enable_wake(dev, target_state, true, pci_dev_run_wake(dev));
+
+        error = pci_set_power_state(dev, target_state);
+
+        if (error)
+                __pci_enable_wake(dev, target_state, true, false);
+
+        return error;
+}
+
+/**
+ * pci_dev_run_wake - Check if device can generate run-time wake-up events.
+ * @dev: Device to check.
+ *
+ * Return true if the device itself is cabable of generating wake-up events
+ * (through the platform or using the native PCIe PME) or if the device supports
+ * PME and one of its upstream bridges can generate wake-up events.
+ */
+bool pci_dev_run_wake(struct pci_dev *dev)
+{
+        struct pci_bus *bus = dev->bus;
+
+        if (device_run_wake(&dev->dev))
+                return true;
+
+        if (!dev->pme_support)
+                return false;
+
+        while (bus->parent) {
+                struct pci_dev *bridge = bus->self;
+
+                if (device_run_wake(&bridge->dev))
+                        return true;
+
+                bus = bus->parent;
+        }
+
+        /* We have reached the root bus. */
+        if (bus->bridge)
+                return device_run_wake(bus->bridge);
+
+        return false;
+}
+EXPORT_SYMBOL_GPL(pci_dev_run_wake);
+
+/**
  * pci_pm_init - Initialize PM functions of given PCI device
  * @dev: PCI device to handle.
  */
@@ -1379,7 +1580,10 @@ void pci_pm_init(struct pci_dev *dev)
         int pm;
         u16 pmc;
 
+        pm_runtime_forbid(&dev->dev);
+        device_enable_async_suspend(&dev->dev);
         dev->wakeup_prepared = false;
+
         dev->pm_cap = 0;
 
         /* find PCI PM capability in list */
@@ -1396,6 +1600,7 @@ void pci_pm_init(struct pci_dev *dev)
         }
 
         dev->pm_cap = pm;
+        dev->d3_delay = PCI_PM_D3_WAIT;
 
         dev->d1_support = false;
         dev->d2_support = false;
@@ -1413,7 +1618,8 @@ void pci_pm_init(struct pci_dev *dev)
 
         pmc &= PCI_PM_CAP_PME_MASK;
         if (pmc) {
-                dev_info(&dev->dev, "PME# supported from%s%s%s%s%s\n",
+                dev_printk(KERN_DEBUG, &dev->dev,
+                         "PME# supported from%s%s%s%s%s\n",
                          (pmc & PCI_PM_CAP_PME_D0) ? " D0" : "",
                          (pmc & PCI_PM_CAP_PME_D1) ? " D1" : "",
                          (pmc & PCI_PM_CAP_PME_D2) ? " D2" : "",
@@ -1510,7 +1716,7 @@ void pci_enable_ari(struct pci_dev *dev)
         u16 ctrl;
         struct pci_dev *bridge;
 
-        if (!dev->is_pcie || dev->devfn)
+        if (!pci_is_pcie(dev) || dev->devfn)
                 return;
 
         pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ARI);
@@ -1518,10 +1724,10 @@ void pci_enable_ari(struct pci_dev *dev)
                 return;
 
         bridge = dev->bus->self;
-        if (!bridge || !bridge->is_pcie)
+        if (!bridge || !pci_is_pcie(bridge))
                 return;
 
-        pos = pci_find_capability(bridge, PCI_CAP_ID_EXP);
+        pos = pci_pcie_cap(bridge);
         if (!pos)
                 return;
 
@@ -1536,6 +1742,54 @@ void pci_enable_ari(struct pci_dev *dev)
         bridge->ari_enabled = 1;
 }
 
+static int pci_acs_enable;
+
+/**
+ * pci_request_acs - ask for ACS to be enabled if supported
+ */
+void pci_request_acs(void)
+{
+        pci_acs_enable = 1;
+}
+
+/**
+ * pci_enable_acs - enable ACS if hardware support it
+ * @dev: the PCI device
+ */
+void pci_enable_acs(struct pci_dev *dev)
+{
+        int pos;
+        u16 cap;
+        u16 ctrl;
+
+        if (!pci_acs_enable)
+                return;
+
+        if (!pci_is_pcie(dev))
+                return;
+
+        pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ACS);
+        if (!pos)
+                return;
+
+        pci_read_config_word(dev, pos + PCI_ACS_CAP, &cap);
+        pci_read_config_word(dev, pos + PCI_ACS_CTRL, &ctrl);
+
+        /* Source Validation */
+        ctrl |= (cap & PCI_ACS_SV);
+
+        /* P2P Request Redirect */
+        ctrl |= (cap & PCI_ACS_RR);
+
+        /* P2P Completion Redirect */
+        ctrl |= (cap & PCI_ACS_CR);
+
+        /* Upstream Forwarding */
+        ctrl |= (cap & PCI_ACS_UF);
+
+        pci_write_config_word(dev, pos + PCI_ACS_CTRL, ctrl);
+}
+
 /**
  * pci_swizzle_interrupt_pin - swizzle INTx for device behind bridge
  * @dev: the PCI device
@@ -1669,9 +1923,7 @@ static int __pci_request_region(struct pci_dev *pdev, int bar, const char *res_n
         return 0;
 
 err_out:
-        dev_warn(&pdev->dev, "BAR %d: can't reserve %s region %pR\n",
-                 bar,
-                 pci_resource_flags(pdev, bar) & IORESOURCE_IO ? "I/O" : "mem",
+        dev_warn(&pdev->dev, "BAR %d: can't reserve %pR\n", bar,
                  &pdev->resource[bar]);
         return -EBUSY;
 }
@@ -1866,31 +2118,6 @@ void pci_clear_master(struct pci_dev *dev)
         __pci_set_master(dev, false);
 }
 
-#ifdef PCI_DISABLE_MWI
-int pci_set_mwi(struct pci_dev *dev)
-{
-        return 0;
-}
-
-int pci_try_set_mwi(struct pci_dev *dev)
-{
-        return 0;
-}
-
-void pci_clear_mwi(struct pci_dev *dev)
-{
-}
-
-#else
-
-#ifndef PCI_CACHE_LINE_BYTES
-#define PCI_CACHE_LINE_BYTES L1_CACHE_BYTES
-#endif
-
-/* This can be overridden by arch code. */
-/* Don't forget this is measured in 32-bit words, not bytes */
-u8 pci_cache_line_size = PCI_CACHE_LINE_BYTES / 4;
-
 /**
  * pci_set_cacheline_size - ensure the CACHE_LINE_SIZE register is programmed
  * @dev: the PCI device for which MWI is to be enabled
@@ -1901,13 +2128,12 @@ u8 pci_cache_line_size = PCI_CACHE_LINE_BYTES / 4;
  *
  * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
  */
-static int
-pci_set_cacheline_size(struct pci_dev *dev)
+int pci_set_cacheline_size(struct pci_dev *dev)
 {
         u8 cacheline_size;
 
         if (!pci_cache_line_size)
-                return -EINVAL;         /* The system doesn't support MWI. */
+                return -EINVAL;
 
         /* Validate current setting: the PCI_CACHE_LINE_SIZE must be
            equal to or multiple of the right value. */
@@ -1928,6 +2154,24 @@ pci_set_cacheline_size(struct pci_dev *dev)
 
         return -EINVAL;
 }
+EXPORT_SYMBOL_GPL(pci_set_cacheline_size);
+
+#ifdef PCI_DISABLE_MWI
+int pci_set_mwi(struct pci_dev *dev)
+{
+        return 0;
+}
+
+int pci_try_set_mwi(struct pci_dev *dev)
+{
+        return 0;
+}
+
+void pci_clear_mwi(struct pci_dev *dev)
+{
+}
+
+#else
 
 /**
  * pci_set_mwi - enables memory-write-invalidate PCI transaction
@@ -2051,33 +2295,6 @@ void pci_msi_off(struct pci_dev *dev)
         }
 }
 
-#ifndef HAVE_ARCH_PCI_SET_DMA_MASK
-/*
- * These can be overridden by arch-specific implementations
- */
-int
-pci_set_dma_mask(struct pci_dev *dev, u64 mask)
-{
-        if (!pci_dma_supported(dev, mask))
-                return -EIO;
-
-        dev->dma_mask = mask;
-
-        return 0;
-}
-    
-int
-pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
-{
-        if (!pci_dma_supported(dev, mask))
-                return -EIO;
-
-        dev->dev.coherent_dma_mask = mask;
-
-        return 0;
-}
-#endif
-
 #ifndef HAVE_ARCH_PCI_SET_DMA_MAX_SEGMENT_SIZE
 int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size)
 {
@@ -2099,9 +2316,9 @@ static int pcie_flr(struct pci_dev *dev, int probe)
         int i;
         int pos;
         u32 cap;
-        u16 status;
+        u16 status, control;
 
-        pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
+        pos = pci_pcie_cap(dev);
         if (!pos)
                 return -ENOTTY;
 
@@ -2126,8 +2343,10 @@ static int pcie_flr(struct pci_dev *dev, int probe)
                         "proceeding with reset anyway\n");
 
 clear:
-        pci_write_config_word(dev, pos + PCI_EXP_DEVCTL,
-                                PCI_EXP_DEVCTL_BCR_FLR);
+        pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &control);
+        control |= PCI_EXP_DEVCTL_BCR_FLR;
+        pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, control);
+
         msleep(100);
 
         return 0;
@@ -2191,12 +2410,12 @@ static int pci_pm_reset(struct pci_dev *dev, int probe)
         csr &= ~PCI_PM_CTRL_STATE_MASK;
         csr |= PCI_D3hot;
         pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, csr);
-        msleep(pci_pm_d3_delay);
+        pci_dev_d3_sleep(dev);
 
         csr &= ~PCI_PM_CTRL_STATE_MASK;
         csr |= PCI_D0;
         pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, csr);
-        msleep(pci_pm_d3_delay);
+        pci_dev_d3_sleep(dev);
 
         return 0;
 }
@@ -2237,9 +2456,13 @@ static int pci_dev_reset(struct pci_dev *dev, int probe)
         if (!probe) {
                 pci_block_user_cfg_access(dev);
                 /* block PM suspend, driver probe, etc. */
-                down(&dev->dev.sem);
+                device_lock(&dev->dev);
         }
 
+        rc = pci_dev_specific_reset(dev, probe);
+        if (rc != -ENOTTY)
+                goto done;
+
         rc = pcie_flr(dev, probe);
         if (rc != -ENOTTY)
                 goto done;
@@ -2255,7 +2478,7 @@ static int pci_dev_reset(struct pci_dev *dev, int probe)
         rc = pci_parent_bus_reset(dev, probe);
 done:
         if (!probe) {
-                up(&dev->dev.sem);
+                device_unlock(&dev->dev);
                 pci_unblock_user_cfg_access(dev);
         }
 
@@ -2350,18 +2573,17 @@ EXPORT_SYMBOL_GPL(pci_reset_function);
  */
 int pcix_get_max_mmrbc(struct pci_dev *dev)
 {
-        int err, cap;
+        int cap;
         u32 stat;
 
         cap = pci_find_capability(dev, PCI_CAP_ID_PCIX);
         if (!cap)
                 return -EINVAL;
 
-        err = pci_read_config_dword(dev, cap + PCI_X_STATUS, &stat);
-        if (err)
+        if (pci_read_config_dword(dev, cap + PCI_X_STATUS, &stat))
                 return -EINVAL;
 
-        return (stat & PCI_X_STATUS_MAX_READ) >> 12;
+        return 512 << ((stat & PCI_X_STATUS_MAX_READ) >> 21);
 }
 EXPORT_SYMBOL(pcix_get_max_mmrbc);
 
@@ -2374,18 +2596,17 @@ EXPORT_SYMBOL(pcix_get_max_mmrbc);
  */
 int pcix_get_mmrbc(struct pci_dev *dev)
 {
-        int ret, cap;
-        u32 cmd;
+        int cap;
+        u16 cmd;
 
         cap = pci_find_capability(dev, PCI_CAP_ID_PCIX);
         if (!cap)
                 return -EINVAL;
 
-        ret = pci_read_config_dword(dev, cap + PCI_X_CMD, &cmd);
-        if (!ret)
-                ret = 512 << ((cmd & PCI_X_CMD_MAX_READ) >> 2);
+        if (pci_read_config_word(dev, cap + PCI_X_CMD, &cmd))
+                return -EINVAL;
 
-        return ret;
+        return 512 << ((cmd & PCI_X_CMD_MAX_READ) >> 2);
 }
 EXPORT_SYMBOL(pcix_get_mmrbc);
 
@@ -2400,28 +2621,27 @@ EXPORT_SYMBOL(pcix_get_mmrbc);
  */
 int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc)
 {
-        int cap, err = -EINVAL;
-        u32 stat, cmd, v, o;
+        int cap;
+        u32 stat, v, o;
+        u16 cmd;
 
         if (mmrbc < 512 || mmrbc > 4096 || !is_power_of_2(mmrbc))
-                goto out;
+                return -EINVAL;
 
         v = ffs(mmrbc) - 10;
 
         cap = pci_find_capability(dev, PCI_CAP_ID_PCIX);
         if (!cap)
-                goto out;
+                return -EINVAL;
 
-        err = pci_read_config_dword(dev, cap + PCI_X_STATUS, &stat);
-        if (err)
-                goto out;
+        if (pci_read_config_dword(dev, cap + PCI_X_STATUS, &stat))
+                return -EINVAL;
 
         if (v > (stat & PCI_X_STATUS_MAX_READ) >> 21)
                 return -E2BIG;
 
-        err = pci_read_config_dword(dev, cap + PCI_X_CMD, &cmd);
-        if (err)
-                goto out;
+        if (pci_read_config_word(dev, cap + PCI_X_CMD, &cmd))
+                return -EINVAL;
 
         o = (cmd & PCI_X_CMD_MAX_READ) >> 2;
         if (o != v) {
@@ -2431,10 +2651,10 @@ int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc)
 
                 cmd &= ~PCI_X_CMD_MAX_READ;
                 cmd |= v << 2;
-                err = pci_write_config_dword(dev, cap + PCI_X_CMD, cmd);
+                if (pci_write_config_word(dev, cap + PCI_X_CMD, cmd))
+                        return -EIO;
         }
-out:
-        return err;
+        return 0;
 }
 EXPORT_SYMBOL(pcix_set_mmrbc);
 
@@ -2450,7 +2670,7 @@ int pcie_get_readrq(struct pci_dev *dev)
         int ret, cap;
         u16 ctl;
 
-        cap = pci_find_capability(dev, PCI_CAP_ID_EXP);
+        cap = pci_pcie_cap(dev);
         if (!cap)
                 return -EINVAL;
 
@@ -2480,7 +2700,7 @@ int pcie_set_readrq(struct pci_dev *dev, int rq)
 
         v = (ffs(rq) - 8) << 12;
 
-        cap = pci_find_capability(dev, PCI_CAP_ID_EXP);
+        cap = pci_pcie_cap(dev);
         if (!cap)
                 goto out;
 
@@ -2540,7 +2760,24 @@ int pci_resource_bar(struct pci_dev *dev, int resno, enum pci_bar_type *type)
                         return reg;
         }
 
-        dev_err(&dev->dev, "BAR: invalid resource #%d\n", resno);
+        dev_err(&dev->dev, "BAR %d: invalid resource\n", resno);
+        return 0;
+}
+
+/* Some architectures require additional programming to enable VGA */
+static arch_set_vga_state_t arch_set_vga_state;
+
+void __init pci_register_set_vga_state(arch_set_vga_state_t func)
+{
+        arch_set_vga_state = func;      /* NULL disables */
+}
+
+static int pci_set_vga_state_arch(struct pci_dev *dev, bool decode,
+                      unsigned int command_bits, bool change_bridge)
+{
+        if (arch_set_vga_state)
+                return arch_set_vga_state(dev, decode, command_bits,
+                                                change_bridge);
         return 0;
 }
 
@@ -2557,9 +2794,15 @@ int pci_set_vga_state(struct pci_dev *dev, bool decode,
         struct pci_bus *bus;
         struct pci_dev *bridge;
         u16 cmd;
+        int rc;
 
         WARN_ON(command_bits & ~(PCI_COMMAND_IO|PCI_COMMAND_MEMORY));
 
+        /* ARCH specific VGA enables */
+        rc = pci_set_vga_state_arch(dev, decode, command_bits, change_bridge);
+        if (rc)
+                return rc;
+
         pci_read_config_word(dev, PCI_COMMAND, &cmd);
         if (decode == true)
                 cmd |= command_bits;
@@ -2590,7 +2833,7 @@ int pci_set_vga_state(struct pci_dev *dev, bool decode,
 
 #define RESOURCE_ALIGNMENT_PARAM_SIZE COMMAND_LINE_SIZE
 static char resource_alignment_param[RESOURCE_ALIGNMENT_PARAM_SIZE] = {0};
-spinlock_t resource_alignment_lock = SPIN_LOCK_UNLOCKED;
+static DEFINE_SPINLOCK(resource_alignment_lock);
 
 /**
  * pci_specified_resource_alignment - get resource alignment specified by user.
@@ -2723,6 +2966,11 @@ int __attribute__ ((weak)) pci_ext_cfg_avail(struct pci_dev *dev)
         return 1;
 }
 
+void __weak pci_fixup_cardbus(struct pci_bus *bus)
+{
+}
+EXPORT_SYMBOL(pci_fixup_cardbus);
+
 static int __init pci_setup(char *str)
 {
         while (str) {
@@ -2784,8 +3032,6 @@ EXPORT_SYMBOL(pci_set_mwi);
 EXPORT_SYMBOL(pci_try_set_mwi);
 EXPORT_SYMBOL(pci_clear_mwi);
 EXPORT_SYMBOL_GPL(pci_intx);
-EXPORT_SYMBOL(pci_set_dma_mask);
-EXPORT_SYMBOL(pci_set_consistent_dma_mask);
 EXPORT_SYMBOL(pci_assign_resource);
 EXPORT_SYMBOL(pci_find_parent_resource);
 EXPORT_SYMBOL(pci_select_bars);
@@ -2795,10 +3041,8 @@ EXPORT_SYMBOL(pci_save_state);
 EXPORT_SYMBOL(pci_restore_state);
 EXPORT_SYMBOL(pci_pme_capable);
 EXPORT_SYMBOL(pci_pme_active);
-EXPORT_SYMBOL(pci_enable_wake);
 EXPORT_SYMBOL(pci_wake_from_d3);
 EXPORT_SYMBOL(pci_target_state);
 EXPORT_SYMBOL(pci_prepare_to_sleep);
 EXPORT_SYMBOL(pci_back_from_sleep);
 EXPORT_SYMBOL_GPL(pci_set_pcie_reset_state);
-
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index d92d1954a2fb..4eb10f48d270 100644
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@ -35,6 +35,10 @@ int pci_probe_reset_function(struct pci_dev *dev);
  *
  * @sleep_wake: enables/disables the system wake up capability of given device
  *
+ * @run_wake: enables/disables the platform to generate run-time wake-up events
+ *              for given device (the device's wake-up capability has to be
+ *              enabled by @sleep_wake for this feature to work)
+ *
  * If given platform is generally capable of power managing PCI devices, all of
  * these callbacks are mandatory.
  */
@@ -44,11 +48,16 @@ struct pci_platform_pm_ops {
         pci_power_t (*choose_state)(struct pci_dev *dev);
         bool (*can_wakeup)(struct pci_dev *dev);
         int (*sleep_wake)(struct pci_dev *dev, bool enable);
+        int (*run_wake)(struct pci_dev *dev, bool enable);
 };
 
 extern int pci_set_platform_pm(struct pci_platform_pm_ops *ops);
 extern void pci_update_current_state(struct pci_dev *dev, pci_power_t state);
 extern void pci_disable_enabled_device(struct pci_dev *dev);
+extern bool pci_check_pme_status(struct pci_dev *dev);
+extern int pci_finish_runtime_suspend(struct pci_dev *dev);
+extern int __pci_pme_wakeup(struct pci_dev *dev, void *ign);
+extern void pci_pme_wakeup_bus(struct pci_bus *bus);
 extern void pci_pm_init(struct pci_dev *dev);
 extern void platform_pci_wakeup_init(struct pci_dev *dev);
 extern void pci_allocate_cap_save_buffers(struct pci_dev *dev);
@@ -311,4 +320,21 @@ static inline int pci_resource_alignment(struct pci_dev *dev,
         return resource_alignment(res);
 }
 
+extern void pci_enable_acs(struct pci_dev *dev);
+
+struct pci_dev_reset_methods {
+        u16 vendor;
+        u16 device;
+        int (*reset)(struct pci_dev *dev, int probe);
+};
+
+#ifdef CONFIG_PCI_QUIRKS
+extern int pci_dev_specific_reset(struct pci_dev *dev, int probe);
+#else
+static inline int pci_dev_specific_reset(struct pci_dev *dev, int probe)
+{
+        return -ENOTTY;
+}
+#endif
+
 #endif /* DRIVERS_PCI_H */
diff --git a/drivers/pci/pcie/Kconfig b/drivers/pci/pcie/Kconfig
index 5a0c6ad53f8e..b8b494b3e0d0 100644
--- a/drivers/pci/pcie/Kconfig
+++ b/drivers/pci/pcie/Kconfig
@@ -46,3 +46,7 @@ config PCIEASPM_DEBUG
         help
           This enables PCI Express ASPM debug support. It will add per-device
           interface to control ASPM.
+
+config PCIE_PME
+        def_bool y
+        depends on PCIEPORTBUS && PM_RUNTIME && EXPERIMENTAL && ACPI
diff --git a/drivers/pci/pcie/Makefile b/drivers/pci/pcie/Makefile
index 11f6bb1eae24..ea654545e7c4 100644
--- a/drivers/pci/pcie/Makefile
+++ b/drivers/pci/pcie/Makefile
@@ -11,3 +11,5 @@ obj-$(CONFIG_PCIEPORTBUS)	+= pcieportdrv.o
 
 # Build PCI Express AER if needed
 obj-$(CONFIG_PCIEAER)           += aer/
+
+obj-$(CONFIG_PCIE_PME) += pme/
diff --git a/drivers/pci/pcie/aer/Kconfig.debug b/drivers/pci/pcie/aer/Kconfig.debug
index b8c925c1f6aa..9142949734f5 100644
--- a/drivers/pci/pcie/aer/Kconfig.debug
+++ b/drivers/pci/pcie/aer/Kconfig.debug
@@ -3,14 +3,14 @@
 #
 
 config PCIEAER_INJECT
-        tristate "PCIE AER error injector support"
+        tristate "PCIe AER error injector support"
         depends on PCIEAER
         default n
         help
           This enables PCI Express Root Port Advanced Error Reporting
           (AER) software error injector.
 
-          Debuging PCIE AER code is quite difficult because it is hard
+          Debugging PCIe AER code is quite difficult because it is hard
           to trigger various real hardware errors. Software based
           error injection can fake almost all kinds of errors with the
           help of a user space helper tool aer-inject, which can be
diff --git a/drivers/pci/pcie/aer/aer_inject.c b/drivers/pci/pcie/aer/aer_inject.c
index 62d15f652bb6..f8f425b8731d 100644
--- a/drivers/pci/pcie/aer/aer_inject.c
+++ b/drivers/pci/pcie/aer/aer_inject.c
@@ -1,7 +1,7 @@
 /*
- * PCIE AER software error injection support.
+ * PCIe AER software error injection support.
  *
- * Debuging PCIE AER code is quite difficult because it is hard to
+ * Debuging PCIe AER code is quite difficult because it is hard to
  * trigger various real hardware errors. Software based error
  * injection can fake almost all kinds of errors with the help of a
  * user space helper tool aer-inject, which can be gotten from:
@@ -21,8 +21,10 @@
 #include <linux/init.h>
 #include <linux/miscdevice.h>
 #include <linux/pci.h>
+#include <linux/slab.h>
 #include <linux/fs.h>
 #include <linux/uaccess.h>
+#include <linux/stddef.h>
 #include "aerdrv.h"
 
 struct aer_error_inj {
@@ -35,10 +37,12 @@ struct aer_error_inj {
         u32 header_log1;
         u32 header_log2;
         u32 header_log3;
+        u16 domain;
 };
 
 struct aer_error {
         struct list_head list;
+        u16 domain;
         unsigned int bus;
         unsigned int devfn;
         int pos_cap_err;
@@ -66,22 +70,27 @@ static LIST_HEAD(pci_bus_ops_list);
 /* Protect einjected and pci_bus_ops_list */
 static DEFINE_SPINLOCK(inject_lock);
 
-static void aer_error_init(struct aer_error *err, unsigned int bus,
-                           unsigned int devfn, int pos_cap_err)
+static void aer_error_init(struct aer_error *err, u16 domain,
+                           unsigned int bus, unsigned int devfn,
+                           int pos_cap_err)
 {
         INIT_LIST_HEAD(&err->list);
+        err->domain = domain;
         err->bus = bus;
         err->devfn = devfn;
         err->pos_cap_err = pos_cap_err;
 }
 
 /* inject_lock must be held before calling */
-static struct aer_error *__find_aer_error(unsigned int bus, unsigned int devfn)
+static struct aer_error *__find_aer_error(u16 domain, unsigned int bus,
+                                          unsigned int devfn)
 {
         struct aer_error *err;
 
         list_for_each_entry(err, &einjected, list) {
-                if (bus == err->bus && devfn == err->devfn)
+                if (domain == err->domain &&
+                    bus == err->bus &&
+                    devfn == err->devfn)
                         return err;
         }
         return NULL;
@@ -90,7 +99,10 @@ static struct aer_error *__find_aer_error(unsigned int bus, unsigned int devfn)
 /* inject_lock must be held before calling */
 static struct aer_error *__find_aer_error_by_dev(struct pci_dev *dev)
 {
-        return __find_aer_error(dev->bus->number, dev->devfn);
+        int domain = pci_domain_nr(dev->bus);
+        if (domain < 0)
+                return NULL;
+        return __find_aer_error((u16)domain, dev->bus->number, dev->devfn);
 }
 
 /* inject_lock must be held before calling */
@@ -172,11 +184,15 @@ static int pci_read_aer(struct pci_bus *bus, unsigned int devfn, int where,
         struct aer_error *err;
         unsigned long flags;
         struct pci_ops *ops;
+        int domain;
 
         spin_lock_irqsave(&inject_lock, flags);
         if (size != sizeof(u32))
                 goto out;
-        err = __find_aer_error(bus->number, devfn);
+        domain = pci_domain_nr(bus);
+        if (domain < 0)
+                goto out;
+        err = __find_aer_error((u16)domain, bus->number, devfn);
         if (!err)
                 goto out;
 
@@ -200,11 +216,15 @@ int pci_write_aer(struct pci_bus *bus, unsigned int devfn, int where, int size,
         unsigned long flags;
         int rw1cs;
         struct pci_ops *ops;
+        int domain;
 
         spin_lock_irqsave(&inject_lock, flags);
         if (size != sizeof(u32))
                 goto out;
-        err = __find_aer_error(bus->number, devfn);
+        domain = pci_domain_nr(bus);
+        if (domain < 0)
+                goto out;
+        err = __find_aer_error((u16)domain, bus->number, devfn);
         if (!err)
                 goto out;
 
@@ -262,7 +282,7 @@ out:
 static struct pci_dev *pcie_find_root_port(struct pci_dev *dev)
 {
         while (1) {
-                if (!dev->is_pcie)
+                if (!pci_is_pcie(dev))
                         break;
                 if (dev->pcie_type == PCI_EXP_TYPE_ROOT_PORT)
                         return dev;
@@ -302,28 +322,31 @@ static int aer_inject(struct aer_error_inj *einj)
         unsigned long flags;
         unsigned int devfn = PCI_DEVFN(einj->dev, einj->fn);
         int pos_cap_err, rp_pos_cap_err;
-        u32 sever;
+        u32 sever, cor_mask, uncor_mask;
         int ret = 0;
 
-        dev = pci_get_bus_and_slot(einj->bus, devfn);
+        dev = pci_get_domain_bus_and_slot((int)einj->domain, einj->bus, devfn);
         if (!dev)
-                return -EINVAL;
+                return -ENODEV;
         rpdev = pcie_find_root_port(dev);
         if (!rpdev) {
-                ret = -EINVAL;
+                ret = -ENOTTY;
                 goto out_put;
         }
 
         pos_cap_err = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
         if (!pos_cap_err) {
-                ret = -EIO;
+                ret = -ENOTTY;
                 goto out_put;
         }
         pci_read_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_SEVER, &sever);
+        pci_read_config_dword(dev, pos_cap_err + PCI_ERR_COR_MASK, &cor_mask);
+        pci_read_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_MASK,
+                              &uncor_mask);
 
         rp_pos_cap_err = pci_find_ext_capability(rpdev, PCI_EXT_CAP_ID_ERR);
         if (!rp_pos_cap_err) {
-                ret = -EIO;
+                ret = -ENOTTY;
                 goto out_put;
         }
 
@@ -344,7 +367,8 @@ static int aer_inject(struct aer_error_inj *einj)
         if (!err) {
                 err = err_alloc;
                 err_alloc = NULL;
-                aer_error_init(err, einj->bus, devfn, pos_cap_err);
+                aer_error_init(err, einj->domain, einj->bus, devfn,
+                               pos_cap_err);
                 list_add(&err->list, &einjected);
         }
         err->uncor_status |= einj->uncor_status;
@@ -354,11 +378,27 @@ static int aer_inject(struct aer_error_inj *einj)
         err->header_log2 = einj->header_log2;
         err->header_log3 = einj->header_log3;
 
+        if (einj->cor_status && !(einj->cor_status & ~cor_mask)) {
+                ret = -EINVAL;
+                printk(KERN_WARNING "The correctable error(s) is masked "
+                                "by device\n");
+                spin_unlock_irqrestore(&inject_lock, flags);
+                goto out_put;
+        }
+        if (einj->uncor_status && !(einj->uncor_status & ~uncor_mask)) {
+                ret = -EINVAL;
+                printk(KERN_WARNING "The uncorrectable error(s) is masked "
+                                "by device\n");
+                spin_unlock_irqrestore(&inject_lock, flags);
+                goto out_put;
+        }
+
         rperr = __find_aer_error_by_dev(rpdev);
         if (!rperr) {
                 rperr = rperr_alloc;
                 rperr_alloc = NULL;
-                aer_error_init(rperr, rpdev->bus->number, rpdev->devfn,
+                aer_error_init(rperr, pci_domain_nr(rpdev->bus),
+                               rpdev->bus->number, rpdev->devfn,
                                rp_pos_cap_err);
                 list_add(&rperr->list, &einjected);
         }
@@ -392,8 +432,14 @@ static int aer_inject(struct aer_error_inj *einj)
         if (ret)
                 goto out_put;
 
-        if (find_aer_device(rpdev, &edev))
+        if (find_aer_device(rpdev, &edev)) {
+                if (!get_service_data(edev)) {
+                        printk(KERN_WARNING "AER service is not initialized\n");
+                        ret = -EINVAL;
+                        goto out_put;
+                }
                 aer_irq(-1, edev);
+        }
         else
                 ret = -EINVAL;
 out_put:
@@ -411,10 +457,11 @@ static ssize_t aer_inject_write(struct file *filp, const char __user *ubuf,
 
         if (!capable(CAP_SYS_ADMIN))
                 return -EPERM;
-
-        if (usize != sizeof(struct aer_error_inj))
+        if (usize < offsetof(struct aer_error_inj, domain) ||
+            usize > sizeof(einj))
                 return -EINVAL;
 
+        memset(&einj, 0, sizeof(einj));
         if (copy_from_user(&einj, ubuf, usize))
                 return -EFAULT;
 
@@ -452,7 +499,7 @@ static void __exit aer_inject_exit(void)
         }
 
         spin_lock_irqsave(&inject_lock, flags);
-        list_for_each_entry_safe(err, err_next, &pci_bus_ops_list, list) {
+        list_for_each_entry_safe(err, err_next, &einjected, list) {
                 list_del(&err->list);
                 kfree(err);
         }
@@ -462,5 +509,5 @@ static void __exit aer_inject_exit(void)
 module_init(aer_inject_init);
 module_exit(aer_inject_exit);
 
-MODULE_DESCRIPTION("PCIE AER software error injector");
+MODULE_DESCRIPTION("PCIe AER software error injector");
 MODULE_LICENSE("GPL");
diff --git a/drivers/pci/pcie/aer/aerdrv.c b/drivers/pci/pcie/aer/aerdrv.c
index 40c3cc5d1caf..7a711ee314b7 100644
--- a/drivers/pci/pcie/aer/aerdrv.c
+++ b/drivers/pci/pcie/aer/aerdrv.c
@@ -25,6 +25,7 @@
 #include <linux/interrupt.h>
 #include <linux/delay.h>
 #include <linux/pcieport_if.h>
+#include <linux/slab.h>
 
 #include "aerdrv.h"
 #include "../../pci.h"
@@ -53,7 +54,7 @@ static struct pci_error_handlers aer_error_handlers = {
 
 static struct pcie_port_service_driver aerdriver = {
         .name           = "aer",
-        .port_type      = PCIE_RC_PORT,
+        .port_type      = PCI_EXP_TYPE_ROOT_PORT,
         .service        = PCIE_PORT_SERVICE_AER,
 
         .probe          = aer_probe,
@@ -155,7 +156,7 @@ static struct aer_rpc *aer_alloc_rpc(struct pcie_device *dev)
         mutex_init(&rpc->rpc_mutex);
         init_waitqueue_head(&rpc->wait_release);
 
-        /* Use PCIE bus function to store rpc into PCIE device */
+        /* Use PCIe bus function to store rpc into PCIe device */
         set_service_data(dev, rpc);
 
         return rpc;
@@ -243,11 +244,17 @@ static pci_ers_result_t aer_root_reset(struct pci_dev *dev)
 
         /* Assert Secondary Bus Reset */
         pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &p2p_ctrl);
-        p2p_ctrl |= PCI_CB_BRIDGE_CTL_CB_RESET;
+        p2p_ctrl |= PCI_BRIDGE_CTL_BUS_RESET;
         pci_write_config_word(dev, PCI_BRIDGE_CONTROL, p2p_ctrl);
 
+        /*
+         * we should send hot reset message for 2ms to allow it time to
+         * propogate to all downstream ports
+         */
+        msleep(2);
+
         /* De-assert Secondary Bus Reset */
-        p2p_ctrl &= ~PCI_CB_BRIDGE_CTL_CB_RESET;
+        p2p_ctrl &= ~PCI_BRIDGE_CTL_BUS_RESET;
         pci_write_config_word(dev, PCI_BRIDGE_CONTROL, p2p_ctrl);
 
         /*
@@ -295,7 +302,7 @@ static void aer_error_resume(struct pci_dev *dev)
         u16 reg16;
 
         /* Clean up Root device status */
-        pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
+        pos = pci_pcie_cap(dev);
         pci_read_config_word(dev, pos + PCI_EXP_DEVSTA, &reg16);
         pci_write_config_word(dev, pos + PCI_EXP_DEVSTA, reg16);
 
diff --git a/drivers/pci/pcie/aer/aerdrv_acpi.c b/drivers/pci/pcie/aer/aerdrv_acpi.c
index 8edb2f300e8f..04814087658d 100644
--- a/drivers/pci/pcie/aer/aerdrv_acpi.c
+++ b/drivers/pci/pcie/aer/aerdrv_acpi.c
@@ -24,7 +24,7 @@
  *
  * @return: Zero on success. Nonzero otherwise.
  *
- * Invoked when PCIE bus loads AER service driver. To avoid conflict with
+ * Invoked when PCIe bus loads AER service driver. To avoid conflict with
  * BIOS AER support requires BIOS to yield AER control to OS native driver.
  **/
 int aer_osc_setup(struct pcie_device *pciedev)
diff --git a/drivers/pci/pcie/aer/aerdrv_core.c b/drivers/pci/pcie/aer/aerdrv_core.c
index 9f5ccbeb4fa5..aceb04b67b60 100644
--- a/drivers/pci/pcie/aer/aerdrv_core.c
+++ b/drivers/pci/pcie/aer/aerdrv_core.c
@@ -23,6 +23,7 @@
 #include <linux/pm.h>
 #include <linux/suspend.h>
 #include <linux/delay.h>
+#include <linux/slab.h>
 #include "aerdrv.h"
 
 static int forceload;
@@ -35,11 +36,14 @@ int pci_enable_pcie_error_reporting(struct pci_dev *dev)
         u16 reg16 = 0;
         int pos;
 
+        if (dev->aer_firmware_first)
+                return -EIO;
+
         pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
         if (!pos)
                 return -EIO;
 
-        pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
+        pos = pci_pcie_cap(dev);
         if (!pos)
                 return -EIO;
 
@@ -60,7 +64,10 @@ int pci_disable_pcie_error_reporting(struct pci_dev *dev)
         u16 reg16 = 0;
         int pos;
 
-        pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
+        if (dev->aer_firmware_first)
+                return -EIO;
+
+        pos = pci_pcie_cap(dev);
         if (!pos)
                 return -EIO;
 
@@ -78,48 +85,27 @@ EXPORT_SYMBOL_GPL(pci_disable_pcie_error_reporting);
 int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev)
 {
         int pos;
-        u32 status, mask;
+        u32 status;
 
         pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
         if (!pos)
                 return -EIO;
 
         pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, &status);
-        pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_SEVER, &mask);
-        if (dev->error_state == pci_channel_io_normal)
-                status &= ~mask; /* Clear corresponding nonfatal bits */
-        else
-                status &= mask; /* Clear corresponding fatal bits */
-        pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, status);
+        if (status)
+                pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, status);
 
         return 0;
 }
 EXPORT_SYMBOL_GPL(pci_cleanup_aer_uncorrect_error_status);
 
-#if 0
-int pci_cleanup_aer_correct_error_status(struct pci_dev *dev)
-{
-        int pos;
-        u32 status;
-
-        pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
-        if (!pos)
-                return -EIO;
-
-        pci_read_config_dword(dev, pos + PCI_ERR_COR_STATUS, &status);
-        pci_write_config_dword(dev, pos + PCI_ERR_COR_STATUS, status);
-
-        return 0;
-}
-#endif  /*  0  */
-
 static int set_device_error_reporting(struct pci_dev *dev, void *data)
 {
         bool enable = *((bool *)data);
 
-        if (dev->pcie_type == PCIE_RC_PORT ||
-            dev->pcie_type == PCIE_SW_UPSTREAM_PORT ||
-            dev->pcie_type == PCIE_SW_DOWNSTREAM_PORT) {
+        if ((dev->pcie_type == PCI_EXP_TYPE_ROOT_PORT) ||
+            (dev->pcie_type == PCI_EXP_TYPE_UPSTREAM) ||
+            (dev->pcie_type == PCI_EXP_TYPE_DOWNSTREAM)) {
                 if (enable)
                         pci_enable_pcie_error_reporting(dev);
                 else
@@ -218,7 +204,7 @@ static int find_device_iter(struct pci_dev *dev, void *data)
          */
         if (atomic_read(&dev->enable_cnt) == 0)
                 return 0;
-        pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
+        pos = pci_pcie_cap(dev);
         if (!pos)
                 return 0;
         /* Check if AER is enabled */
@@ -431,10 +417,9 @@ static int find_aer_service_iter(struct device *device, void *data)
         result = (struct find_aer_service_data *) data;
 
         if (device->bus == &pcie_port_bus_type) {
-                struct pcie_port_data *port_data;
+                struct pcie_device *pcie = to_pcie_device(device);
 
-                port_data = pci_get_drvdata(to_pcie_device(device)->port);
-                if (port_data->port_type == PCIE_SW_DOWNSTREAM_PORT)
+                if (pcie->port->pcie_type == PCI_EXP_TYPE_DOWNSTREAM)
                         result->is_downstream = 1;
 
                 driver = device->driver;
@@ -603,7 +588,7 @@ static void handle_error_source(struct pcie_device *aerdev,
  * aer_enable_rootport - enable Root Port's interrupts when receiving messages
  * @rpc: pointer to a Root Port data structure
  *
- * Invoked when PCIE bus loads AER service driver.
+ * Invoked when PCIe bus loads AER service driver.
  */
 void aer_enable_rootport(struct aer_rpc *rpc)
 {
@@ -612,8 +597,8 @@ void aer_enable_rootport(struct aer_rpc *rpc)
         u16 reg16;
         u32 reg32;
 
-        pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
-        /* Clear PCIE Capability's Device Status */
+        pos = pci_pcie_cap(pdev);
+        /* Clear PCIe Capability's Device Status */
         pci_read_config_word(pdev, pos+PCI_EXP_DEVSTA, &reg16);
         pci_write_config_word(pdev, pos+PCI_EXP_DEVSTA, reg16);
 
@@ -647,7 +632,7 @@ void aer_enable_rootport(struct aer_rpc *rpc)
  * disable_root_aer - disable Root Port's interrupts when receiving messages
  * @rpc: pointer to a Root Port data structure
  *
- * Invoked when PCIE bus unloads AER service driver.
+ * Invoked when PCIe bus unloads AER service driver.
  */
 static void disable_root_aer(struct aer_rpc *rpc)
 {
@@ -874,8 +859,22 @@ void aer_delete_rootport(struct aer_rpc *rpc)
  */
 int aer_init(struct pcie_device *dev)
 {
-        if (aer_osc_setup(dev) && !forceload)
-                return -ENXIO;
+        if (dev->port->aer_firmware_first) {
+                dev_printk(KERN_DEBUG, &dev->device,
+                           "PCIe errors handled by platform firmware.\n");
+                goto out;
+        }
+
+        if (aer_osc_setup(dev))
+                goto out;
 
         return 0;
+out:
+        if (forceload) {
+                dev_printk(KERN_DEBUG, &dev->device,
+                           "aerdrv forceload requested.\n");
+                dev->port->aer_firmware_first = 0;
+                return 0;
+        }
+        return -ENXIO;
 }
diff --git a/drivers/pci/pcie/aer/aerdrv_errprint.c b/drivers/pci/pcie/aer/aerdrv_errprint.c
index 44acde72294f..9d3e4c8d0184 100644
--- a/drivers/pci/pcie/aer/aerdrv_errprint.c
+++ b/drivers/pci/pcie/aer/aerdrv_errprint.c
@@ -184,7 +184,7 @@ void aer_print_error(struct pci_dev *dev, struct aer_err_info *info)
 
         if (info->status == 0) {
                 AER_PR(info, dev,
-                        "PCIE Bus Error: severity=%s, type=Unaccessible, "
+                        "PCIe Bus Error: severity=%s, type=Unaccessible, "
                         "id=%04x(Unregistered Agent ID)\n",
                         aer_error_severity_string[info->severity], id);
         } else {
@@ -194,7 +194,7 @@ void aer_print_error(struct pci_dev *dev, struct aer_err_info *info)
                 agent = AER_GET_AGENT(info->severity, info->status);
 
                 AER_PR(info, dev,
-                        "PCIE Bus Error: severity=%s, type=%s, id=%04x(%s)\n",
+                        "PCIe Bus Error: severity=%s, type=%s, id=%04x(%s)\n",
                         aer_error_severity_string[info->severity],
                         aer_error_layer[layer], id, aer_agent_string[agent]);
 
diff --git a/drivers/pci/pcie/aer/ecrc.c b/drivers/pci/pcie/aer/ecrc.c
index a928d8ab6bda..a2747a663bc9 100644
--- a/drivers/pci/pcie/aer/ecrc.c
+++ b/drivers/pci/pcie/aer/ecrc.c
@@ -51,7 +51,7 @@ static int enable_ecrc_checking(struct pci_dev *dev)
         int pos;
         u32 reg32;
 
-        if (!dev->is_pcie)
+        if (!pci_is_pcie(dev))
                 return -ENODEV;
 
         pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
@@ -79,7 +79,7 @@ static int disable_ecrc_checking(struct pci_dev *dev)
         int pos;
         u32 reg32;
 
-        if (!dev->is_pcie)
+        if (!pci_is_pcie(dev))
                 return -ENODEV;
 
         pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c
index 5b7056cec00c..be53d98fa384 100644
--- a/drivers/pci/pcie/aspm.c
+++ b/drivers/pci/pcie/aspm.c
@@ -1,6 +1,6 @@
 /*
  * File:        drivers/pci/pcie/aspm.c
- * Enabling PCIE link L0s/L1 state and Clock Power Management
+ * Enabling PCIe link L0s/L1 state and Clock Power Management
  *
  * Copyright (C) 2007 Intel
  * Copyright (C) Zhang Yanmin (yanmin.zhang@intel.com)
@@ -122,7 +122,7 @@ static void pcie_set_clkpm_nocheck(struct pcie_link_state *link, int enable)
         struct pci_bus *linkbus = link->pdev->subordinate;
 
         list_for_each_entry(child, &linkbus->devices, bus_list) {
-                pos = pci_find_capability(child, PCI_CAP_ID_EXP);
+                pos = pci_pcie_cap(child);
                 if (!pos)
                         return;
                 pci_read_config_word(child, pos + PCI_EXP_LNKCTL, &reg16);
@@ -156,7 +156,7 @@ static void pcie_clkpm_cap_init(struct pcie_link_state *link, int blacklist)
 
         /* All functions should have the same cap and state, take the worst */
         list_for_each_entry(child, &linkbus->devices, bus_list) {
-                pos = pci_find_capability(child, PCI_CAP_ID_EXP);
+                pos = pci_pcie_cap(child);
                 if (!pos)
                         return;
                 pci_read_config_dword(child, pos + PCI_EXP_LNKCAP, &reg32);
@@ -191,23 +191,23 @@ static void pcie_aspm_configure_common_clock(struct pcie_link_state *link)
          * Configuration, so just check one function
          */
         child = list_entry(linkbus->devices.next, struct pci_dev, bus_list);
-        BUG_ON(!child->is_pcie);
+        BUG_ON(!pci_is_pcie(child));
 
         /* Check downstream component if bit Slot Clock Configuration is 1 */
-        cpos = pci_find_capability(child, PCI_CAP_ID_EXP);
+        cpos = pci_pcie_cap(child);
         pci_read_config_word(child, cpos + PCI_EXP_LNKSTA, &reg16);
         if (!(reg16 & PCI_EXP_LNKSTA_SLC))
                 same_clock = 0;
 
         /* Check upstream component if bit Slot Clock Configuration is 1 */
-        ppos = pci_find_capability(parent, PCI_CAP_ID_EXP);
+        ppos = pci_pcie_cap(parent);
         pci_read_config_word(parent, ppos + PCI_EXP_LNKSTA, &reg16);
         if (!(reg16 & PCI_EXP_LNKSTA_SLC))
                 same_clock = 0;
 
         /* Configure downstream component, all functions */
         list_for_each_entry(child, &linkbus->devices, bus_list) {
-                cpos = pci_find_capability(child, PCI_CAP_ID_EXP);
+                cpos = pci_pcie_cap(child);
                 pci_read_config_word(child, cpos + PCI_EXP_LNKCTL, &reg16);
                 child_reg[PCI_FUNC(child->devfn)] = reg16;
                 if (same_clock)
@@ -247,7 +247,7 @@ static void pcie_aspm_configure_common_clock(struct pcie_link_state *link)
         dev_printk(KERN_ERR, &parent->dev,
                    "ASPM: Could not configure common clock\n");
         list_for_each_entry(child, &linkbus->devices, bus_list) {
-                cpos = pci_find_capability(child, PCI_CAP_ID_EXP);
+                cpos = pci_pcie_cap(child);
                 pci_write_config_word(child, cpos + PCI_EXP_LNKCTL,
                                       child_reg[PCI_FUNC(child->devfn)]);
         }
@@ -300,7 +300,7 @@ static void pcie_get_aspm_reg(struct pci_dev *pdev,
         u16 reg16;
         u32 reg32;
 
-        pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
+        pos = pci_pcie_cap(pdev);
         pci_read_config_dword(pdev, pos + PCI_EXP_LNKCAP, &reg32);
         info->support = (reg32 & PCI_EXP_LNKCAP_ASPMS) >> 10;
         info->latency_encoding_l0s = (reg32 & PCI_EXP_LNKCAP_L0SEL) >> 12;
@@ -420,7 +420,7 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist)
                     child->pcie_type != PCI_EXP_TYPE_LEG_END)
                         continue;
 
-                pos = pci_find_capability(child, PCI_CAP_ID_EXP);
+                pos = pci_pcie_cap(child);
                 pci_read_config_dword(child, pos + PCI_EXP_DEVCAP, &reg32);
                 /* Calculate endpoint L0s acceptable latency */
                 encoding = (reg32 & PCI_EXP_DEVCAP_L0S) >> 6;
@@ -436,7 +436,7 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist)
 static void pcie_config_aspm_dev(struct pci_dev *pdev, u32 val)
 {
         u16 reg16;
-        int pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
+        int pos = pci_pcie_cap(pdev);
 
         pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &reg16);
         reg16 &= ~0x3;
@@ -499,11 +499,11 @@ static int pcie_aspm_sanity_check(struct pci_dev *pdev)
         int pos;
         u32 reg32;
         /*
-         * Some functions in a slot might not all be PCIE functions,
+         * Some functions in a slot might not all be PCIe functions,
          * very strange. Disable ASPM for the whole slot
          */
         list_for_each_entry(child, &pdev->subordinate->devices, bus_list) {
-                pos = pci_find_capability(child, PCI_CAP_ID_EXP);
+                pos = pci_pcie_cap(child);
                 if (!pos)
                         return -EINVAL;
                 /*
@@ -563,7 +563,7 @@ void pcie_aspm_init_link_state(struct pci_dev *pdev)
         struct pcie_link_state *link;
         int blacklist = !!pcie_aspm_sanity_check(pdev);
 
-        if (aspm_disabled || !pdev->is_pcie || pdev->link_state)
+        if (aspm_disabled || !pci_is_pcie(pdev) || pdev->link_state)
                 return;
         if (pdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT &&
             pdev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM)
@@ -629,7 +629,8 @@ void pcie_aspm_exit_link_state(struct pci_dev *pdev)
         struct pci_dev *parent = pdev->bus->self;
         struct pcie_link_state *link, *root, *parent_link;
 
-        if (aspm_disabled || !pdev->is_pcie || !parent || !parent->link_state)
+        if (aspm_disabled || !pci_is_pcie(pdev) ||
+            !parent || !parent->link_state)
                 return;
         if ((parent->pcie_type != PCI_EXP_TYPE_ROOT_PORT) &&
             (parent->pcie_type != PCI_EXP_TYPE_DOWNSTREAM))
@@ -670,7 +671,7 @@ void pcie_aspm_pm_state_change(struct pci_dev *pdev)
 {
         struct pcie_link_state *link = pdev->link_state;
 
-        if (aspm_disabled || !pdev->is_pcie || !link)
+        if (aspm_disabled || !pci_is_pcie(pdev) || !link)
                 return;
         if ((pdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT) &&
             (pdev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM))
@@ -696,7 +697,7 @@ void pci_disable_link_state(struct pci_dev *pdev, int state)
         struct pci_dev *parent = pdev->bus->self;
         struct pcie_link_state *link;
 
-        if (aspm_disabled || !pdev->is_pcie)
+        if (aspm_disabled || !pci_is_pcie(pdev))
                 return;
         if (pdev->pcie_type == PCI_EXP_TYPE_ROOT_PORT ||
             pdev->pcie_type == PCI_EXP_TYPE_DOWNSTREAM)
@@ -841,8 +842,9 @@ void pcie_aspm_create_sysfs_dev_files(struct pci_dev *pdev)
 {
         struct pcie_link_state *link_state = pdev->link_state;
 
-        if (!pdev->is_pcie || (pdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT &&
-                pdev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM) || !link_state)
+        if (!pci_is_pcie(pdev) ||
+            (pdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT &&
+             pdev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM) || !link_state)
                 return;
 
         if (link_state->aspm_support)
@@ -857,8 +859,9 @@ void pcie_aspm_remove_sysfs_dev_files(struct pci_dev *pdev)
 {
         struct pcie_link_state *link_state = pdev->link_state;
 
-        if (!pdev->is_pcie || (pdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT &&
-                pdev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM) || !link_state)
+        if (!pci_is_pcie(pdev) ||
+            (pdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT &&
+             pdev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM) || !link_state)
                 return;
 
         if (link_state->aspm_support)
diff --git a/drivers/pci/pcie/pme/Makefile b/drivers/pci/pcie/pme/Makefile
new file mode 100644
index 000000000000..8b9238053080
--- /dev/null
+++ b/drivers/pci/pcie/pme/Makefile
@@ -0,0 +1,8 @@
+#
+# Makefile for PCI-Express Root Port PME signaling driver
+#
+
+obj-$(CONFIG_PCIE_PME) += pmedriver.o
+
+pmedriver-objs := pcie_pme.o
+pmedriver-$(CONFIG_ACPI) += pcie_pme_acpi.o
diff --git a/drivers/pci/pcie/pme/pcie_pme.c b/drivers/pci/pcie/pme/pcie_pme.c
new file mode 100644
index 000000000000..aac285a16b62
--- /dev/null
+++ b/drivers/pci/pcie/pme/pcie_pme.c
@@ -0,0 +1,506 @@
+/*
+ * PCIe Native PME support
+ *
+ * Copyright (C) 2007 - 2009 Intel Corp
+ * Copyright (C) 2007 - 2009 Shaohua Li <shaohua.li@intel.com>
+ * Copyright (C) 2009 Rafael J. Wysocki <rjw@sisk.pl>, Novell Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License V2.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/module.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/slab.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/device.h>
+#include <linux/pcieport_if.h>
+#include <linux/acpi.h>
+#include <linux/pci-acpi.h>
+#include <linux/pm_runtime.h>
+
+#include "../../pci.h"
+#include "pcie_pme.h"
+
+#define PCI_EXP_RTSTA_PME       0x10000 /* PME status */
+#define PCI_EXP_RTSTA_PENDING   0x20000 /* PME pending */
+
+/*
+ * If set, this switch will prevent the PCIe root port PME service driver from
+ * being registered.  Consequently, the interrupt-based PCIe PME signaling will
+ * not be used by any PCIe root ports in that case.
+ */
+static bool pcie_pme_disabled;
+
+/*
+ * The PCI Express Base Specification 2.0, Section 6.1.8, states the following:
+ * "In order to maintain compatibility with non-PCI Express-aware system
+ * software, system power management logic must be configured by firmware to use
+ * the legacy mechanism of signaling PME by default.  PCI Express-aware system
+ * software must notify the firmware prior to enabling native, interrupt-based
+ * PME signaling."  However, if the platform doesn't provide us with a suitable
+ * notification mechanism or the notification fails, it is not clear whether or
+ * not we are supposed to use the interrupt-based PCIe PME signaling.  The
+ * switch below can be used to indicate the desired behaviour.  When set, it
+ * will make the kernel use the interrupt-based PCIe PME signaling regardless of
+ * the platform notification status, although the kernel will attempt to notify
+ * the platform anyway.  When unset, it will prevent the kernel from using the
+ * the interrupt-based PCIe PME signaling if the platform notification fails,
+ * which is the default.
+ */
+static bool pcie_pme_force_enable;
+
+/*
+ * If this switch is set, MSI will not be used for PCIe PME signaling.  This
+ * causes the PCIe port driver to use INTx interrupts only, but it turns out
+ * that using MSI for PCIe PME signaling doesn't play well with PCIe PME-based
+ * wake-up from system sleep states.
+ */
+bool pcie_pme_msi_disabled;
+
+static int __init pcie_pme_setup(char *str)
+{
+        if (!strcmp(str, "off"))
+                pcie_pme_disabled = true;
+        else if (!strcmp(str, "force"))
+                pcie_pme_force_enable = true;
+        else if (!strcmp(str, "nomsi"))
+                pcie_pme_msi_disabled = true;
+        return 1;
+}
+__setup("pcie_pme=", pcie_pme_setup);
+
+/**
+ * pcie_pme_platform_setup - Ensure that the kernel controls the PCIe PME.
+ * @srv: PCIe PME root port service to use for carrying out the check.
+ *
+ * Notify the platform that the native PCIe PME is going to be used and return
+ * 'true' if the control of the PCIe PME registers has been acquired from the
+ * platform.
+ */
+static bool pcie_pme_platform_setup(struct pcie_device *srv)
+{
+        if (!pcie_pme_platform_notify(srv))
+                return true;
+        return pcie_pme_force_enable;
+}
+
+struct pcie_pme_service_data {
+        spinlock_t lock;
+        struct pcie_device *srv;
+        struct work_struct work;
+        bool noirq; /* Don't enable the PME interrupt used by this service. */
+};
+
+/**
+ * pcie_pme_interrupt_enable - Enable/disable PCIe PME interrupt generation.
+ * @dev: PCIe root port or event collector.
+ * @enable: Enable or disable the interrupt.
+ */
+static void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable)
+{
+        int rtctl_pos;
+        u16 rtctl;
+
+        rtctl_pos = pci_pcie_cap(dev) + PCI_EXP_RTCTL;
+
+        pci_read_config_word(dev, rtctl_pos, &rtctl);
+        if (enable)
+                rtctl |= PCI_EXP_RTCTL_PMEIE;
+        else
+                rtctl &= ~PCI_EXP_RTCTL_PMEIE;
+        pci_write_config_word(dev, rtctl_pos, rtctl);
+}
+
+/**
+ * pcie_pme_clear_status - Clear root port PME interrupt status.
+ * @dev: PCIe root port or event collector.
+ */
+static void pcie_pme_clear_status(struct pci_dev *dev)
+{
+        int rtsta_pos;
+        u32 rtsta;
+
+        rtsta_pos = pci_pcie_cap(dev) + PCI_EXP_RTSTA;
+
+        pci_read_config_dword(dev, rtsta_pos, &rtsta);
+        rtsta |= PCI_EXP_RTSTA_PME;
+        pci_write_config_dword(dev, rtsta_pos, rtsta);
+}
+
+/**
+ * pcie_pme_walk_bus - Scan a PCI bus for devices asserting PME#.
+ * @bus: PCI bus to scan.
+ *
+ * Scan given PCI bus and all buses under it for devices asserting PME#.
+ */
+static bool pcie_pme_walk_bus(struct pci_bus *bus)
+{
+        struct pci_dev *dev;
+        bool ret = false;
+
+        list_for_each_entry(dev, &bus->devices, bus_list) {
+                /* Skip PCIe devices in case we started from a root port. */
+                if (!pci_is_pcie(dev) && pci_check_pme_status(dev)) {
+                        pm_request_resume(&dev->dev);
+                        ret = true;
+                }
+
+                if (dev->subordinate && pcie_pme_walk_bus(dev->subordinate))
+                        ret = true;
+        }
+
+        return ret;
+}
+
+/**
+ * pcie_pme_from_pci_bridge - Check if PCIe-PCI bridge generated a PME.
+ * @bus: Secondary bus of the bridge.
+ * @devfn: Device/function number to check.
+ *
+ * PME from PCI devices under a PCIe-PCI bridge may be converted to an in-band
+ * PCIe PME message.  In such that case the bridge should use the Requester ID
+ * of device/function number 0 on its secondary bus.
+ */
+static bool pcie_pme_from_pci_bridge(struct pci_bus *bus, u8 devfn)
+{
+        struct pci_dev *dev;
+        bool found = false;
+
+        if (devfn)
+                return false;
+
+        dev = pci_dev_get(bus->self);
+        if (!dev)
+                return false;
+
+        if (pci_is_pcie(dev) && dev->pcie_type == PCI_EXP_TYPE_PCI_BRIDGE) {
+                down_read(&pci_bus_sem);
+                if (pcie_pme_walk_bus(bus))
+                        found = true;
+                up_read(&pci_bus_sem);
+        }
+
+        pci_dev_put(dev);
+        return found;
+}
+
+/**
+ * pcie_pme_handle_request - Find device that generated PME and handle it.
+ * @port: Root port or event collector that generated the PME interrupt.
+ * @req_id: PCIe Requester ID of the device that generated the PME.
+ */
+static void pcie_pme_handle_request(struct pci_dev *port, u16 req_id)
+{
+        u8 busnr = req_id >> 8, devfn = req_id & 0xff;
+        struct pci_bus *bus;
+        struct pci_dev *dev;
+        bool found = false;
+
+        /* First, check if the PME is from the root port itself. */
+        if (port->devfn == devfn && port->bus->number == busnr) {
+                if (pci_check_pme_status(port)) {
+                        pm_request_resume(&port->dev);
+                        found = true;
+                } else {
+                        /*
+                         * Apparently, the root port generated the PME on behalf
+                         * of a non-PCIe device downstream.  If this is done by
+                         * a root port, the Requester ID field in its status
+                         * register may contain either the root port's, or the
+                         * source device's information (PCI Express Base
+                         * Specification, Rev. 2.0, Section 6.1.9).
+                         */
+                        down_read(&pci_bus_sem);
+                        found = pcie_pme_walk_bus(port->subordinate);
+                        up_read(&pci_bus_sem);
+                }
+                goto out;
+        }
+
+        /* Second, find the bus the source device is on. */
+        bus = pci_find_bus(pci_domain_nr(port->bus), busnr);
+        if (!bus)
+                goto out;
+
+        /* Next, check if the PME is from a PCIe-PCI bridge. */
+        found = pcie_pme_from_pci_bridge(bus, devfn);
+        if (found)
+                goto out;
+
+        /* Finally, try to find the PME source on the bus. */
+        down_read(&pci_bus_sem);
+        list_for_each_entry(dev, &bus->devices, bus_list) {
+                pci_dev_get(dev);
+                if (dev->devfn == devfn) {
+                        found = true;
+                        break;
+                }
+                pci_dev_put(dev);
+        }
+        up_read(&pci_bus_sem);
+
+        if (found) {
+                /* The device is there, but we have to check its PME status. */
+                found = pci_check_pme_status(dev);
+                if (found)
+                        pm_request_resume(&dev->dev);
+                pci_dev_put(dev);
+        } else if (devfn) {
+                /*
+                 * The device is not there, but we can still try to recover by
+                 * assuming that the PME was reported by a PCIe-PCI bridge that
+                 * used devfn different from zero.
+                 */
+                dev_dbg(&port->dev, "PME interrupt generated for "
+                        "non-existent device %02x:%02x.%d\n",
+                        busnr, PCI_SLOT(devfn), PCI_FUNC(devfn));
+                found = pcie_pme_from_pci_bridge(bus, 0);
+        }
+
+ out:
+        if (!found)
+                dev_dbg(&port->dev, "Spurious native PME interrupt!\n");
+}
+
+/**
+ * pcie_pme_work_fn - Work handler for PCIe PME interrupt.
+ * @work: Work structure giving access to service data.
+ */
+static void pcie_pme_work_fn(struct work_struct *work)
+{
+        struct pcie_pme_service_data *data =
+                        container_of(work, struct pcie_pme_service_data, work);
+        struct pci_dev *port = data->srv->port;
+        int rtsta_pos;
+        u32 rtsta;
+
+        rtsta_pos = pci_pcie_cap(port) + PCI_EXP_RTSTA;
+
+        spin_lock_irq(&data->lock);
+
+        for (;;) {
+                if (data->noirq)
+                        break;
+
+                pci_read_config_dword(port, rtsta_pos, &rtsta);
+                if (rtsta & PCI_EXP_RTSTA_PME) {
+                        /*
+                         * Clear PME status of the port.  If there are other
+                         * pending PMEs, the status will be set again.
+                         */
+                        pcie_pme_clear_status(port);
+
+                        spin_unlock_irq(&data->lock);
+                        pcie_pme_handle_request(port, rtsta & 0xffff);
+                        spin_lock_irq(&data->lock);
+
+                        continue;
+                }
+
+                /* No need to loop if there are no more PMEs pending. */
+                if (!(rtsta & PCI_EXP_RTSTA_PENDING))
+                        break;
+
+                spin_unlock_irq(&data->lock);
+                cpu_relax();
+                spin_lock_irq(&data->lock);
+        }
+
+        if (!data->noirq)
+                pcie_pme_interrupt_enable(port, true);
+
+        spin_unlock_irq(&data->lock);
+}
+
+/**
+ * pcie_pme_irq - Interrupt handler for PCIe root port PME interrupt.
+ * @irq: Interrupt vector.
+ * @context: Interrupt context pointer.
+ */
+static irqreturn_t pcie_pme_irq(int irq, void *context)
+{
+        struct pci_dev *port;
+        struct pcie_pme_service_data *data;
+        int rtsta_pos;
+        u32 rtsta;
+        unsigned long flags;
+
+        port = ((struct pcie_device *)context)->port;
+        data = get_service_data((struct pcie_device *)context);
+
+        rtsta_pos = pci_pcie_cap(port) + PCI_EXP_RTSTA;
+
+        spin_lock_irqsave(&data->lock, flags);
+        pci_read_config_dword(port, rtsta_pos, &rtsta);
+
+        if (!(rtsta & PCI_EXP_RTSTA_PME)) {
+                spin_unlock_irqrestore(&data->lock, flags);
+                return IRQ_NONE;
+        }
+
+        pcie_pme_interrupt_enable(port, false);
+        spin_unlock_irqrestore(&data->lock, flags);
+
+        /* We don't use pm_wq, because it's freezable. */
+        schedule_work(&data->work);
+
+        return IRQ_HANDLED;
+}
+
+/**
+ * pcie_pme_set_native - Set the PME interrupt flag for given device.
+ * @dev: PCI device to handle.
+ * @ign: Ignored.
+ */
+static int pcie_pme_set_native(struct pci_dev *dev, void *ign)
+{
+        dev_info(&dev->dev, "Signaling PME through PCIe PME interrupt\n");
+
+        device_set_run_wake(&dev->dev, true);
+        dev->pme_interrupt = true;
+        return 0;
+}
+
+/**
+ * pcie_pme_mark_devices - Set the PME interrupt flag for devices below a port.
+ * @port: PCIe root port or event collector to handle.
+ *
+ * For each device below given root port, including the port itself (or for each
+ * root complex integrated endpoint if @port is a root complex event collector)
+ * set the flag indicating that it can signal run-time wake-up events via PCIe
+ * PME interrupts.
+ */
+static void pcie_pme_mark_devices(struct pci_dev *port)
+{
+        pcie_pme_set_native(port, NULL);
+        if (port->subordinate) {
+                pci_walk_bus(port->subordinate, pcie_pme_set_native, NULL);
+        } else {
+                struct pci_bus *bus = port->bus;
+                struct pci_dev *dev;
+
+                /* Check if this is a root port event collector. */
+                if (port->pcie_type != PCI_EXP_TYPE_RC_EC || !bus)
+                        return;
+
+                down_read(&pci_bus_sem);
+                list_for_each_entry(dev, &bus->devices, bus_list)
+                        if (pci_is_pcie(dev)
+                            && dev->pcie_type == PCI_EXP_TYPE_RC_END)
+                                pcie_pme_set_native(dev, NULL);
+                up_read(&pci_bus_sem);
+        }
+}
+
+/**
+ * pcie_pme_probe - Initialize PCIe PME service for given root port.
+ * @srv: PCIe service to initialize.
+ */
+static int pcie_pme_probe(struct pcie_device *srv)
+{
+        struct pci_dev *port;
+        struct pcie_pme_service_data *data;
+        int ret;
+
+        if (!pcie_pme_platform_setup(srv))
+                return -EACCES;
+
+        data = kzalloc(sizeof(*data), GFP_KERNEL);
+        if (!data)
+                return -ENOMEM;
+
+        spin_lock_init(&data->lock);
+        INIT_WORK(&data->work, pcie_pme_work_fn);
+        data->srv = srv;
+        set_service_data(srv, data);
+
+        port = srv->port;
+        pcie_pme_interrupt_enable(port, false);
+        pcie_pme_clear_status(port);
+
+        ret = request_irq(srv->irq, pcie_pme_irq, IRQF_SHARED, "PCIe PME", srv);
+        if (ret) {
+                kfree(data);
+        } else {
+                pcie_pme_mark_devices(port);
+                pcie_pme_interrupt_enable(port, true);
+        }
+
+        return ret;
+}
+
+/**
+ * pcie_pme_suspend - Suspend PCIe PME service device.
+ * @srv: PCIe service device to suspend.
+ */
+static int pcie_pme_suspend(struct pcie_device *srv)
+{
+        struct pcie_pme_service_data *data = get_service_data(srv);
+        struct pci_dev *port = srv->port;
+
+        spin_lock_irq(&data->lock);
+        pcie_pme_interrupt_enable(port, false);
+        pcie_pme_clear_status(port);
+        data->noirq = true;
+        spin_unlock_irq(&data->lock);
+
+        synchronize_irq(srv->irq);
+
+        return 0;
+}
+
+/**
+ * pcie_pme_resume - Resume PCIe PME service device.
+ * @srv - PCIe service device to resume.
+ */
+static int pcie_pme_resume(struct pcie_device *srv)
+{
+        struct pcie_pme_service_data *data = get_service_data(srv);
+        struct pci_dev *port = srv->port;
+
+        spin_lock_irq(&data->lock);
+        data->noirq = false;
+        pcie_pme_clear_status(port);
+        pcie_pme_interrupt_enable(port, true);
+        spin_unlock_irq(&data->lock);
+
+        return 0;
+}
+
+/**
+ * pcie_pme_remove - Prepare PCIe PME service device for removal.
+ * @srv - PCIe service device to resume.
+ */
+static void pcie_pme_remove(struct pcie_device *srv)
+{
+        pcie_pme_suspend(srv);
+        free_irq(srv->irq, srv);
+        kfree(get_service_data(srv));
+}
+
+static struct pcie_port_service_driver pcie_pme_driver = {
+        .name           = "pcie_pme",
+        .port_type      = PCI_EXP_TYPE_ROOT_PORT,
+        .service        = PCIE_PORT_SERVICE_PME,
+
+        .probe          = pcie_pme_probe,
+        .suspend        = pcie_pme_suspend,
+        .resume         = pcie_pme_resume,
+        .remove         = pcie_pme_remove,
+};
+
+/**
+ * pcie_pme_service_init - Register the PCIe PME service driver.
+ */
+static int __init pcie_pme_service_init(void)
+{
+        return pcie_pme_disabled ?
+                -ENODEV : pcie_port_service_register(&pcie_pme_driver);
+}
+
+module_init(pcie_pme_service_init);
diff --git a/drivers/pci/pcie/pme/pcie_pme.h b/drivers/pci/pcie/pme/pcie_pme.h
new file mode 100644
index 000000000000..b30d2b7c9775
--- /dev/null
+++ b/drivers/pci/pcie/pme/pcie_pme.h
@@ -0,0 +1,28 @@
+/*
+ * drivers/pci/pcie/pme/pcie_pme.h
+ *
+ * PCI Express Root Port PME signaling support
+ *
+ * Copyright (C) 2009 Rafael J. Wysocki <rjw@sisk.pl>, Novell Inc.
+ */
+
+#ifndef _PCIE_PME_H_
+#define _PCIE_PME_H_
+
+struct pcie_device;
+
+#ifdef CONFIG_ACPI
+extern int pcie_pme_acpi_setup(struct pcie_device *srv);
+
+static inline int pcie_pme_platform_notify(struct pcie_device *srv)
+{
+        return pcie_pme_acpi_setup(srv);
+}
+#else /* !CONFIG_ACPI */
+static inline int pcie_pme_platform_notify(struct pcie_device *srv)
+{
+        return 0;
+}
+#endif /* !CONFIG_ACPI */
+
+#endif
diff --git a/drivers/pci/pcie/pme/pcie_pme_acpi.c b/drivers/pci/pcie/pme/pcie_pme_acpi.c
new file mode 100644
index 000000000000..83ab2287ae3f
--- /dev/null
+++ b/drivers/pci/pcie/pme/pcie_pme_acpi.c
@@ -0,0 +1,54 @@
+/*
+ * PCIe Native PME support, ACPI-related part
+ *
+ * Copyright (C) 2009 Rafael J. Wysocki <rjw@sisk.pl>, Novell Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License V2.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/acpi.h>
+#include <linux/pci-acpi.h>
+#include <linux/pcieport_if.h>
+
+/**
+ * pcie_pme_acpi_setup - Request the ACPI BIOS to release control over PCIe PME.
+ * @srv - PCIe PME service for a root port or event collector.
+ *
+ * Invoked when the PCIe bus type loads PCIe PME service driver.  To avoid
+ * conflict with the BIOS PCIe support requires the BIOS to yield PCIe PME
+ * control to the kernel.
+ */
+int pcie_pme_acpi_setup(struct pcie_device *srv)
+{
+        acpi_status status = AE_NOT_FOUND;
+        struct pci_dev *port = srv->port;
+        acpi_handle handle;
+        int error = 0;
+
+        if (acpi_pci_disabled)
+                return -ENOSYS;
+
+        dev_info(&port->dev, "Requesting control of PCIe PME from ACPI BIOS\n");
+
+        handle = acpi_find_root_bridge_handle(port);
+        if (!handle)
+                return -EINVAL;
+
+        status = acpi_pci_osc_control_set(handle,
+                        OSC_PCI_EXPRESS_PME_CONTROL |
+                        OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL);
+        if (ACPI_FAILURE(status)) {
+                dev_info(&port->dev,
+                        "Failed to receive control of PCIe PME service: %s\n",
+                        (status == AE_SUPPORT || status == AE_NOT_FOUND) ?
+                        "no _OSC support" : "ACPI _OSC failed");
+                error = -ENODEV;
+        }
+
+        return error;
+}
diff --git a/drivers/pci/pcie/portdrv.h b/drivers/pci/pcie/portdrv.h
index 17ad53868f9f..813a5c3427b6 100644
--- a/drivers/pci/pcie/portdrv.h
+++ b/drivers/pci/pcie/portdrv.h
@@ -11,31 +11,16 @@
 
 #include <linux/compiler.h>
 
-#if !defined(PCI_CAP_ID_PME)
-#define PCI_CAP_ID_PME                  1
-#endif
-
-#if !defined(PCI_CAP_ID_EXP)
-#define PCI_CAP_ID_EXP                  0x10
-#endif
-
-#define PORT_TYPE_MASK                  0xf
-#define PORT_TO_SLOT_MASK               0x100
-#define SLOT_HP_CAPABLE_MASK            0x40
-#define PCIE_CAPABILITIES_REG           0x2
-#define PCIE_SLOT_CAPABILITIES_REG      0x14
-#define PCIE_PORT_DEVICE_MAXSERVICES    4
-#define PCIE_PORT_MSI_VECTOR_MASK       0x1f
+#define PCIE_PORT_DEVICE_MAXSERVICES   4
 /*
- * According to the PCI Express Base Specification 2.0, the indices of the MSI-X
- * table entires used by port services must not exceed 31
+ * According to the PCI Express Base Specification 2.0, the indices of
+ * the MSI-X table entires used by port services must not exceed 31
  */
 #define PCIE_PORT_MAX_MSIX_ENTRIES      32
 
 #define get_descriptor_id(type, service) (((type - 4) << 4) | service)
 
 extern struct bus_type pcie_port_bus_type;
-extern int pcie_port_device_probe(struct pci_dev *dev);
 extern int pcie_port_device_register(struct pci_dev *dev);
 #ifdef CONFIG_PM
 extern int pcie_port_device_suspend(struct device *dev);
@@ -45,4 +30,21 @@ extern void pcie_port_device_remove(struct pci_dev *dev);
 extern int __must_check pcie_port_bus_register(void);
 extern void pcie_port_bus_unregister(void);
 
+#ifdef CONFIG_PCIE_PME
+extern bool pcie_pme_msi_disabled;
+
+static inline void pcie_pme_disable_msi(void)
+{
+        pcie_pme_msi_disabled = true;
+}
+
+static inline bool pcie_pme_no_msi(void)
+{
+        return pcie_pme_msi_disabled;
+}
+#else /* !CONFIG_PCIE_PME */
+static inline void pcie_pme_disable_msi(void) {}
+static inline bool pcie_pme_no_msi(void) { return false; }
+#endif /* !CONFIG_PCIE_PME */
+
 #endif /* _PORTDRV_H_ */
diff --git a/drivers/pci/pcie/portdrv_bus.c b/drivers/pci/pcie/portdrv_bus.c
index ef3a4eeaebb4..18bf90f748f6 100644
--- a/drivers/pci/pcie/portdrv_bus.c
+++ b/drivers/pci/pcie/portdrv_bus.c
@@ -26,7 +26,6 @@ EXPORT_SYMBOL_GPL(pcie_port_bus_type);
 static int pcie_port_bus_match(struct device *dev, struct device_driver *drv)
 {
         struct pcie_device *pciedev;
-        struct pcie_port_data *port_data;
         struct pcie_port_service_driver *driver;
 
         if (drv->bus != &pcie_port_bus_type || dev->bus != &pcie_port_bus_type)
@@ -38,10 +37,8 @@ static int pcie_port_bus_match(struct device *dev, struct device_driver *drv)
         if (driver->service != pciedev->service)
                 return 0;
 
-        port_data = pci_get_drvdata(pciedev->port);
-
-        if (driver->port_type != PCIE_ANY_PORT
-             && driver->port_type != port_data->port_type)
+        if ((driver->port_type != PCIE_ANY_PORT) &&
+            (driver->port_type != pciedev->port->pcie_type))
                 return 0;
 
         return 1;
diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c
index 52f84fca9f7d..e73effbe402c 100644
--- a/drivers/pci/pcie/portdrv_core.c
+++ b/drivers/pci/pcie/portdrv_core.c
@@ -27,7 +27,7 @@
  */
 static void release_pcie_device(struct device *dev)
 {
-        kfree(to_pcie_device(dev));                     
+        kfree(to_pcie_device(dev));
 }
 
 /**
@@ -108,9 +108,9 @@ static int pcie_port_enable_msix(struct pci_dev *dev, int *vectors, int mask)
                  * the value in this field indicates which MSI-X Table entry is
                  * used to generate the interrupt message."
                  */
-                pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
-                pci_read_config_word(dev, pos + PCIE_CAPABILITIES_REG, &reg16);
-                entry = (reg16 >> 9) & PCIE_PORT_MSI_VECTOR_MASK;
+                pos = pci_pcie_cap(dev);
+                pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &reg16);
+                entry = (reg16 & PCI_EXP_FLAGS_IRQ) >> 9;
                 if (entry >= nr_entries)
                         goto Error;
 
@@ -177,37 +177,48 @@ static int pcie_port_enable_msix(struct pci_dev *dev, int *vectors, int mask)
 }
 
 /**
- * assign_interrupt_mode - choose interrupt mode for PCI Express port services
- *                         (INTx, MSI-X, MSI) and set up vectors
+ * init_service_irqs - initialize irqs for PCI Express port services
  * @dev: PCI Express port to handle
- * @vectors: Array of interrupt vectors to populate
+ * @irqs: Array of irqs to populate
  * @mask: Bitmask of port capabilities returned by get_port_device_capability()
  *
  * Return value: Interrupt mode associated with the port
  */
-static int assign_interrupt_mode(struct pci_dev *dev, int *vectors, int mask)
+static int init_service_irqs(struct pci_dev *dev, int *irqs, int mask)
 {
-        int irq, interrupt_mode = PCIE_PORT_NO_IRQ;
-        int i;
+        int i, irq = -1;
+
+        /* We have to use INTx if MSI cannot be used for PCIe PME. */
+        if ((mask & PCIE_PORT_SERVICE_PME) && pcie_pme_no_msi()) {
+                if (dev->pin)
+                        irq = dev->irq;
+                goto no_msi;
+        }
 
         /* Try to use MSI-X if supported */
-        if (!pcie_port_enable_msix(dev, vectors, mask))
-                return PCIE_PORT_MSIX_MODE;
+        if (!pcie_port_enable_msix(dev, irqs, mask))
+                return 0;
 
         /* We're not going to use MSI-X, so try MSI and fall back to INTx */
-        if (!pci_enable_msi(dev))
-                interrupt_mode = PCIE_PORT_MSI_MODE;
-
-        if (interrupt_mode == PCIE_PORT_NO_IRQ && dev->pin)
-                interrupt_mode = PCIE_PORT_INTx_MODE;
+        if (!pci_enable_msi(dev) || dev->pin)
+                irq = dev->irq;
 
-        irq = interrupt_mode != PCIE_PORT_NO_IRQ ? dev->irq : -1;
+ no_msi:
         for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++)
-                vectors[i] = irq;
+                irqs[i] = irq;
+        irqs[PCIE_PORT_SERVICE_VC_SHIFT] = -1;
 
-        vectors[PCIE_PORT_SERVICE_VC_SHIFT] = -1;
+        if (irq < 0)
+                return -ENODEV;
+        return 0;
+}
 
-        return interrupt_mode;
+static void cleanup_service_irqs(struct pci_dev *dev)
+{
+        if (dev->msix_enabled)
+                pci_disable_msix(dev);
+        else if (dev->msi_enabled)
+                pci_disable_msi(dev);
 }
 
 /**
@@ -226,13 +237,12 @@ static int get_port_device_capability(struct pci_dev *dev)
         u16 reg16;
         u32 reg32;
 
-        pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
-        pci_read_config_word(dev, pos + PCIE_CAPABILITIES_REG, &reg16);
+        pos = pci_pcie_cap(dev);
+        pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &reg16);
         /* Hot-Plug Capable */
-        if (reg16 & PORT_TO_SLOT_MASK) {
-                pci_read_config_dword(dev, 
-                        pos + PCIE_SLOT_CAPABILITIES_REG, &reg32);
-                if (reg32 & SLOT_HP_CAPABLE_MASK)
+        if (reg16 & PCI_EXP_FLAGS_SLOT) {
+                pci_read_config_dword(dev, pos + PCI_EXP_SLTCAP, &reg32);
+                if (reg32 & PCI_EXP_SLTCAP_HPC)
                         services |= PCIE_PORT_SERVICE_HP;
         }
         /* AER capable */
@@ -241,80 +251,48 @@ static int get_port_device_capability(struct pci_dev *dev)
         /* VC support */
         if (pci_find_ext_capability(dev, PCI_EXT_CAP_ID_VC))
                 services |= PCIE_PORT_SERVICE_VC;
+        /* Root ports are capable of generating PME too */
+        if (dev->pcie_type == PCI_EXP_TYPE_ROOT_PORT)
+                services |= PCIE_PORT_SERVICE_PME;
 
         return services;
 }
 
 /**
- * pcie_device_init - initialize PCI Express port service device
- * @dev: Port service device to initialize
- * @parent: PCI Express port to associate the service device with
- * @port_type: Type of the port
- * @service_type: Type of service to associate with the service device
+ * pcie_device_init - allocate and initialize PCI Express port service device
+ * @pdev: PCI Express port to associate the service device with
+ * @service: Type of service to associate with the service device
  * @irq: Interrupt vector to associate with the service device
  */
-static void pcie_device_init(struct pci_dev *parent, struct pcie_device *dev, 
-        int service_type, int irq)
+static int pcie_device_init(struct pci_dev *pdev, int service, int irq)
 {
-        struct pcie_port_data *port_data = pci_get_drvdata(parent);
+        int retval;
+        struct pcie_device *pcie;
         struct device *device;
-        int port_type = port_data->port_type;
 
-        dev->port = parent;
-        dev->irq = irq;
-        dev->service = service_type;
+        pcie = kzalloc(sizeof(*pcie), GFP_KERNEL);
+        if (!pcie)
+                return -ENOMEM;
+        pcie->port = pdev;
+        pcie->irq = irq;
+        pcie->service = service;
 
         /* Initialize generic device interface */
-        device = &dev->device;
-        memset(device, 0, sizeof(struct device));
+        device = &pcie->device;
         device->bus = &pcie_port_bus_type;
-        device->driver = NULL;
-        dev_set_drvdata(device, NULL);
         device->release = release_pcie_device;  /* callback to free pcie dev */
         dev_set_name(device, "%s:pcie%02x",
-                 pci_name(parent), get_descriptor_id(port_type, service_type));
-        device->parent = &parent->dev;
-}
-
-/**
- * alloc_pcie_device - allocate PCI Express port service device structure
- * @parent: PCI Express port to associate the service device with
- * @port_type: Type of the port
- * @service_type: Type of service to associate with the service device
- * @irq: Interrupt vector to associate with the service device
- */
-static struct pcie_device* alloc_pcie_device(struct pci_dev *parent,
-        int service_type, int irq)
-{
-        struct pcie_device *device;
-
-        device = kzalloc(sizeof(struct pcie_device), GFP_KERNEL);
-        if (!device)
-                return NULL;
-
-        pcie_device_init(parent, device, service_type, irq);
-        return device;
-}
-
-/**
- * pcie_port_device_probe - check if device is a PCI Express port
- * @dev: Device to check
- */
-int pcie_port_device_probe(struct pci_dev *dev)
-{
-        int pos, type;
-        u16 reg;
-
-        if (!(pos = pci_find_capability(dev, PCI_CAP_ID_EXP)))
-                return -ENODEV;
-
-        pci_read_config_word(dev, pos + PCIE_CAPABILITIES_REG, &reg);
-        type = (reg >> 4) & PORT_TYPE_MASK;
-        if (    type == PCIE_RC_PORT || type == PCIE_SW_UPSTREAM_PORT ||
-                type == PCIE_SW_DOWNSTREAM_PORT )
-                return 0;
-
-        return -ENODEV;
+                     pci_name(pdev),
+                     get_descriptor_id(pdev->pcie_type, service));
+        device->parent = &pdev->dev;
+        device_enable_async_suspend(device);
+
+        retval = device_register(device);
+        if (retval)
+                kfree(pcie);
+        else
+                get_device(device);
+        return retval;
 }
 
 /**
@@ -326,77 +304,49 @@ int pcie_port_device_probe(struct pci_dev *dev)
  */
 int pcie_port_device_register(struct pci_dev *dev)
 {
-        struct pcie_port_data *port_data;
-        int status, capabilities, irq_mode, i, nr_serv;
-        int vectors[PCIE_PORT_DEVICE_MAXSERVICES];
-        u16 reg16;
-
-        port_data = kzalloc(sizeof(*port_data), GFP_KERNEL);
-        if (!port_data)
-                return -ENOMEM;
-        pci_set_drvdata(dev, port_data);
-
-        /* Get port type */
-        pci_read_config_word(dev,
-                pci_find_capability(dev, PCI_CAP_ID_EXP) +
-                PCIE_CAPABILITIES_REG, &reg16);
-        port_data->port_type = (reg16 >> 4) & PORT_TYPE_MASK;
+        int status, capabilities, i, nr_service;
+        int irqs[PCIE_PORT_DEVICE_MAXSERVICES];
 
+        /* Get and check PCI Express port services */
         capabilities = get_port_device_capability(dev);
-        /* Root ports are capable of generating PME too */
-        if (port_data->port_type == PCIE_RC_PORT)
-                capabilities |= PCIE_PORT_SERVICE_PME;
-
-        irq_mode = assign_interrupt_mode(dev, vectors, capabilities);
-        if (irq_mode == PCIE_PORT_NO_IRQ) {
-                /*
-                 * Don't use service devices that require interrupts if there is
-                 * no way to generate them.
-                 */
-                if (!(capabilities & PCIE_PORT_SERVICE_VC)) {
-                        status = -ENODEV;
-                        goto Error;
-                }
-                capabilities = PCIE_PORT_SERVICE_VC;
-        }
-        port_data->port_irq_mode = irq_mode;
+        if (!capabilities)
+                return -ENODEV;
 
+        /* Enable PCI Express port device */
         status = pci_enable_device(dev);
         if (status)
-                goto Error;
+                return status;
         pci_set_master(dev);
+        /*
+         * Initialize service irqs. Don't use service devices that
+         * require interrupts if there is no way to generate them.
+         */
+        status = init_service_irqs(dev, irqs, capabilities);
+        if (status) {
+                capabilities &= PCIE_PORT_SERVICE_VC;
+                if (!capabilities)
+                        goto error_disable;
+        }
 
         /* Allocate child services if any */
-        for (i = 0, nr_serv = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++) {
-                struct pcie_device *child;
+        status = -ENODEV;
+        nr_service = 0;
+        for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++) {
                 int service = 1 << i;
-
                 if (!(capabilities & service))
                         continue;
-
-                child = alloc_pcie_device(dev, service, vectors[i]);
-                if (!child)
-                        continue;
-
-                status = device_register(&child->device);
-                if (status) {
-                        kfree(child);
-                        continue;
-                }
-
-                get_device(&child->device);
-                nr_serv++;
-        }
-        if (!nr_serv) {
-                pci_disable_device(dev);
-                status = -ENODEV;
-                goto Error;
+                if (!pcie_device_init(dev, service, irqs[i]))
+                        nr_service++;
         }
+        if (!nr_service)
+                goto error_cleanup_irqs;
 
         return 0;
 
- Error:
-        kfree(port_data);
+error_cleanup_irqs:
+        cleanup_service_irqs(dev);
+error_disable:
+        pci_disable_device(dev);
         return status;
 }
 
@@ -405,12 +355,11 @@ static int suspend_iter(struct device *dev, void *data)
 {
         struct pcie_port_service_driver *service_driver;
 
-        if ((dev->bus == &pcie_port_bus_type) &&
-            (dev->driver)) {
-                service_driver = to_service_driver(dev->driver);
-                if (service_driver->suspend)
-                        service_driver->suspend(to_pcie_device(dev));
-        }
+        if ((dev->bus == &pcie_port_bus_type) && dev->driver) {
+                service_driver = to_service_driver(dev->driver);
+                if (service_driver->suspend)
+                        service_driver->suspend(to_pcie_device(dev));
+        }
         return 0;
 }
 
@@ -464,21 +413,9 @@ static int remove_iter(struct device *dev, void *data)
  */
 void pcie_port_device_remove(struct pci_dev *dev)
 {
-        struct pcie_port_data *port_data = pci_get_drvdata(dev);
-
         device_for_each_child(&dev->dev, NULL, remove_iter);
+        cleanup_service_irqs(dev);
         pci_disable_device(dev);
-
-        switch (port_data->port_irq_mode) {
-        case PCIE_PORT_MSIX_MODE:
-                pci_disable_msix(dev);
-                break;
-        case PCIE_PORT_MSI_MODE:
-                pci_disable_msi(dev);
-                break;
-        }
-
-        kfree(port_data);
 }
 
 /**
@@ -565,6 +502,7 @@ int pcie_port_service_register(struct pcie_port_service_driver *new)
 
         return driver_register(&new->driver);
 }
+EXPORT_SYMBOL(pcie_port_service_register);
 
 /**
  * pcie_port_service_unregister - unregister PCI Express port service driver
@@ -574,6 +512,4 @@ void pcie_port_service_unregister(struct pcie_port_service_driver *drv)
 {
         driver_unregister(&drv->driver);
 }
-
-EXPORT_SYMBOL(pcie_port_service_register);
 EXPORT_SYMBOL(pcie_port_service_unregister);
diff --git a/drivers/pci/pcie/portdrv_pci.c b/drivers/pci/pcie/portdrv_pci.c
index f635e476d632..3debed25e46b 100644
--- a/drivers/pci/pcie/portdrv_pci.c
+++ b/drivers/pci/pcie/portdrv_pci.c
@@ -12,9 +12,9 @@
 #include <linux/errno.h>
 #include <linux/pm.h>
 #include <linux/init.h>
-#include <linux/slab.h>
 #include <linux/pcieport_if.h>
 #include <linux/aer.h>
+#include <linux/dmi.h>
 
 #include "portdrv.h"
 #include "aer/aerdrv.h"
@@ -24,7 +24,7 @@
  */
 #define DRIVER_VERSION "v1.0"
 #define DRIVER_AUTHOR "tom.l.nguyen@intel.com"
-#define DRIVER_DESC "PCIE Port Bus Driver"
+#define DRIVER_DESC "PCIe Port Bus Driver"
 MODULE_AUTHOR(DRIVER_AUTHOR);
 MODULE_DESCRIPTION(DRIVER_DESC);
 MODULE_LICENSE("GPL");
@@ -43,7 +43,7 @@ static int pcie_portdrv_restore_config(struct pci_dev *dev)
 }
 
 #ifdef CONFIG_PM
-static struct dev_pm_ops pcie_portdrv_pm_ops = {
+static const struct dev_pm_ops pcie_portdrv_pm_ops = {
         .suspend        = pcie_port_device_suspend,
         .resume         = pcie_port_device_resume,
         .freeze         = pcie_port_device_suspend,
@@ -63,20 +63,22 @@ static struct dev_pm_ops pcie_portdrv_pm_ops = {
  * pcie_portdrv_probe - Probe PCI-Express port devices
  * @dev: PCI-Express port device being probed
  *
- * If detected invokes the pcie_port_device_register() method for 
+ * If detected invokes the pcie_port_device_register() method for
  * this port device.
  *
  */
-static int __devinit pcie_portdrv_probe (struct pci_dev *dev, 
-                                const struct pci_device_id *id )
+static int __devinit pcie_portdrv_probe(struct pci_dev *dev,
+                                        const struct pci_device_id *id)
 {
-        int                     status;
+        int status;
 
-        status = pcie_port_device_probe(dev);
-        if (status)
-                return status;
+        if (!pci_is_pcie(dev) ||
+            ((dev->pcie_type != PCI_EXP_TYPE_ROOT_PORT) &&
+             (dev->pcie_type != PCI_EXP_TYPE_UPSTREAM) &&
+             (dev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM)))
+                return -ENODEV;
 
-        if (!dev->irq && dev->pin) {
+        if (!dev->irq && dev->pin) {
                 dev_warn(&dev->dev, "device [%04x:%04x] has invalid IRQ; "
                          "check vendor BIOS\n", dev->vendor, dev->device);
         }
@@ -89,7 +91,7 @@ static int __devinit pcie_portdrv_probe (struct pci_dev *dev,
         return 0;
 }
 
-static void pcie_portdrv_remove (struct pci_dev *dev)
+static void pcie_portdrv_remove(struct pci_dev *dev)
 {
         pcie_port_device_remove(dev);
         pci_disable_device(dev);
@@ -127,14 +129,13 @@ static int error_detected_iter(struct device *device, void *data)
 static pci_ers_result_t pcie_portdrv_error_detected(struct pci_dev *dev,
                                         enum pci_channel_state error)
 {
-        struct aer_broadcast_data result_data =
-                        {error, PCI_ERS_RESULT_CAN_RECOVER};
-        int retval;
+        struct aer_broadcast_data data = {error, PCI_ERS_RESULT_CAN_RECOVER};
+        int ret;
 
         /* can not fail */
-        retval = device_for_each_child(&dev->dev, &result_data, error_detected_iter);
+        ret = device_for_each_child(&dev->dev, &data, error_detected_iter);
 
-        return result_data.result;
+        return data.result;
 }
 
 static int mmio_enabled_iter(struct device *device, void *data)
@@ -272,10 +273,36 @@ static struct pci_driver pcie_portdriver = {
         .driver.pm      = PCIE_PORTDRV_PM_OPS,
 };
 
+static int __init dmi_pcie_pme_disable_msi(const struct dmi_system_id *d)
+{
+        pr_notice("%s detected: will not use MSI for PCIe PME signaling\n",
+                        d->ident);
+        pcie_pme_disable_msi();
+        return 0;
+}
+
+static struct dmi_system_id __initdata pcie_portdrv_dmi_table[] = {
+        /*
+         * Boxes that should not use MSI for PCIe PME signaling.
+         */
+        {
+         .callback = dmi_pcie_pme_disable_msi,
+         .ident = "MSI Wind U-100",
+         .matches = {
+                     DMI_MATCH(DMI_SYS_VENDOR,
+                                "MICRO-STAR INTERNATIONAL CO., LTD"),
+                     DMI_MATCH(DMI_PRODUCT_NAME, "U-100"),
+                     },
+         },
+         {}
+};
+
 static int __init pcie_portdrv_init(void)
 {
         int retval;
 
+        dmi_check_system(pcie_portdrv_dmi_table);
+
         retval = pcie_port_bus_register();
         if (retval) {
                 printk(KERN_WARNING "PCIE: bus_register error: %d\n", retval);
@@ -288,7 +315,7 @@ static int __init pcie_portdrv_init(void)
         return retval;
 }
 
-static void __exit pcie_portdrv_exit(void) 
+static void __exit pcie_portdrv_exit(void)
 {
         pci_unregister_driver(&pcie_portdriver);
         pcie_port_bus_unregister();
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 8105e32117f6..c82548afcd5c 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -10,6 +10,7 @@
 #include <linux/module.h>
 #include <linux/cpumask.h>
 #include <linux/pci-aspm.h>
+#include <acpi/acpi_hest.h>
 #include "pci.h"
 
 #define CARDBUS_LATENCY_TIMER   176     /* secondary latency timer */
@@ -88,6 +89,7 @@ static void release_pcibus_dev(struct device *dev)
 
         if (pci_bus->bridge)
                 put_device(pci_bus->bridge);
+        pci_bus_remove_resources(pci_bus);
         kfree(pci_bus);
 }
 
@@ -163,12 +165,12 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
 {
         u32 l, sz, mask;
 
-        mask = type ? ~PCI_ROM_ADDRESS_ENABLE : ~0;
+        mask = type ? PCI_ROM_ADDRESS_MASK : ~0;
 
         res->name = pci_name(dev);
 
         pci_read_config_dword(dev, pos, &l);
-        pci_write_config_dword(dev, pos, mask);
+        pci_write_config_dword(dev, pos, l | mask);
         pci_read_config_dword(dev, pos, &sz);
         pci_write_config_dword(dev, pos, l);
 
@@ -223,9 +225,13 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
                         goto fail;
 
                 if ((sizeof(resource_size_t) < 8) && (sz64 > 0x100000000ULL)) {
-                        dev_err(&dev->dev, "can't handle 64-bit BAR\n");
+                        dev_err(&dev->dev, "reg %x: can't handle 64-bit BAR\n",
+                                pos);
                         goto fail;
-                } else if ((sizeof(resource_size_t) < 8) && l) {
+                }
+
+                res->flags |= IORESOURCE_MEM_64;
+                if ((sizeof(resource_size_t) < 8) && l) {
                         /* Address above 32-bit boundary; disable the BAR */
                         pci_write_config_dword(dev, pos, 0);
                         pci_write_config_dword(dev, pos + 4, 0);
@@ -234,14 +240,9 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
                 } else {
                         res->start = l64;
                         res->end = l64 + sz64;
-                        dev_printk(KERN_DEBUG, &dev->dev,
-                                "reg %x %s: %pR\n", pos,
-                                 (res->flags & IORESOURCE_PREFETCH) ?
-                                        "64bit mmio pref" : "64bit mmio",
-                                 res);
+                        dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pR\n",
+                                   pos, res);
                 }
-
-                res->flags |= IORESOURCE_MEM_64;
         } else {
                 sz = pci_size(l, sz, mask);
 
@@ -251,11 +252,7 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
                 res->start = l;
                 res->end = l + sz;
 
-                dev_printk(KERN_DEBUG, &dev->dev, "reg %x %s: %pR\n", pos,
-                        (res->flags & IORESOURCE_IO) ? "io port" :
-                         ((res->flags & IORESOURCE_PREFETCH) ?
-                                 "32bit mmio pref" : "32bit mmio"),
-                        res);
+                dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pR\n", pos, res);
         }
 
  out:
@@ -285,23 +282,12 @@ static void pci_read_bases(struct pci_dev *dev, unsigned int howmany, int rom)
         }
 }
 
-void __devinit pci_read_bridge_bases(struct pci_bus *child)
+static void __devinit pci_read_bridge_io(struct pci_bus *child)
 {
         struct pci_dev *dev = child->self;
         u8 io_base_lo, io_limit_lo;
-        u16 mem_base_lo, mem_limit_lo;
         unsigned long base, limit;
         struct resource *res;
-        int i;
-
-        if (pci_is_root_bus(child))     /* It's a host bus, nothing to read */
-                return;
-
-        if (dev->transparent) {
-                dev_info(&dev->dev, "transparent bridge\n");
-                for(i = 3; i < PCI_BUS_NUM_RESOURCES; i++)
-                        child->resource[i] = child->parent->resource[i - 3];
-        }
 
         res = child->resource[0];
         pci_read_config_byte(dev, PCI_IO_BASE, &io_base_lo);
@@ -317,27 +303,50 @@ void __devinit pci_read_bridge_bases(struct pci_bus *child)
                 limit |= (io_limit_hi << 16);
         }
 
-        if (base <= limit) {
+        if (base && base <= limit) {
                 res->flags = (io_base_lo & PCI_IO_RANGE_TYPE_MASK) | IORESOURCE_IO;
                 if (!res->start)
                         res->start = base;
                 if (!res->end)
                         res->end = limit + 0xfff;
-                dev_printk(KERN_DEBUG, &dev->dev, "bridge io port: %pR\n", res);
+                dev_printk(KERN_DEBUG, &dev->dev, "  bridge window %pR\n", res);
+        } else {
+                dev_printk(KERN_DEBUG, &dev->dev,
+                         "  bridge window [io  %#06lx-%#06lx] (disabled)\n",
+                                 base, limit);
         }
+}
+
+static void __devinit pci_read_bridge_mmio(struct pci_bus *child)
+{
+        struct pci_dev *dev = child->self;
+        u16 mem_base_lo, mem_limit_lo;
+        unsigned long base, limit;
+        struct resource *res;
 
         res = child->resource[1];
         pci_read_config_word(dev, PCI_MEMORY_BASE, &mem_base_lo);
         pci_read_config_word(dev, PCI_MEMORY_LIMIT, &mem_limit_lo);
         base = (mem_base_lo & PCI_MEMORY_RANGE_MASK) << 16;
         limit = (mem_limit_lo & PCI_MEMORY_RANGE_MASK) << 16;
-        if (base <= limit) {
+        if (base && base <= limit) {
                 res->flags = (mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) | IORESOURCE_MEM;
                 res->start = base;
                 res->end = limit + 0xfffff;
-                dev_printk(KERN_DEBUG, &dev->dev, "bridge 32bit mmio: %pR\n",
-                        res);
+                dev_printk(KERN_DEBUG, &dev->dev, "  bridge window %pR\n", res);
+        } else {
+                dev_printk(KERN_DEBUG, &dev->dev,
+                        "  bridge window [mem %#010lx-%#010lx] (disabled)\n",
+                                         base, limit + 0xfffff);
         }
+}
+
+static void __devinit pci_read_bridge_mmio_pref(struct pci_bus *child)
+{
+        struct pci_dev *dev = child->self;
+        u16 mem_base_lo, mem_limit_lo;
+        unsigned long base, limit;
+        struct resource *res;
 
         res = child->resource[2];
         pci_read_config_word(dev, PCI_PREF_MEMORY_BASE, &mem_base_lo);
@@ -368,16 +377,52 @@ void __devinit pci_read_bridge_bases(struct pci_bus *child)
 #endif
                 }
         }
-        if (base <= limit) {
+        if (base && base <= limit) {
                 res->flags = (mem_base_lo & PCI_PREF_RANGE_TYPE_MASK) |
                                          IORESOURCE_MEM | IORESOURCE_PREFETCH;
                 if (res->flags & PCI_PREF_RANGE_TYPE_64)
                         res->flags |= IORESOURCE_MEM_64;
                 res->start = base;
                 res->end = limit + 0xfffff;
-                dev_printk(KERN_DEBUG, &dev->dev, "bridge %sbit mmio pref: %pR\n",
-                        (res->flags & PCI_PREF_RANGE_TYPE_64) ? "64" : "32",
-                        res);
+                dev_printk(KERN_DEBUG, &dev->dev, "  bridge window %pR\n", res);
+        } else {
+                dev_printk(KERN_DEBUG, &dev->dev,
+                     "  bridge window [mem %#010lx-%#010lx pref] (disabled)\n",
+                                         base, limit + 0xfffff);
+        }
+}
+
+void __devinit pci_read_bridge_bases(struct pci_bus *child)
+{
+        struct pci_dev *dev = child->self;
+        struct resource *res;
+        int i;
+
+        if (pci_is_root_bus(child))     /* It's a host bus, nothing to read */
+                return;
+
+        dev_info(&dev->dev, "PCI bridge to [bus %02x-%02x]%s\n",
+                 child->secondary, child->subordinate,
+                 dev->transparent ? " (subtractive decode)" : "");
+
+        pci_bus_remove_resources(child);
+        for (i = 0; i < PCI_BRIDGE_RESOURCE_NUM; i++)
+                child->resource[i] = &dev->resource[PCI_BRIDGE_RESOURCES+i];
+
+        pci_read_bridge_io(child);
+        pci_read_bridge_mmio(child);
+        pci_read_bridge_mmio_pref(child);
+
+        if (dev->transparent) {
+                pci_bus_for_each_resource(child->parent, res, i) {
+                        if (res) {
+                                pci_bus_add_resource(child, res,
+                                                     PCI_SUBTRACTIVE_DECODE);
+                                dev_printk(KERN_DEBUG, &dev->dev,
+                                           "  bridge window %pR (subtractive decode)\n",
+                                           res);
+                        }
+                }
         }
 }
 
@@ -391,10 +436,147 @@ static struct pci_bus * pci_alloc_bus(void)
                 INIT_LIST_HEAD(&b->children);
                 INIT_LIST_HEAD(&b->devices);
                 INIT_LIST_HEAD(&b->slots);
+                INIT_LIST_HEAD(&b->resources);
+                b->max_bus_speed = PCI_SPEED_UNKNOWN;
+                b->cur_bus_speed = PCI_SPEED_UNKNOWN;
         }
         return b;
 }
 
+static unsigned char pcix_bus_speed[] = {
+        PCI_SPEED_UNKNOWN,              /* 0 */
+        PCI_SPEED_66MHz_PCIX,           /* 1 */
+        PCI_SPEED_100MHz_PCIX,          /* 2 */
+        PCI_SPEED_133MHz_PCIX,          /* 3 */
+        PCI_SPEED_UNKNOWN,              /* 4 */
+        PCI_SPEED_66MHz_PCIX_ECC,       /* 5 */
+        PCI_SPEED_100MHz_PCIX_ECC,      /* 6 */
+        PCI_SPEED_133MHz_PCIX_ECC,      /* 7 */
+        PCI_SPEED_UNKNOWN,              /* 8 */
+        PCI_SPEED_66MHz_PCIX_266,       /* 9 */
+        PCI_SPEED_100MHz_PCIX_266,      /* A */
+        PCI_SPEED_133MHz_PCIX_266,      /* B */
+        PCI_SPEED_UNKNOWN,              /* C */
+        PCI_SPEED_66MHz_PCIX_533,       /* D */
+        PCI_SPEED_100MHz_PCIX_533,      /* E */
+        PCI_SPEED_133MHz_PCIX_533       /* F */
+};
+
+static unsigned char pcie_link_speed[] = {
+        PCI_SPEED_UNKNOWN,              /* 0 */
+        PCIE_SPEED_2_5GT,               /* 1 */
+        PCIE_SPEED_5_0GT,               /* 2 */
+        PCIE_SPEED_8_0GT,               /* 3 */
+        PCI_SPEED_UNKNOWN,              /* 4 */
+        PCI_SPEED_UNKNOWN,              /* 5 */
+        PCI_SPEED_UNKNOWN,              /* 6 */
+        PCI_SPEED_UNKNOWN,              /* 7 */
+        PCI_SPEED_UNKNOWN,              /* 8 */
+        PCI_SPEED_UNKNOWN,              /* 9 */
+        PCI_SPEED_UNKNOWN,              /* A */
+        PCI_SPEED_UNKNOWN,              /* B */
+        PCI_SPEED_UNKNOWN,              /* C */
+        PCI_SPEED_UNKNOWN,              /* D */
+        PCI_SPEED_UNKNOWN,              /* E */
+        PCI_SPEED_UNKNOWN               /* F */
+};
+
+void pcie_update_link_speed(struct pci_bus *bus, u16 linksta)
+{
+        bus->cur_bus_speed = pcie_link_speed[linksta & 0xf];
+}
+EXPORT_SYMBOL_GPL(pcie_update_link_speed);
+
+static unsigned char agp_speeds[] = {
+        AGP_UNKNOWN,
+        AGP_1X,
+        AGP_2X,
+        AGP_4X,
+        AGP_8X
+};
+
+static enum pci_bus_speed agp_speed(int agp3, int agpstat)
+{
+        int index = 0;
+
+        if (agpstat & 4)
+                index = 3;
+        else if (agpstat & 2)
+                index = 2;
+        else if (agpstat & 1)
+                index = 1;
+        else
+                goto out;
+        
+        if (agp3) {
+                index += 2;
+                if (index == 5)
+                        index = 0;
+        }
+
+ out:
+        return agp_speeds[index];
+}
+
+
+static void pci_set_bus_speed(struct pci_bus *bus)
+{
+        struct pci_dev *bridge = bus->self;
+        int pos;
+
+        pos = pci_find_capability(bridge, PCI_CAP_ID_AGP);
+        if (!pos)
+                pos = pci_find_capability(bridge, PCI_CAP_ID_AGP3);
+        if (pos) {
+                u32 agpstat, agpcmd;
+
+                pci_read_config_dword(bridge, pos + PCI_AGP_STATUS, &agpstat);
+                bus->max_bus_speed = agp_speed(agpstat & 8, agpstat & 7);
+
+                pci_read_config_dword(bridge, pos + PCI_AGP_COMMAND, &agpcmd);
+                bus->cur_bus_speed = agp_speed(agpstat & 8, agpcmd & 7);
+        }
+
+        pos = pci_find_capability(bridge, PCI_CAP_ID_PCIX);
+        if (pos) {
+                u16 status;
+                enum pci_bus_speed max;
+                pci_read_config_word(bridge, pos + 2, &status);
+
+                if (status & 0x8000) {
+                        max = PCI_SPEED_133MHz_PCIX_533;
+                } else if (status & 0x4000) {
+                        max = PCI_SPEED_133MHz_PCIX_266;
+                } else if (status & 0x0002) {
+                        if (((status >> 12) & 0x3) == 2) {
+                                max = PCI_SPEED_133MHz_PCIX_ECC;
+                        } else {
+                                max = PCI_SPEED_133MHz_PCIX;
+                        }
+                } else {
+                        max = PCI_SPEED_66MHz_PCIX;
+                }
+
+                bus->max_bus_speed = max;
+                bus->cur_bus_speed = pcix_bus_speed[(status >> 6) & 0xf];
+
+                return;
+        }
+
+        pos = pci_find_capability(bridge, PCI_CAP_ID_EXP);
+        if (pos) {
+                u32 linkcap;
+                u16 linksta;
+
+                pci_read_config_dword(bridge, pos + PCI_EXP_LNKCAP, &linkcap);
+                bus->max_bus_speed = pcie_link_speed[linkcap & 0xf];
+
+                pci_read_config_word(bridge, pos + PCI_EXP_LNKSTA, &linksta);
+                pcie_update_link_speed(bus, linksta);
+        }
+}
+
+
 static struct pci_bus *pci_alloc_child_bus(struct pci_bus *parent,
                                            struct pci_dev *bridge, int busnr)
 {
@@ -434,6 +616,8 @@ static struct pci_bus *pci_alloc_child_bus(struct pci_bus *parent,
         child->self = bridge;
         child->bridge = get_device(&bridge->dev);
 
+        pci_set_bus_speed(child);
+
         /* Set up default resource pointers and names.. */
         for (i = 0; i < PCI_BRIDGE_RESOURCE_NUM; i++) {
                 child->resource[i] = &bridge->resource[PCI_BRIDGE_RESOURCES+i];
@@ -489,16 +673,20 @@ int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
         int is_cardbus = (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS);
         u32 buses, i, j = 0;
         u16 bctl;
+        u8 primary, secondary, subordinate;
         int broken = 0;
 
         pci_read_config_dword(dev, PCI_PRIMARY_BUS, &buses);
+        primary = buses & 0xFF;
+        secondary = (buses >> 8) & 0xFF;
+        subordinate = (buses >> 16) & 0xFF;
 
-        dev_dbg(&dev->dev, "scanning behind bridge, config %06x, pass %d\n",
-                buses & 0xffffff, pass);
+        dev_dbg(&dev->dev, "scanning [bus %02x-%02x] behind bridge, pass %d\n",
+                secondary, subordinate, pass);
 
         /* Check if setup is sensible at all */
         if (!pass &&
-            ((buses & 0xff) != bus->number || ((buses >> 8) & 0xff) <= bus->number)) {
+            (primary != bus->number || secondary <= bus->number)) {
                 dev_dbg(&dev->dev, "bus configuration invalid, reconfiguring\n");
                 broken = 1;
         }
@@ -509,15 +697,15 @@ int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
         pci_write_config_word(dev, PCI_BRIDGE_CONTROL,
                               bctl & ~PCI_BRIDGE_CTL_MASTER_ABORT);
 
-        if ((buses & 0xffff00) && !pcibios_assign_all_busses() && !is_cardbus && !broken) {
-                unsigned int cmax, busnr;
+        if ((secondary || subordinate) && !pcibios_assign_all_busses() &&
+            !is_cardbus && !broken) {
+                unsigned int cmax;
                 /*
                  * Bus already configured by firmware, process it in the first
                  * pass and just note the configuration.
                  */
                 if (pass)
                         goto out;
-                busnr = (buses >> 8) & 0xFF;
 
                 /*
                  * If we already got to this bus through a different bridge,
@@ -526,13 +714,13 @@ int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
                  * However, we continue to descend down the hierarchy and
                  * scan remaining child buses.
                  */
-                child = pci_find_bus(pci_domain_nr(bus), busnr);
+                child = pci_find_bus(pci_domain_nr(bus), secondary);
                 if (!child) {
-                        child = pci_add_new_bus(bus, dev, busnr);
+                        child = pci_add_new_bus(bus, dev, secondary);
                         if (!child)
                                 goto out;
-                        child->primary = buses & 0xFF;
-                        child->subordinate = (buses >> 16) & 0xFF;
+                        child->primary = primary;
+                        child->subordinate = subordinate;
                         child->bridge_ctl = bctl;
                 }
 
@@ -651,13 +839,14 @@ int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
                     (child->number > bus->subordinate) ||
                     (child->number < bus->number) ||
                     (child->subordinate < bus->number)) {
-                        pr_debug("PCI: Bus #%02x (-#%02x) is %s "
-                                "hidden behind%s bridge #%02x (-#%02x)\n",
+                        dev_info(&child->dev, "[bus %02x-%02x] %s "
+                                "hidden behind%s bridge %s [bus %02x-%02x]\n",
                                 child->number, child->subordinate,
                                 (bus->number > child->subordinate &&
                                  bus->subordinate < child->number) ?
                                         "wholly" : "partially",
                                 bus->self->transparent ? " transparent" : "",
+                                dev_name(&bus->dev),
                                 bus->number, bus->subordinate);
                 }
                 bus = bus->parent;
@@ -684,7 +873,7 @@ static void pci_read_irq(struct pci_dev *dev)
         dev->irq = irq;
 }
 
-static void set_pcie_port_type(struct pci_dev *pdev)
+void set_pcie_port_type(struct pci_dev *pdev)
 {
         int pos;
         u16 reg16;
@@ -693,17 +882,18 @@ static void set_pcie_port_type(struct pci_dev *pdev)
         if (!pos)
                 return;
         pdev->is_pcie = 1;
+        pdev->pcie_cap = pos;
         pci_read_config_word(pdev, pos + PCI_EXP_FLAGS, &reg16);
         pdev->pcie_type = (reg16 & PCI_EXP_FLAGS_TYPE) >> 4;
 }
 
-static void set_pcie_hotplug_bridge(struct pci_dev *pdev)
+void set_pcie_hotplug_bridge(struct pci_dev *pdev)
 {
         int pos;
         u16 reg16;
         u32 reg32;
 
-        pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
+        pos = pci_pcie_cap(pdev);
         if (!pos)
                 return;
         pci_read_config_word(pdev, pos + PCI_EXP_FLAGS, &reg16);
@@ -714,6 +904,12 @@ static void set_pcie_hotplug_bridge(struct pci_dev *pdev)
                 pdev->is_hotplug_bridge = 1;
 }
 
+static void set_pci_aer_firmware_first(struct pci_dev *pdev)
+{
+        if (acpi_hest_firmware_first_pci(pdev))
+                pdev->aer_firmware_first = 1;
+}
+
 #define LEGACY_IO_RESOURCE      (IORESOURCE_IO | IORESOURCE_PCI_FIXED)
 
 /**
@@ -731,6 +927,7 @@ int pci_setup_device(struct pci_dev *dev)
         u32 class;
         u8 hdr_type;
         struct pci_slot *slot;
+        int pos = 0;
 
         if (pci_read_config_byte(dev, PCI_HEADER_TYPE, &hdr_type))
                 return -EIO;
@@ -742,6 +939,7 @@ int pci_setup_device(struct pci_dev *dev)
         dev->multifunction = !!(hdr_type & 0x80);
         dev->error_state = pci_channel_io_normal;
         set_pcie_port_type(dev);
+        set_pci_aer_firmware_first(dev);
 
         list_for_each_entry(slot, &dev->bus->slots, list)
                 if (PCI_SLOT(dev->devfn) == slot->number)
@@ -822,6 +1020,11 @@ int pci_setup_device(struct pci_dev *dev)
                 dev->transparent = ((dev->class & 0xff) == 1);
                 pci_read_bases(dev, 2, PCI_ROM_ADDRESS1);
                 set_pcie_hotplug_bridge(dev);
+                pos = pci_find_capability(dev, PCI_CAP_ID_SSVID);
+                if (pos) {
+                        pci_read_config_word(dev, pos + PCI_SSVID_VENDOR_ID, &dev->subsystem_vendor);
+                        pci_read_config_word(dev, pos + PCI_SSVID_DEVICE_ID, &dev->subsystem_device);
+                }
                 break;
 
         case PCI_HEADER_TYPE_CARDBUS:               /* CardBus bridge header */
@@ -907,7 +1110,7 @@ int pci_cfg_space_size(struct pci_dev *dev)
         if (class == PCI_CLASS_BRIDGE_HOST)
                 return pci_cfg_space_size_ext(dev);
 
-        pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
+        pos = pci_pcie_cap(dev);
         if (!pos) {
                 pos = pci_find_capability(dev, PCI_CAP_ID_PCIX);
                 if (!pos)
@@ -1014,6 +1217,9 @@ static void pci_init_capabilities(struct pci_dev *dev)
 
         /* Single Root I/O Virtualization */
         pci_iov_init(dev);
+
+        /* Enable ACS P2P upstream forwarding */
+        pci_enable_acs(dev);
 }
 
 void pci_device_add(struct pci_dev *dev, struct pci_bus *bus)
@@ -1067,6 +1273,45 @@ struct pci_dev *__ref pci_scan_single_device(struct pci_bus *bus, int devfn)
 }
 EXPORT_SYMBOL(pci_scan_single_device);
 
+static unsigned next_ari_fn(struct pci_dev *dev, unsigned fn)
+{
+        u16 cap;
+        unsigned pos, next_fn;
+
+        if (!dev)
+                return 0;
+
+        pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ARI);
+        if (!pos)
+                return 0;
+        pci_read_config_word(dev, pos + 4, &cap);
+        next_fn = cap >> 8;
+        if (next_fn <= fn)
+                return 0;
+        return next_fn;
+}
+
+static unsigned next_trad_fn(struct pci_dev *dev, unsigned fn)
+{
+        return (fn + 1) % 8;
+}
+
+static unsigned no_next_fn(struct pci_dev *dev, unsigned fn)
+{
+        return 0;
+}
+
+static int only_one_child(struct pci_bus *bus)
+{
+        struct pci_dev *parent = bus->self;
+        if (!parent || !pci_is_pcie(parent))
+                return 0;
+        if (parent->pcie_type == PCI_EXP_TYPE_ROOT_PORT ||
+            parent->pcie_type == PCI_EXP_TYPE_DOWNSTREAM)
+                return 1;
+        return 0;
+}
+
 /**
  * pci_scan_slot - scan a PCI slot on a bus for devices.
  * @bus: PCI bus to scan
@@ -1080,21 +1325,30 @@ EXPORT_SYMBOL(pci_scan_single_device);
  */
 int pci_scan_slot(struct pci_bus *bus, int devfn)
 {
-        int fn, nr = 0;
+        unsigned fn, nr = 0;
         struct pci_dev *dev;
+        unsigned (*next_fn)(struct pci_dev *, unsigned) = no_next_fn;
+
+        if (only_one_child(bus) && (devfn > 0))
+                return 0; /* Already scanned the entire slot */
 
         dev = pci_scan_single_device(bus, devfn);
-        if (dev && !dev->is_added)      /* new device? */
+        if (!dev)
+                return 0;
+        if (!dev->is_added)
                 nr++;
 
-        if (dev && dev->multifunction) {
-                for (fn = 1; fn < 8; fn++) {
-                        dev = pci_scan_single_device(bus, devfn + fn);
-                        if (dev) {
-                                if (!dev->is_added)
-                                        nr++;
-                                dev->multifunction = 1;
-                        }
+        if (pci_ari_enabled(bus))
+                next_fn = next_ari_fn;
+        else if (dev->multifunction)
+                next_fn = next_trad_fn;
+
+        for (fn = next_fn(dev, 0); fn > 0; fn = next_fn(dev, fn)) {
+                dev = pci_scan_single_device(bus, devfn + fn);
+                if (dev) {
+                        if (!dev->is_added)
+                                nr++;
+                        dev->multifunction = 1;
                 }
         }
 
@@ -1110,7 +1364,7 @@ unsigned int __devinit pci_scan_child_bus(struct pci_bus *bus)
         unsigned int devfn, pass, max = bus->secondary;
         struct pci_dev *dev;
 
-        pr_debug("PCI: Scanning bus %04x:%02x\n", pci_domain_nr(bus), bus->number);
+        dev_dbg(&bus->dev, "scanning bus\n");
 
         /* Go find them, Rover! */
         for (devfn = 0; devfn < 0x100; devfn += 8)
@@ -1124,8 +1378,7 @@ unsigned int __devinit pci_scan_child_bus(struct pci_bus *bus)
          * all PCI-to-PCI bridges on this bus.
          */
         if (!bus->is_added) {
-                pr_debug("PCI: Fixups for bus %04x:%02x\n",
-                         pci_domain_nr(bus), bus->number);
+                dev_dbg(&bus->dev, "fixups for bus\n");
                 pcibios_fixup_bus(bus);
                 if (pci_is_root_bus(bus))
                         bus->is_added = 1;
@@ -1145,8 +1398,7 @@ unsigned int __devinit pci_scan_child_bus(struct pci_bus *bus)
          *
          * Return how far we've got finding sub-buses.
          */
-        pr_debug("PCI: Bus scan for %04x:%02x returning with max=%02x\n",
-                pci_domain_nr(bus), bus->number, max);
+        dev_dbg(&bus->dev, "bus scan returning with max=%02x\n", max);
         return max;
 }
 
@@ -1154,7 +1406,7 @@ struct pci_bus * pci_create_bus(struct device *parent,
                 int bus, struct pci_ops *ops, void *sysdata)
 {
         int error;
-        struct pci_bus *b;
+        struct pci_bus *b, *b2;
         struct device *dev;
 
         b = pci_alloc_bus();
@@ -1170,9 +1422,10 @@ struct pci_bus * pci_create_bus(struct device *parent,
         b->sysdata = sysdata;
         b->ops = ops;
 
-        if (pci_find_bus(pci_domain_nr(b), bus)) {
+        b2 = pci_find_bus(pci_domain_nr(b), bus);
+        if (b2) {
                 /* If we already got to this bus through a different bridge, ignore it */
-                pr_debug("PCI: Bus %04x:%02x already known\n", pci_domain_nr(b), bus);
+                dev_dbg(&b2->dev, "bus already known\n");
                 goto err_out;
         }
 
@@ -1187,6 +1440,7 @@ struct pci_bus * pci_create_bus(struct device *parent,
         if (error)
                 goto dev_reg_err;
         b->bridge = get_device(dev);
+        device_enable_async_suspend(b->bridge);
 
         if (!parent)
                 set_dev_node(b->bridge, pcibus_to_node(b));
diff --git a/drivers/pci/proc.c b/drivers/pci/proc.c
index 593bb844b8db..449e890267a2 100644
--- a/drivers/pci/proc.c
+++ b/drivers/pci/proc.c
@@ -6,6 +6,7 @@
 
 #include <linux/init.h>
 #include <linux/pci.h>
+#include <linux/slab.h>
 #include <linux/module.h>
 #include <linux/proc_fs.h>
 #include <linux/seq_file.h>
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 245d2cdb4765..27c0e6eb7136 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -25,14 +25,9 @@
 #include <linux/dmi.h>
 #include <linux/pci-aspm.h>
 #include <linux/ioport.h>
+#include <asm/dma.h>    /* isa_dma_bridge_buggy */
 #include "pci.h"
 
-int isa_dma_bridge_buggy;
-EXPORT_SYMBOL(isa_dma_bridge_buggy);
-int pci_pci_problems;
-EXPORT_SYMBOL(pci_pci_problems);
-
-#ifdef CONFIG_PCI_QUIRKS
 /*
  * This quirk function disables memory decoding and releases memory resources
  * of the device specified by kernel's boot parameter 'pci=resource_alignment='.
@@ -338,6 +333,23 @@ static void __devinit quirk_s3_64M(struct pci_dev *dev)
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_S3,      PCI_DEVICE_ID_S3_868,           quirk_s3_64M);
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_S3,      PCI_DEVICE_ID_S3_968,           quirk_s3_64M);
 
+/*
+ * Some CS5536 BIOSes (for example, the Soekris NET5501 board w/ comBIOS
+ * ver. 1.33  20070103) don't set the correct ISA PCI region header info.
+ * BAR0 should be 8 bytes; instead, it may be set to something like 8k
+ * (which conflicts w/ BAR1's memory range).
+ */
+static void __devinit quirk_cs5536_vsa(struct pci_dev *dev)
+{
+        if (pci_resource_len(dev, 0) != 8) {
+                struct resource *res = &dev->resource[0];
+                res->end = res->start + 8 - 1;
+                dev_info(&dev->dev, "CS5536 ISA bridge bug detected "
+                                "(incorrect header); workaround applied.\n");
+        }
+}
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA, quirk_cs5536_vsa);
+
 static void __devinit quirk_io_region(struct pci_dev *dev, unsigned region,
         unsigned size, int nr, const char *name)
 {
@@ -356,8 +368,9 @@ static void __devinit quirk_io_region(struct pci_dev *dev, unsigned region,
                 bus_region.end = res->end;
                 pcibios_bus_to_resource(dev, res, &bus_region);
 
-                pci_claim_resource(dev, nr);
-                dev_info(&dev->dev, "quirk: region %04x-%04x claimed by %s\n", region, region + size - 1, name);
+                if (pci_claim_resource(dev, nr) == 0)
+                        dev_info(&dev->dev, "quirk: %pR claimed by %s\n",
+                                 res, name);
         }
 }       
 
@@ -1680,6 +1693,7 @@ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_SERVERWORKS,   PCI_DEVICE_ID_SERVERWORKS_
  */
 #define AMD_813X_MISC                   0x40
 #define AMD_813X_NOIOAMODE              (1<<0)
+#define AMD_813X_REV_B1                 0x12
 #define AMD_813X_REV_B2                 0x13
 
 static void quirk_disable_amd_813x_boot_interrupt(struct pci_dev *dev)
@@ -1688,7 +1702,8 @@ static void quirk_disable_amd_813x_boot_interrupt(struct pci_dev *dev)
 
         if (noioapicquirk)
                 return;
-        if (dev->revision == AMD_813X_REV_B2)
+        if ((dev->revision == AMD_813X_REV_B1) ||
+            (dev->revision == AMD_813X_REV_B2))
                 return;
 
         pci_read_config_dword(dev, AMD_813X_MISC, &pci_config_dword);
@@ -1698,8 +1713,10 @@ static void quirk_disable_amd_813x_boot_interrupt(struct pci_dev *dev)
         dev_info(&dev->dev, "disabled boot interrupts on device [%04x:%04x]\n",
                  dev->vendor, dev->device);
 }
-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD,   PCI_DEVICE_ID_AMD_8131_BRIDGE,     quirk_disable_amd_813x_boot_interrupt);
-DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_AMD,   PCI_DEVICE_ID_AMD_8132_BRIDGE,    quirk_disable_amd_813x_boot_interrupt);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD,      PCI_DEVICE_ID_AMD_8131_BRIDGE,  quirk_disable_amd_813x_boot_interrupt);
+DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_AMD,     PCI_DEVICE_ID_AMD_8131_BRIDGE,  quirk_disable_amd_813x_boot_interrupt);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD,      PCI_DEVICE_ID_AMD_8132_BRIDGE,  quirk_disable_amd_813x_boot_interrupt);
+DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_AMD,     PCI_DEVICE_ID_AMD_8132_BRIDGE,  quirk_disable_amd_813x_boot_interrupt);
 
 #define AMD_8111_PCI_IRQ_ROUTING        0x56
 
@@ -1961,11 +1978,25 @@ static void __devinit quirk_via_cx700_pci_parking_caching(struct pci_dev *dev)
         /*
          * Disable PCI Bus Parking and PCI Master read caching on CX700
          * which causes unspecified timing errors with a VT6212L on the PCI
-         * bus leading to USB2.0 packet loss. The defaults are that these
-         * features are turned off but some BIOSes turn them on.
+         * bus leading to USB2.0 packet loss.
+         *
+         * This quirk is only enabled if a second (on the external PCI bus)
+         * VT6212L is found -- the CX700 core itself also contains a USB
+         * host controller with the same PCI ID as the VT6212L.
          */
 
+        /* Count VT6212L instances */
+        struct pci_dev *p = pci_get_device(PCI_VENDOR_ID_VIA,
+                PCI_DEVICE_ID_VIA_8235_USB_2, NULL);
         uint8_t b;
+
+        /* p should contain the first (internal) VT6212L -- see if we have
+           an external one by searching again */
+        p = pci_get_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235_USB_2, p);
+        if (!p)
+                return;
+        pci_dev_put(p);
+
         if (pci_read_config_byte(dev, 0x76, &b) == 0) {
                 if (b & 0x40) {
                         /* Turn off PCI Bus Parking */
@@ -1992,7 +2023,7 @@ static void __devinit quirk_via_cx700_pci_parking_caching(struct pci_dev *dev)
                 }
         }
 }
-DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_VIA, 0x324e, quirk_via_cx700_pci_parking_caching);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, 0x324e, quirk_via_cx700_pci_parking_caching);
 
 /*
  * For Broadcom 5706, 5708, 5709 rev. A nics, any read beyond the
@@ -2092,6 +2123,10 @@ static void __devinit quirk_disable_msi(struct pci_dev *dev)
         }
 }
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_BRIDGE, quirk_disable_msi);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x9602, quirk_disable_msi);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ASUSTEK, 0x9602, quirk_disable_msi);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AI, 0x9602, quirk_disable_msi);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, 0xa238, quirk_disable_msi);
 
 /* Go through the list of Hypertransport capabilities and
  * return 1 if a HT MSI capability is found and enabled */
@@ -2513,9 +2548,95 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x10e7, quirk_i82576_sriov);
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x10e8, quirk_i82576_sriov);
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x150a, quirk_i82576_sriov);
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x150d, quirk_i82576_sriov);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1518, quirk_i82576_sriov);
 
 #endif  /* CONFIG_PCI_IOV */
 
+/*
+ * This is a quirk for the Ricoh MMC controller found as a part of
+ * some mulifunction chips.
+
+ * This is very similiar and based on the ricoh_mmc driver written by
+ * Philip Langdale. Thank you for these magic sequences.
+ *
+ * These chips implement the four main memory card controllers (SD, MMC, MS, xD)
+ * and one or both of cardbus or firewire.
+ *
+ * It happens that they implement SD and MMC
+ * support as separate controllers (and PCI functions). The linux SDHCI
+ * driver supports MMC cards but the chip detects MMC cards in hardware
+ * and directs them to the MMC controller - so the SDHCI driver never sees
+ * them.
+ *
+ * To get around this, we must disable the useless MMC controller.
+ * At that point, the SDHCI controller will start seeing them
+ * It seems to be the case that the relevant PCI registers to deactivate the
+ * MMC controller live on PCI function 0, which might be the cardbus controller
+ * or the firewire controller, depending on the particular chip in question
+ *
+ * This has to be done early, because as soon as we disable the MMC controller
+ * other pci functions shift up one level, e.g. function #2 becomes function
+ * #1, and this will confuse the pci core.
+ */
+
+#ifdef CONFIG_MMC_RICOH_MMC
+static void ricoh_mmc_fixup_rl5c476(struct pci_dev *dev)
+{
+        /* disable via cardbus interface */
+        u8 write_enable;
+        u8 write_target;
+        u8 disable;
+
+        /* disable must be done via function #0 */
+        if (PCI_FUNC(dev->devfn))
+                return;
+
+        pci_read_config_byte(dev, 0xB7, &disable);
+        if (disable & 0x02)
+                return;
+
+        pci_read_config_byte(dev, 0x8E, &write_enable);
+        pci_write_config_byte(dev, 0x8E, 0xAA);
+        pci_read_config_byte(dev, 0x8D, &write_target);
+        pci_write_config_byte(dev, 0x8D, 0xB7);
+        pci_write_config_byte(dev, 0xB7, disable | 0x02);
+        pci_write_config_byte(dev, 0x8E, write_enable);
+        pci_write_config_byte(dev, 0x8D, write_target);
+
+        dev_notice(&dev->dev, "proprietary Ricoh MMC controller disabled (via cardbus function)\n");
+        dev_notice(&dev->dev, "MMC cards are now supported by standard SDHCI controller\n");
+}
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476, ricoh_mmc_fixup_rl5c476);
+DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476, ricoh_mmc_fixup_rl5c476);
+
+static void ricoh_mmc_fixup_r5c832(struct pci_dev *dev)
+{
+        /* disable via firewire interface */
+        u8 write_enable;
+        u8 disable;
+
+        /* disable must be done via function #0 */
+        if (PCI_FUNC(dev->devfn))
+                return;
+
+        pci_read_config_byte(dev, 0xCB, &disable);
+
+        if (disable & 0x02)
+                return;
+
+        pci_read_config_byte(dev, 0xCA, &write_enable);
+        pci_write_config_byte(dev, 0xCA, 0x57);
+        pci_write_config_byte(dev, 0xCB, disable | 0x02);
+        pci_write_config_byte(dev, 0xCA, write_enable);
+
+        dev_notice(&dev->dev, "proprietary Ricoh MMC controller disabled (via firewire function)\n");
+        dev_notice(&dev->dev, "MMC cards are now supported by standard SDHCI controller\n");
+}
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5C832, ricoh_mmc_fixup_r5c832);
+DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5C832, ricoh_mmc_fixup_r5c832);
+#endif /*CONFIG_MMC_RICOH_MMC*/
+
+
 static void pci_do_fixups(struct pci_dev *dev, struct pci_fixup *f,
                           struct pci_fixup *end)
 {
@@ -2591,20 +2712,115 @@ void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev)
         }
         pci_do_fixups(dev, start, end);
 }
+EXPORT_SYMBOL(pci_fixup_device);
 
 static int __init pci_apply_final_quirks(void)
 {
         struct pci_dev *dev = NULL;
+        u8 cls = 0;
+        u8 tmp;
+
+        if (pci_cache_line_size)
+                printk(KERN_DEBUG "PCI: CLS %u bytes\n",
+                       pci_cache_line_size << 2);
 
         while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
                 pci_fixup_device(pci_fixup_final, dev);
+                /*
+                 * If arch hasn't set it explicitly yet, use the CLS
+                 * value shared by all PCI devices.  If there's a
+                 * mismatch, fall back to the default value.
+                 */
+                if (!pci_cache_line_size) {
+                        pci_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &tmp);
+                        if (!cls)
+                                cls = tmp;
+                        if (!tmp || cls == tmp)
+                                continue;
+
+                        printk(KERN_DEBUG "PCI: CLS mismatch (%u != %u), "
+                               "using %u bytes\n", cls << 2, tmp << 2,
+                               pci_dfl_cache_line_size << 2);
+                        pci_cache_line_size = pci_dfl_cache_line_size;
+                }
+        }
+        if (!pci_cache_line_size) {
+                printk(KERN_DEBUG "PCI: CLS %u bytes, default %u\n",
+                       cls << 2, pci_dfl_cache_line_size << 2);
+                pci_cache_line_size = cls ? cls : pci_dfl_cache_line_size;
         }
 
         return 0;
 }
 
 fs_initcall_sync(pci_apply_final_quirks);
-#else
-void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev) {}
-#endif
-EXPORT_SYMBOL(pci_fixup_device);
+
+/*
+ * Followings are device-specific reset methods which can be used to
+ * reset a single function if other methods (e.g. FLR, PM D0->D3) are
+ * not available.
+ */
+static int reset_intel_generic_dev(struct pci_dev *dev, int probe)
+{
+        int pos;
+
+        /* only implement PCI_CLASS_SERIAL_USB at present */
+        if (dev->class == PCI_CLASS_SERIAL_USB) {
+                pos = pci_find_capability(dev, PCI_CAP_ID_VNDR);
+                if (!pos)
+                        return -ENOTTY;
+
+                if (probe)
+                        return 0;
+
+                pci_write_config_byte(dev, pos + 0x4, 1);
+                msleep(100);
+
+                return 0;
+        } else {
+                return -ENOTTY;
+        }
+}
+
+static int reset_intel_82599_sfp_virtfn(struct pci_dev *dev, int probe)
+{
+        int pos;
+
+        pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
+        if (!pos)
+                return -ENOTTY;
+
+        if (probe)
+                return 0;
+
+        pci_write_config_word(dev, pos + PCI_EXP_DEVCTL,
+                                PCI_EXP_DEVCTL_BCR_FLR);
+        msleep(100);
+
+        return 0;
+}
+
+#define PCI_DEVICE_ID_INTEL_82599_SFP_VF   0x10ed
+
+static const struct pci_dev_reset_methods pci_dev_reset_methods[] = {
+        { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82599_SFP_VF,
+                 reset_intel_82599_sfp_virtfn },
+        { PCI_VENDOR_ID_INTEL, PCI_ANY_ID,
+                reset_intel_generic_dev },
+        { 0 }
+};
+
+int pci_dev_specific_reset(struct pci_dev *dev, int probe)
+{
+        const struct pci_dev_reset_methods *i;
+
+        for (i = pci_dev_reset_methods; i->reset; i++) {
+                if ((i->vendor == dev->vendor ||
+                     i->vendor == (u16)PCI_ANY_ID) &&
+                    (i->device == dev->device ||
+                     i->device == (u16)PCI_ANY_ID))
+                        return i->reset(dev, probe);
+        }
+
+        return -ENOTTY;
+}
diff --git a/drivers/pci/search.c b/drivers/pci/search.c
index ec415352d9ba..20d03f772289 100644
--- a/drivers/pci/search.c
+++ b/drivers/pci/search.c
@@ -9,15 +9,16 @@
 
 #include <linux/init.h>
 #include <linux/pci.h>
+#include <linux/slab.h>
 #include <linux/module.h>
 #include <linux/interrupt.h>
 #include "pci.h"
 
 DECLARE_RWSEM(pci_bus_sem);
 /*
- * find the upstream PCIE-to-PCI bridge of a PCI device
+ * find the upstream PCIe-to-PCI bridge of a PCI device
  * if the device is PCIE, return NULL
- * if the device isn't connected to a PCIE bridge (that is its parent is a
+ * if the device isn't connected to a PCIe bridge (that is its parent is a
  * legacy PCI bridge and the bridge is directly connected to bus 0), return its
  * parent
  */
@@ -26,18 +27,18 @@ pci_find_upstream_pcie_bridge(struct pci_dev *pdev)
 {
         struct pci_dev *tmp = NULL;
 
-        if (pdev->is_pcie)
+        if (pci_is_pcie(pdev))
                 return NULL;
         while (1) {
                 if (pci_is_root_bus(pdev->bus))
                         break;
                 pdev = pdev->bus->self;
                 /* a p2p bridge */
-                if (!pdev->is_pcie) {
+                if (!pci_is_pcie(pdev)) {
                         tmp = pdev;
                         continue;
                 }
-                /* PCI device should connect to a PCIE bridge */
+                /* PCI device should connect to a PCIe bridge */
                 if (pdev->pcie_type != PCI_EXP_TYPE_PCI_BRIDGE) {
                         /* Busted hardware? */
                         WARN_ON_ONCE(1);
@@ -149,32 +150,33 @@ struct pci_dev * pci_get_slot(struct pci_bus *bus, unsigned int devfn)
 }
 
 /**
- * pci_get_bus_and_slot - locate PCI device from a given PCI bus & slot
- * @bus: number of PCI bus on which desired PCI device resides
- * @devfn: encodes number of PCI slot in which the desired PCI
- * device resides and the logical device number within that slot
- * in case of multi-function devices.
- *
- * Note: the bus/slot search is limited to PCI domain (segment) 0.
+ * pci_get_domain_bus_and_slot - locate PCI device for a given PCI domain (segment), bus, and slot
+ * @domain: PCI domain/segment on which the PCI device resides.
+ * @bus: PCI bus on which desired PCI device resides
+ * @devfn: encodes number of PCI slot in which the desired PCI device
+ * resides and the logical device number within that slot in case of
+ * multi-function devices.
  *
- * Given a PCI bus and slot/function number, the desired PCI device
- * is located in system global list of PCI devices.  If the device
- * is found, a pointer to its data structure is returned.  If no
- * device is found, %NULL is returned. The returned device has its
- * reference count bumped by one.
+ * Given a PCI domain, bus, and slot/function number, the desired PCI
+ * device is located in the list of PCI devices. If the device is
+ * found, its reference count is increased and this function returns a
+ * pointer to its data structure.  The caller must decrement the
+ * reference count by calling pci_dev_put().  If no device is found,
+ * %NULL is returned.
  */
-
-struct pci_dev * pci_get_bus_and_slot(unsigned int bus, unsigned int devfn)
+struct pci_dev *pci_get_domain_bus_and_slot(int domain, unsigned int bus,
+                                            unsigned int devfn)
 {
         struct pci_dev *dev = NULL;
 
         while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
-                if (pci_domain_nr(dev->bus) == 0 &&
-                   (dev->bus->number == bus && dev->devfn == devfn))
+                if (pci_domain_nr(dev->bus) == domain &&
+                    (dev->bus->number == bus && dev->devfn == devfn))
                         return dev;
         }
         return NULL;
 }
+EXPORT_SYMBOL(pci_get_domain_bus_and_slot);
 
 static int match_pci_dev_by_id(struct device *dev, void *data)
 {
@@ -354,5 +356,4 @@ EXPORT_SYMBOL(pci_find_next_bus);
 EXPORT_SYMBOL(pci_get_device);
 EXPORT_SYMBOL(pci_get_subsys);
 EXPORT_SYMBOL(pci_get_slot);
-EXPORT_SYMBOL(pci_get_bus_and_slot);
 EXPORT_SYMBOL(pci_get_class);
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
index cb1a027eb552..19b111383f62 100644
--- a/drivers/pci/setup-bus.c
+++ b/drivers/pci/setup-bus.c
@@ -27,37 +27,91 @@
 #include <linux/slab.h>
 #include "pci.h"
 
-static void pbus_assign_resources_sorted(const struct pci_bus *bus)
-{
-        struct pci_dev *dev;
+struct resource_list_x {
+        struct resource_list_x *next;
         struct resource *res;
-        struct resource_list head, *list, *tmp;
-        int idx;
+        struct pci_dev *dev;
+        resource_size_t start;
+        resource_size_t end;
+        unsigned long flags;
+};
 
-        head.next = NULL;
-        list_for_each_entry(dev, &bus->devices, bus_list) {
-                u16 class = dev->class >> 8;
+static void add_to_failed_list(struct resource_list_x *head,
+                                 struct pci_dev *dev, struct resource *res)
+{
+        struct resource_list_x *list = head;
+        struct resource_list_x *ln = list->next;
+        struct resource_list_x *tmp;
 
-                /* Don't touch classless devices or host bridges or ioapics.  */
-                if (class == PCI_CLASS_NOT_DEFINED ||
-                    class == PCI_CLASS_BRIDGE_HOST)
-                        continue;
+        tmp = kmalloc(sizeof(*tmp), GFP_KERNEL);
+        if (!tmp) {
+                pr_warning("add_to_failed_list: kmalloc() failed!\n");
+                return;
+        }
 
-                /* Don't touch ioapic devices already enabled by firmware */
-                if (class == PCI_CLASS_SYSTEM_PIC) {
-                        u16 command;
-                        pci_read_config_word(dev, PCI_COMMAND, &command);
-                        if (command & (PCI_COMMAND_IO | PCI_COMMAND_MEMORY))
-                                continue;
-                }
+        tmp->next = ln;
+        tmp->res = res;
+        tmp->dev = dev;
+        tmp->start = res->start;
+        tmp->end = res->end;
+        tmp->flags = res->flags;
+        list->next = tmp;
+}
+
+static void free_failed_list(struct resource_list_x *head)
+{
+        struct resource_list_x *list, *tmp;
 
-                pdev_sort_resources(dev, &head);
+        for (list = head->next; list;) {
+                tmp = list;
+                list = list->next;
+                kfree(tmp);
         }
 
-        for (list = head.next; list;) {
+        head->next = NULL;
+}
+
+static void __dev_sort_resources(struct pci_dev *dev,
+                                 struct resource_list *head)
+{
+        u16 class = dev->class >> 8;
+
+        /* Don't touch classless devices or host bridges or ioapics.  */
+        if (class == PCI_CLASS_NOT_DEFINED || class == PCI_CLASS_BRIDGE_HOST)
+                return;
+
+        /* Don't touch ioapic devices already enabled by firmware */
+        if (class == PCI_CLASS_SYSTEM_PIC) {
+                u16 command;
+                pci_read_config_word(dev, PCI_COMMAND, &command);
+                if (command & (PCI_COMMAND_IO | PCI_COMMAND_MEMORY))
+                        return;
+        }
+
+        pdev_sort_resources(dev, head);
+}
+
+static void __assign_resources_sorted(struct resource_list *head,
+                                 struct resource_list_x *fail_head)
+{
+        struct resource *res;
+        struct resource_list *list, *tmp;
+        int idx;
+
+        for (list = head->next; list;) {
                 res = list->res;
                 idx = res - &list->dev->resource[0];
+
                 if (pci_assign_resource(list->dev, idx)) {
+                        if (fail_head && !pci_is_root_bus(list->dev->bus)) {
+                                /*
+                                 * if the failed res is for ROM BAR, and it will
+                                 * be enabled later, don't add it to the list
+                                 */
+                                if (!((idx == PCI_ROM_RESOURCE) &&
+                                      (!(res->flags & IORESOURCE_ROM_ENABLE))))
+                                        add_to_failed_list(fail_head, list->dev, res);
+                        }
                         res->start = 0;
                         res->end = 0;
                         res->flags = 0;
@@ -68,56 +122,77 @@ static void pbus_assign_resources_sorted(const struct pci_bus *bus)
         }
 }
 
+static void pdev_assign_resources_sorted(struct pci_dev *dev,
+                                 struct resource_list_x *fail_head)
+{
+        struct resource_list head;
+
+        head.next = NULL;
+        __dev_sort_resources(dev, &head);
+        __assign_resources_sorted(&head, fail_head);
+
+}
+
+static void pbus_assign_resources_sorted(const struct pci_bus *bus,
+                                         struct resource_list_x *fail_head)
+{
+        struct pci_dev *dev;
+        struct resource_list head;
+
+        head.next = NULL;
+        list_for_each_entry(dev, &bus->devices, bus_list)
+                __dev_sort_resources(dev, &head);
+
+        __assign_resources_sorted(&head, fail_head);
+}
+
 void pci_setup_cardbus(struct pci_bus *bus)
 {
         struct pci_dev *bridge = bus->self;
+        struct resource *res;
         struct pci_bus_region region;
 
-        dev_info(&bridge->dev, "CardBus bridge, secondary bus %04x:%02x\n",
-                 pci_domain_nr(bus), bus->number);
+        dev_info(&bridge->dev, "CardBus bridge to [bus %02x-%02x]\n",
+                 bus->secondary, bus->subordinate);
 
-        pcibios_resource_to_bus(bridge, &region, bus->resource[0]);
-        if (bus->resource[0]->flags & IORESOURCE_IO) {
+        res = bus->resource[0];
+        pcibios_resource_to_bus(bridge, &region, res);
+        if (res->flags & IORESOURCE_IO) {
                 /*
                  * The IO resource is allocated a range twice as large as it
                  * would normally need.  This allows us to set both IO regs.
                  */
-                dev_info(&bridge->dev, "  IO window: %#08lx-%#08lx\n",
-                       (unsigned long)region.start,
-                       (unsigned long)region.end);
+                dev_info(&bridge->dev, "  bridge window %pR\n", res);
                 pci_write_config_dword(bridge, PCI_CB_IO_BASE_0,
                                         region.start);
                 pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_0,
                                         region.end);
         }
 
-        pcibios_resource_to_bus(bridge, &region, bus->resource[1]);
-        if (bus->resource[1]->flags & IORESOURCE_IO) {
-                dev_info(&bridge->dev, "  IO window: %#08lx-%#08lx\n",
-                       (unsigned long)region.start,
-                       (unsigned long)region.end);
+        res = bus->resource[1];
+        pcibios_resource_to_bus(bridge, &region, res);
+        if (res->flags & IORESOURCE_IO) {
+                dev_info(&bridge->dev, "  bridge window %pR\n", res);
                 pci_write_config_dword(bridge, PCI_CB_IO_BASE_1,
                                         region.start);
                 pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_1,
                                         region.end);
         }
 
-        pcibios_resource_to_bus(bridge, &region, bus->resource[2]);
-        if (bus->resource[2]->flags & IORESOURCE_MEM) {
-                dev_info(&bridge->dev, "  PREFETCH window: %#08lx-%#08lx\n",
-                       (unsigned long)region.start,
-                       (unsigned long)region.end);
+        res = bus->resource[2];
+        pcibios_resource_to_bus(bridge, &region, res);
+        if (res->flags & IORESOURCE_MEM) {
+                dev_info(&bridge->dev, "  bridge window %pR\n", res);
                 pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_0,
                                         region.start);
                 pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_0,
                                         region.end);
         }
 
-        pcibios_resource_to_bus(bridge, &region, bus->resource[3]);
-        if (bus->resource[3]->flags & IORESOURCE_MEM) {
-                dev_info(&bridge->dev, "  MEM window: %#08lx-%#08lx\n",
-                       (unsigned long)region.start,
-                       (unsigned long)region.end);
+        res = bus->resource[3];
+        pcibios_resource_to_bus(bridge, &region, res);
+        if (res->flags & IORESOURCE_MEM) {
+                dev_info(&bridge->dev, "  bridge window %pR\n", res);
                 pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_1,
                                         region.start);
                 pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_1,
@@ -137,37 +212,29 @@ EXPORT_SYMBOL(pci_setup_cardbus);
    config space writes, so it's quite possible that an I/O window of
    the bridge will have some undesirable address (e.g. 0) after the
    first write. Ditto 64-bit prefetchable MMIO.  */
-static void pci_setup_bridge(struct pci_bus *bus)
+static void pci_setup_bridge_io(struct pci_bus *bus)
 {
         struct pci_dev *bridge = bus->self;
+        struct resource *res;
         struct pci_bus_region region;
-        u32 l, bu, lu, io_upper16;
-        int pref_mem64;
-
-        if (pci_is_enabled(bridge))
-                return;
-
-        dev_info(&bridge->dev, "PCI bridge, secondary bus %04x:%02x\n",
-                 pci_domain_nr(bus), bus->number);
+        u32 l, io_upper16;
 
         /* Set up the top and bottom of the PCI I/O segment for this bus. */
-        pcibios_resource_to_bus(bridge, &region, bus->resource[0]);
-        if (bus->resource[0]->flags & IORESOURCE_IO) {
+        res = bus->resource[0];
+        pcibios_resource_to_bus(bridge, &region, res);
+        if (res->flags & IORESOURCE_IO) {
                 pci_read_config_dword(bridge, PCI_IO_BASE, &l);
                 l &= 0xffff0000;
                 l |= (region.start >> 8) & 0x00f0;
                 l |= region.end & 0xf000;
                 /* Set up upper 16 bits of I/O base/limit. */
                 io_upper16 = (region.end & 0xffff0000) | (region.start >> 16);
-                dev_info(&bridge->dev, "  IO window: %#04lx-%#04lx\n",
-                    (unsigned long)region.start,
-                    (unsigned long)region.end);
-        }
-        else {
+                dev_info(&bridge->dev, "  bridge window %pR\n", res);
+        } else {
                 /* Clear upper 16 bits of I/O base/limit. */
                 io_upper16 = 0;
                 l = 0x00f0;
-                dev_info(&bridge->dev, "  IO window: disabled\n");
+                dev_info(&bridge->dev, "  bridge window [io  disabled]\n");
         }
         /* Temporarily disable the I/O range before updating PCI_IO_BASE. */
         pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, 0x0000ffff);
@@ -175,22 +242,35 @@ static void pci_setup_bridge(struct pci_bus *bus)
         pci_write_config_dword(bridge, PCI_IO_BASE, l);
         /* Update upper 16 bits of I/O base/limit. */
         pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, io_upper16);
+}
 
-        /* Set up the top and bottom of the PCI Memory segment
-           for this bus. */
-        pcibios_resource_to_bus(bridge, &region, bus->resource[1]);
-        if (bus->resource[1]->flags & IORESOURCE_MEM) {
+static void pci_setup_bridge_mmio(struct pci_bus *bus)
+{
+        struct pci_dev *bridge = bus->self;
+        struct resource *res;
+        struct pci_bus_region region;
+        u32 l;
+
+        /* Set up the top and bottom of the PCI Memory segment for this bus. */
+        res = bus->resource[1];
+        pcibios_resource_to_bus(bridge, &region, res);
+        if (res->flags & IORESOURCE_MEM) {
                 l = (region.start >> 16) & 0xfff0;
                 l |= region.end & 0xfff00000;
-                dev_info(&bridge->dev, "  MEM window: %#08lx-%#08lx\n",
-                    (unsigned long)region.start,
-                    (unsigned long)region.end);
-        }
-        else {
+                dev_info(&bridge->dev, "  bridge window %pR\n", res);
+        } else {
                 l = 0x0000fff0;
-                dev_info(&bridge->dev, "  MEM window: disabled\n");
+                dev_info(&bridge->dev, "  bridge window [mem disabled]\n");
         }
         pci_write_config_dword(bridge, PCI_MEMORY_BASE, l);
+}
+
+static void pci_setup_bridge_mmio_pref(struct pci_bus *bus)
+{
+        struct pci_dev *bridge = bus->self;
+        struct resource *res;
+        struct pci_bus_region region;
+        u32 l, bu, lu;
 
         /* Clear out the upper 32 bits of PREF limit.
            If PCI_PREF_BASE_UPPER32 was non-zero, this temporarily
@@ -198,38 +278,55 @@ static void pci_setup_bridge(struct pci_bus *bus)
         pci_write_config_dword(bridge, PCI_PREF_LIMIT_UPPER32, 0);
 
         /* Set up PREF base/limit. */
-        pref_mem64 = 0;
         bu = lu = 0;
-        pcibios_resource_to_bus(bridge, &region, bus->resource[2]);
-        if (bus->resource[2]->flags & IORESOURCE_PREFETCH) {
-                int width = 8;
+        res = bus->resource[2];
+        pcibios_resource_to_bus(bridge, &region, res);
+        if (res->flags & IORESOURCE_PREFETCH) {
                 l = (region.start >> 16) & 0xfff0;
                 l |= region.end & 0xfff00000;
-                if (bus->resource[2]->flags & IORESOURCE_MEM_64) {
-                        pref_mem64 = 1;
+                if (res->flags & IORESOURCE_MEM_64) {
                         bu = upper_32_bits(region.start);
                         lu = upper_32_bits(region.end);
-                        width = 16;
                 }
-                dev_info(&bridge->dev, "  PREFETCH window: %#0*llx-%#0*llx\n",
-                                width, (unsigned long long)region.start,
-                                width, (unsigned long long)region.end);
-        }
-        else {
+                dev_info(&bridge->dev, "  bridge window %pR\n", res);
+        } else {
                 l = 0x0000fff0;
-                dev_info(&bridge->dev, "  PREFETCH window: disabled\n");
+                dev_info(&bridge->dev, "  bridge window [mem pref disabled]\n");
         }
         pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE, l);
 
-        if (pref_mem64) {
-                /* Set the upper 32 bits of PREF base & limit. */
-                pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32, bu);
-                pci_write_config_dword(bridge, PCI_PREF_LIMIT_UPPER32, lu);
-        }
+        /* Set the upper 32 bits of PREF base & limit. */
+        pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32, bu);
+        pci_write_config_dword(bridge, PCI_PREF_LIMIT_UPPER32, lu);
+}
+
+static void __pci_setup_bridge(struct pci_bus *bus, unsigned long type)
+{
+        struct pci_dev *bridge = bus->self;
+
+        dev_info(&bridge->dev, "PCI bridge to [bus %02x-%02x]\n",
+                 bus->secondary, bus->subordinate);
+
+        if (type & IORESOURCE_IO)
+                pci_setup_bridge_io(bus);
+
+        if (type & IORESOURCE_MEM)
+                pci_setup_bridge_mmio(bus);
+
+        if (type & IORESOURCE_PREFETCH)
+                pci_setup_bridge_mmio_pref(bus);
 
         pci_write_config_word(bridge, PCI_BRIDGE_CONTROL, bus->bridge_ctl);
 }
 
+static void pci_setup_bridge(struct pci_bus *bus)
+{
+        unsigned long type = IORESOURCE_IO | IORESOURCE_MEM |
+                                  IORESOURCE_PREFETCH;
+
+        __pci_setup_bridge(bus, type);
+}
+
 /* Check whether the bridge supports optional I/O and
    prefetchable memory ranges. If not, the respective
    base/limit registers must be read-only and read as 0. */
@@ -265,8 +362,11 @@ static void pci_bridge_check_ranges(struct pci_bus *bus)
         }
         if (pmem) {
                 b_res[2].flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH;
-                if ((pmem & PCI_PREF_RANGE_TYPE_MASK) == PCI_PREF_RANGE_TYPE_64)
+                if ((pmem & PCI_PREF_RANGE_TYPE_MASK) ==
+                    PCI_PREF_RANGE_TYPE_64) {
                         b_res[2].flags |= IORESOURCE_MEM_64;
+                        b_res[2].flags |= PCI_PREF_RANGE_TYPE_64;
+                }
         }
 
         /* double check if bridge does support 64 bit pref */
@@ -295,8 +395,7 @@ static struct resource *find_free_bus_resource(struct pci_bus *bus, unsigned lon
         unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM |
                                   IORESOURCE_PREFETCH;
 
-        for (i = 0; i < PCI_BUS_NUM_RESOURCES; i++) {
-                r = bus->resource[i];
+        pci_bus_for_each_resource(bus, r, i) {
                 if (r == &ioport_resource || r == &iomem_resource)
                         continue;
                 if (r && (r->flags & type_mask) == type && !r->parent)
@@ -313,7 +412,7 @@ static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size)
 {
         struct pci_dev *dev;
         struct resource *b_res = find_free_bus_resource(bus, IORESOURCE_IO);
-        unsigned long size = 0, size1 = 0;
+        unsigned long size = 0, size1 = 0, old_size;
 
         if (!b_res)
                 return;
@@ -338,13 +437,22 @@ static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size)
         }
         if (size < min_size)
                 size = min_size;
+        old_size = resource_size(b_res);
+        if (old_size == 1)
+                old_size = 0;
 /* To be fixed in 2.5: we should have sort of HAVE_ISA
    flag in the struct pci_bus. */
 #if defined(CONFIG_ISA) || defined(CONFIG_EISA)
         size = (size & 0xff) + ((size & ~0xffUL) << 2);
 #endif
         size = ALIGN(size + size1, 4096);
+        if (size < old_size)
+                size = old_size;
         if (!size) {
+                if (b_res->start || b_res->end)
+                        dev_info(&bus->self->dev, "disabling bridge window "
+                                 "%pR to [bus %02x-%02x] (unused)\n", b_res,
+                                 bus->secondary, bus->subordinate);
                 b_res->flags = 0;
                 return;
         }
@@ -360,7 +468,7 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
                          unsigned long type, resource_size_t min_size)
 {
         struct pci_dev *dev;
-        resource_size_t min_align, align, size;
+        resource_size_t min_align, align, size, old_size;
         resource_size_t aligns[12];     /* Alignments from 1Mb to 2Gb */
         int order, max_order;
         struct resource *b_res = find_free_bus_resource(bus, type);
@@ -390,8 +498,9 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
                         align = pci_resource_alignment(dev, r);
                         order = __ffs(align) - 20;
                         if (order > 11) {
-                                dev_warn(&dev->dev, "BAR %d bad alignment %llx: "
-                                         "%pR\n", i, (unsigned long long)align, r);
+                                dev_warn(&dev->dev, "disabling BAR %d: %pR "
+                                         "(bad alignment %#llx)\n", i, r,
+                                         (unsigned long long) align);
                                 r->flags = 0;
                                 continue;
                         }
@@ -409,6 +518,11 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
         }
         if (size < min_size)
                 size = min_size;
+        old_size = resource_size(b_res);
+        if (old_size == 1)
+                old_size = 0;
+        if (size < old_size)
+                size = old_size;
 
         align = 0;
         min_align = 0;
@@ -425,6 +539,10 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
         }
         size = ALIGN(size, min_align);
         if (!size) {
+                if (b_res->start || b_res->end)
+                        dev_info(&bus->self->dev, "disabling bridge window "
+                                 "%pR to [bus %02x-%02x] (unused)\n", b_res,
+                                 bus->secondary, bus->subordinate);
                 b_res->flags = 0;
                 return 1;
         }
@@ -541,23 +659,25 @@ void __ref pci_bus_size_bridges(struct pci_bus *bus)
 }
 EXPORT_SYMBOL(pci_bus_size_bridges);
 
-void __ref pci_bus_assign_resources(const struct pci_bus *bus)
+static void __ref __pci_bus_assign_resources(const struct pci_bus *bus,
+                                         struct resource_list_x *fail_head)
 {
         struct pci_bus *b;
         struct pci_dev *dev;
 
-        pbus_assign_resources_sorted(bus);
+        pbus_assign_resources_sorted(bus, fail_head);
 
         list_for_each_entry(dev, &bus->devices, bus_list) {
                 b = dev->subordinate;
                 if (!b)
                         continue;
 
-                pci_bus_assign_resources(b);
+                __pci_bus_assign_resources(b, fail_head);
 
                 switch (dev->class >> 8) {
                 case PCI_CLASS_BRIDGE_PCI:
-                        pci_setup_bridge(b);
+                        if (!pci_is_enabled(dev))
+                                pci_setup_bridge(b);
                         break;
 
                 case PCI_CLASS_BRIDGE_CARDBUS:
@@ -571,21 +691,133 @@ void __ref pci_bus_assign_resources(const struct pci_bus *bus)
                 }
         }
 }
+
+void __ref pci_bus_assign_resources(const struct pci_bus *bus)
+{
+        __pci_bus_assign_resources(bus, NULL);
+}
 EXPORT_SYMBOL(pci_bus_assign_resources);
 
+static void __ref __pci_bridge_assign_resources(const struct pci_dev *bridge,
+                                         struct resource_list_x *fail_head)
+{
+        struct pci_bus *b;
+
+        pdev_assign_resources_sorted((struct pci_dev *)bridge, fail_head);
+
+        b = bridge->subordinate;
+        if (!b)
+                return;
+
+        __pci_bus_assign_resources(b, fail_head);
+
+        switch (bridge->class >> 8) {
+        case PCI_CLASS_BRIDGE_PCI:
+                pci_setup_bridge(b);
+                break;
+
+        case PCI_CLASS_BRIDGE_CARDBUS:
+                pci_setup_cardbus(b);
+                break;
+
+        default:
+                dev_info(&bridge->dev, "not setting up bridge for bus "
+                         "%04x:%02x\n", pci_domain_nr(b), b->number);
+                break;
+        }
+}
+static void pci_bridge_release_resources(struct pci_bus *bus,
+                                          unsigned long type)
+{
+        int idx;
+        bool changed = false;
+        struct pci_dev *dev;
+        struct resource *r;
+        unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM |
+                                  IORESOURCE_PREFETCH;
+
+        dev = bus->self;
+        for (idx = PCI_BRIDGE_RESOURCES; idx <= PCI_BRIDGE_RESOURCE_END;
+             idx++) {
+                r = &dev->resource[idx];
+                if ((r->flags & type_mask) != type)
+                        continue;
+                if (!r->parent)
+                        continue;
+                /*
+                 * if there are children under that, we should release them
+                 *  all
+                 */
+                release_child_resources(r);
+                if (!release_resource(r)) {
+                        dev_printk(KERN_DEBUG, &dev->dev,
+                                 "resource %d %pR released\n", idx, r);
+                        /* keep the old size */
+                        r->end = resource_size(r) - 1;
+                        r->start = 0;
+                        r->flags = 0;
+                        changed = true;
+                }
+        }
+
+        if (changed) {
+                /* avoiding touch the one without PREF */
+                if (type & IORESOURCE_PREFETCH)
+                        type = IORESOURCE_PREFETCH;
+                __pci_setup_bridge(bus, type);
+        }
+}
+
+enum release_type {
+        leaf_only,
+        whole_subtree,
+};
+/*
+ * try to release pci bridge resources that is from leaf bridge,
+ * so we can allocate big new one later
+ */
+static void __ref pci_bus_release_bridge_resources(struct pci_bus *bus,
+                                                   unsigned long type,
+                                                   enum release_type rel_type)
+{
+        struct pci_dev *dev;
+        bool is_leaf_bridge = true;
+
+        list_for_each_entry(dev, &bus->devices, bus_list) {
+                struct pci_bus *b = dev->subordinate;
+                if (!b)
+                        continue;
+
+                is_leaf_bridge = false;
+
+                if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI)
+                        continue;
+
+                if (rel_type == whole_subtree)
+                        pci_bus_release_bridge_resources(b, type,
+                                                 whole_subtree);
+        }
+
+        if (pci_is_root_bus(bus))
+                return;
+
+        if ((bus->self->class >> 8) != PCI_CLASS_BRIDGE_PCI)
+                return;
+
+        if ((rel_type == whole_subtree) || is_leaf_bridge)
+                pci_bridge_release_resources(bus, type);
+}
+
 static void pci_bus_dump_res(struct pci_bus *bus)
 {
-        int i;
+        struct resource *res;
+        int i;
 
-        for (i = 0; i < PCI_BUS_NUM_RESOURCES; i++) {
-                struct resource *res = bus->resource[i];
-                if (!res || !res->end)
+        pci_bus_for_each_resource(bus, res, i) {
+                if (!res || !res->end || !res->flags)
                         continue;
 
-                dev_printk(KERN_DEBUG, &bus->dev, "resource %d %s %pR\n", i,
-                           (res->flags & IORESOURCE_IO) ? "io: " :
-                            ((res->flags & IORESOURCE_PREFETCH)? "pref mem":"mem:"),
-                           res);
+                dev_printk(KERN_DEBUG, &bus->dev, "resource %d %pR\n", i, res);
         }
 }
 
@@ -627,3 +859,65 @@ pci_assign_unassigned_resources(void)
                 pci_bus_dump_resources(bus);
         }
 }
+
+void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge)
+{
+        struct pci_bus *parent = bridge->subordinate;
+        int tried_times = 0;
+        struct resource_list_x head, *list;
+        int retval;
+        unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM |
+                                  IORESOURCE_PREFETCH;
+
+        head.next = NULL;
+
+again:
+        pci_bus_size_bridges(parent);
+        __pci_bridge_assign_resources(bridge, &head);
+        retval = pci_reenable_device(bridge);
+        pci_set_master(bridge);
+        pci_enable_bridges(parent);
+
+        tried_times++;
+
+        if (!head.next)
+                return;
+
+        if (tried_times >= 2) {
+                /* still fail, don't need to try more */
+                free_failed_list(&head);
+                return;
+        }
+
+        printk(KERN_DEBUG "PCI: No. %d try to assign unassigned res\n",
+                         tried_times + 1);
+
+        /*
+         * Try to release leaf bridge's resources that doesn't fit resource of
+         * child device under that bridge
+         */
+        for (list = head.next; list;) {
+                struct pci_bus *bus = list->dev->bus;
+                unsigned long flags = list->flags;
+
+                pci_bus_release_bridge_resources(bus, flags & type_mask,
+                                                 whole_subtree);
+                list = list->next;
+        }
+        /* restore size and flags */
+        for (list = head.next; list;) {
+                struct resource *res = list->res;
+
+                res->start = list->start;
+                res->end = list->end;
+                res->flags = list->flags;
+                if (list->dev->subordinate)
+                        res->flags = 0;
+
+                list = list->next;
+        }
+        free_failed_list(&head);
+
+        goto again;
+}
+EXPORT_SYMBOL_GPL(pci_assign_unassigned_bridge_resources);
diff --git a/drivers/pci/setup-res.c b/drivers/pci/setup-res.c
index c54526b206b5..17bed18d24ad 100644
--- a/drivers/pci/setup-res.c
+++ b/drivers/pci/setup-res.c
@@ -51,12 +51,6 @@ void pci_update_resource(struct pci_dev *dev, int resno)
 
         pcibios_resource_to_bus(dev, &region, res);
 
-        dev_dbg(&dev->dev, "BAR %d: got res %pR bus [%#llx-%#llx] "
-                "flags %#lx\n", resno, res,
-                 (unsigned long long)region.start,
-                 (unsigned long long)region.end,
-                 (unsigned long)res->flags);
-
         new = region.start | (res->flags & PCI_REGION_FLAG_MASK);
         if (res->flags & IORESOURCE_IO)
                 mask = (u32)PCI_BASE_ADDRESS_IO_MASK;
@@ -91,40 +85,39 @@ void pci_update_resource(struct pci_dev *dev, int resno)
                 }
         }
         res->flags &= ~IORESOURCE_UNSET;
-        dev_dbg(&dev->dev, "BAR %d: moved to bus [%#llx-%#llx] flags %#lx\n",
-                resno, (unsigned long long)region.start,
-                (unsigned long long)region.end, res->flags);
+        dev_info(&dev->dev, "BAR %d: set to %pR (PCI address [%#llx-%#llx]\n",
+                 resno, res, (unsigned long long)region.start,
+                 (unsigned long long)region.end);
 }
 
 int pci_claim_resource(struct pci_dev *dev, int resource)
 {
         struct resource *res = &dev->resource[resource];
-        struct resource *root;
-        int err;
+        struct resource *root, *conflict;
 
         root = pci_find_parent_resource(dev, res);
+        if (!root) {
+                dev_err(&dev->dev, "no compatible bridge window for %pR\n",
+                        res);
+                return -EINVAL;
+        }
 
-        err = -EINVAL;
-        if (root != NULL)
-                err = request_resource(root, res);
-
-        if (err) {
-                const char *dtype = resource < PCI_BRIDGE_RESOURCES ? "device" : "bridge";
-                dev_err(&dev->dev, "BAR %d: %s of %s %pR\n",
-                        resource,
-                        root ? "address space collision on" :
-                                "no parent found for",
-                        dtype, res);
+        conflict = request_resource_conflict(root, res);
+        if (conflict) {
+                dev_err(&dev->dev,
+                        "address space collision: %pR conflicts with %s %pR\n",
+                        res, conflict->name, conflict);
+                return -EBUSY;
         }
 
-        return err;
+        return 0;
 }
 EXPORT_SYMBOL(pci_claim_resource);
 
 #ifdef CONFIG_PCI_QUIRKS
 void pci_disable_bridge_window(struct pci_dev *dev)
 {
-        dev_dbg(&dev->dev, "Disabling bridge window.\n");
+        dev_info(&dev->dev, "disabling bridge mem windows\n");
 
         /* MMIO Base/Limit */
         pci_write_config_dword(dev, PCI_MEMORY_BASE, 0x0000fff0);
@@ -165,6 +158,7 @@ static int __pci_assign_resource(struct pci_bus *bus, struct pci_dev *dev,
 
         if (!ret) {
                 res->flags &= ~IORESOURCE_STARTALIGN;
+                dev_info(&dev->dev, "BAR %d: assigned %pR\n", resno, res);
                 if (resno < PCI_BRIDGE_RESOURCES)
                         pci_update_resource(dev, resno);
         }
@@ -178,12 +172,12 @@ int pci_assign_resource(struct pci_dev *dev, int resno)
         resource_size_t align;
         struct pci_bus *bus;
         int ret;
+        char *type;
 
         align = pci_resource_alignment(dev, res);
         if (!align) {
-                dev_info(&dev->dev, "BAR %d: can't allocate resource (bogus "
-                        "alignment) %pR flags %#lx\n",
-                        resno, res, res->flags);
+                dev_info(&dev->dev, "BAR %d: can't assign %pR "
+                         "(bogus alignment)\n", resno, res);
                 return -EINVAL;
         }
 
@@ -198,9 +192,20 @@ int pci_assign_resource(struct pci_dev *dev, int resno)
                 break;
         }
 
-        if (ret)
-                dev_info(&dev->dev, "BAR %d: can't allocate %s resource %pR\n",
-                        resno, res->flags & IORESOURCE_IO ? "I/O" : "mem", res);
+        if (ret) {
+                if (res->flags & IORESOURCE_MEM)
+                        if (res->flags & IORESOURCE_PREFETCH)
+                                type = "mem pref";
+                        else
+                                type = "mem";
+                else if (res->flags & IORESOURCE_IO)
+                        type = "io";
+                else
+                        type = "unknown";
+                dev_info(&dev->dev,
+                         "BAR %d: can't assign %s (size %#llx)\n",
+                         resno, type, (unsigned long long) resource_size(res));
+        }
 
         return ret;
 }
@@ -225,9 +230,8 @@ void pdev_sort_resources(struct pci_dev *dev, struct resource_list *head)
 
                 r_align = pci_resource_alignment(dev, r);
                 if (!r_align) {
-                        dev_warn(&dev->dev, "BAR %d: bogus alignment "
-                                "%pR flags %#lx\n",
-                                i, r, r->flags);
+                        dev_warn(&dev->dev, "BAR %d: %pR has bogus alignment\n",
+                                 i, r);
                         continue;
                 }
                 for (list = head; ; list = list->next) {
@@ -274,8 +278,8 @@ int pci_enable_resources(struct pci_dev *dev, int mask)
                         continue;
 
                 if (!r->parent) {
-                        dev_err(&dev->dev, "device not available because of "
-                                "BAR %d %pR collisions\n", i, r);
+                        dev_err(&dev->dev, "device not available "
+                                "(can't reserve %pR)\n", r);
                         return -EINVAL;
                 }
 
diff --git a/drivers/pci/slot.c b/drivers/pci/slot.c
index 8c02b6c53bdb..659eaa0fc48f 100644
--- a/drivers/pci/slot.c
+++ b/drivers/pci/slot.c
@@ -6,6 +6,7 @@
  */
 
 #include <linux/kobject.h>
+#include <linux/slab.h>
 #include <linux/pci.h>
 #include <linux/err.h>
 #include "pci.h"
@@ -29,7 +30,7 @@ static ssize_t pci_slot_attr_store(struct kobject *kobj,
         return attribute->store ? attribute->store(slot, buf, len) : -EIO;
 }
 
-static struct sysfs_ops pci_slot_sysfs_ops = {
+static const struct sysfs_ops pci_slot_sysfs_ops = {
         .show = pci_slot_attr_show,
         .store = pci_slot_attr_store,
 };
@@ -47,6 +48,55 @@ static ssize_t address_read_file(struct pci_slot *slot, char *buf)
                                 slot->number);
 }
 
+/* these strings match up with the values in pci_bus_speed */
+static char *pci_bus_speed_strings[] = {
+        "33 MHz PCI",           /* 0x00 */
+        "66 MHz PCI",           /* 0x01 */
+        "66 MHz PCI-X",         /* 0x02 */
+        "100 MHz PCI-X",        /* 0x03 */
+        "133 MHz PCI-X",        /* 0x04 */
+        NULL,                   /* 0x05 */
+        NULL,                   /* 0x06 */
+        NULL,                   /* 0x07 */
+        NULL,                   /* 0x08 */
+        "66 MHz PCI-X 266",     /* 0x09 */
+        "100 MHz PCI-X 266",    /* 0x0a */
+        "133 MHz PCI-X 266",    /* 0x0b */
+        "Unknown AGP",          /* 0x0c */
+        "1x AGP",               /* 0x0d */
+        "2x AGP",               /* 0x0e */
+        "4x AGP",               /* 0x0f */
+        "8x AGP",               /* 0x10 */
+        "66 MHz PCI-X 533",     /* 0x11 */
+        "100 MHz PCI-X 533",    /* 0x12 */
+        "133 MHz PCI-X 533",    /* 0x13 */
+        "2.5 GT/s PCIe",        /* 0x14 */
+        "5.0 GT/s PCIe",        /* 0x15 */
+        "8.0 GT/s PCIe",        /* 0x16 */
+};
+
+static ssize_t bus_speed_read(enum pci_bus_speed speed, char *buf)
+{
+        const char *speed_string;
+
+        if (speed < ARRAY_SIZE(pci_bus_speed_strings))
+                speed_string = pci_bus_speed_strings[speed];
+        else
+                speed_string = "Unknown";
+
+        return sprintf(buf, "%s\n", speed_string);
+}
+
+static ssize_t max_speed_read_file(struct pci_slot *slot, char *buf)
+{
+        return bus_speed_read(slot->bus->max_bus_speed, buf);
+}
+
+static ssize_t cur_speed_read_file(struct pci_slot *slot, char *buf)
+{
+        return bus_speed_read(slot->bus->cur_bus_speed, buf);
+}
+
 static void pci_slot_release(struct kobject *kobj)
 {
         struct pci_dev *dev;
@@ -66,9 +116,15 @@ static void pci_slot_release(struct kobject *kobj)
 
 static struct pci_slot_attribute pci_slot_attr_address =
         __ATTR(address, (S_IFREG | S_IRUGO), address_read_file, NULL);
+static struct pci_slot_attribute pci_slot_attr_max_speed =
+        __ATTR(max_bus_speed, (S_IFREG | S_IRUGO), max_speed_read_file, NULL);
+static struct pci_slot_attribute pci_slot_attr_cur_speed =
+        __ATTR(cur_bus_speed, (S_IFREG | S_IRUGO), cur_speed_read_file, NULL);
 
 static struct attribute *pci_slot_default_attrs[] = {
         &pci_slot_attr_address.attr,
+        &pci_slot_attr_max_speed.attr,
+        &pci_slot_attr_cur_speed.attr,
         NULL,
 };
 
diff --git a/drivers/pci/vpd.c b/drivers/pci/vpd.c
new file mode 100644
index 000000000000..a5a5ca17cfe6
--- /dev/null
+++ b/drivers/pci/vpd.c
@@ -0,0 +1,61 @@
+/*
+ * File:        vpd.c
+ * Purpose:     Provide PCI VPD support
+ *
+ * Copyright (C) 2010 Broadcom Corporation.
+ */
+
+#include <linux/pci.h>
+
+int pci_vpd_find_tag(const u8 *buf, unsigned int off, unsigned int len, u8 rdt)
+{
+        int i;
+
+        for (i = off; i < len; ) {
+                u8 val = buf[i];
+
+                if (val & PCI_VPD_LRDT) {
+                        /* Don't return success of the tag isn't complete */
+                        if (i + PCI_VPD_LRDT_TAG_SIZE > len)
+                                break;
+
+                        if (val == rdt)
+                                return i;
+
+                        i += PCI_VPD_LRDT_TAG_SIZE +
+                             pci_vpd_lrdt_size(&buf[i]);
+                } else {
+                        u8 tag = val & ~PCI_VPD_SRDT_LEN_MASK;
+
+                        if (tag == rdt)
+                                return i;
+
+                        if (tag == PCI_VPD_SRDT_END)
+                                break;
+
+                        i += PCI_VPD_SRDT_TAG_SIZE +
+                             pci_vpd_srdt_size(&buf[i]);
+                }
+        }
+
+        return -ENOENT;
+}
+EXPORT_SYMBOL_GPL(pci_vpd_find_tag);
+
+int pci_vpd_find_info_keyword(const u8 *buf, unsigned int off,
+                              unsigned int len, const char *kw)
+{
+        int i;
+
+        for (i = off; i + PCI_VPD_INFO_FLD_HDR_SIZE <= off + len;) {
+                if (buf[i + 0] == kw[0] &&
+                    buf[i + 1] == kw[1])
+                        return i;
+
+                i += PCI_VPD_INFO_FLD_HDR_SIZE +
+                     pci_vpd_info_field_size(&buf[i]);
+        }
+
+        return -ENOENT;
+}
+EXPORT_SYMBOL_GPL(pci_vpd_find_info_keyword);