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authorBjorn Helgaas <bhelgaas@google.com>2014-01-10 16:23:15 -0500
committerBjorn Helgaas <bhelgaas@google.com>2014-01-10 16:23:15 -0500
commit96702be560374ee7e7139a34cab03554129abbb4 (patch)
treeede7f763c471fad6d268a2e6a1d17d029b3eaf31 /drivers/pci/probe.c
parent04f982beb900f37bc216d63c9dbc5bdddb4a3d3a (diff)
parentd56dbf5bab8ce44c5407bb099f71987f58d18bb4 (diff)
Merge branch 'pci/resource' into next
* pci/resource: PCI: Allocate 64-bit BARs above 4G when possible PCI: Enforce bus address limits in resource allocation PCI: Split out bridge window override of minimum allocation address agp/ati: Use PCI_COMMAND instead of hard-coded 4 agp/intel: Use CPU physical address, not bus address, for ioremap() agp/intel: Use pci_bus_address() to get GTTADR bus address agp/intel: Use pci_bus_address() to get MMADR bus address agp/intel: Support 64-bit GMADR agp/intel: Rename gtt_bus_addr to gtt_phys_addr drm/i915: Rename gtt_bus_addr to gtt_phys_addr agp: Use pci_resource_start() to get CPU physical address for BAR agp: Support 64-bit APBASE PCI: Add pci_bus_address() to get bus address of a BAR PCI: Convert pcibios_resource_to_bus() to take a pci_bus, not a pci_dev PCI: Change pci_bus_region addresses to dma_addr_t
Diffstat (limited to 'drivers/pci/probe.c')
-rw-r--r--drivers/pci/probe.c18
1 files changed, 9 insertions, 9 deletions
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 12ec56c9a913..23cdfac0bdb3 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -269,8 +269,8 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
269 region.end = l + sz; 269 region.end = l + sz;
270 } 270 }
271 271
272 pcibios_bus_to_resource(dev, res, &region); 272 pcibios_bus_to_resource(dev->bus, res, &region);
273 pcibios_resource_to_bus(dev, &inverted_region, res); 273 pcibios_resource_to_bus(dev->bus, &inverted_region, res);
274 274
275 /* 275 /*
276 * If "A" is a BAR value (a bus address), "bus_to_resource(A)" is 276 * If "A" is a BAR value (a bus address), "bus_to_resource(A)" is
@@ -364,7 +364,7 @@ static void pci_read_bridge_io(struct pci_bus *child)
364 res->flags = (io_base_lo & PCI_IO_RANGE_TYPE_MASK) | IORESOURCE_IO; 364 res->flags = (io_base_lo & PCI_IO_RANGE_TYPE_MASK) | IORESOURCE_IO;
365 region.start = base; 365 region.start = base;
366 region.end = limit + io_granularity - 1; 366 region.end = limit + io_granularity - 1;
367 pcibios_bus_to_resource(dev, res, &region); 367 pcibios_bus_to_resource(dev->bus, res, &region);
368 dev_printk(KERN_DEBUG, &dev->dev, " bridge window %pR\n", res); 368 dev_printk(KERN_DEBUG, &dev->dev, " bridge window %pR\n", res);
369 } 369 }
370} 370}
@@ -386,7 +386,7 @@ static void pci_read_bridge_mmio(struct pci_bus *child)
386 res->flags = (mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) | IORESOURCE_MEM; 386 res->flags = (mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) | IORESOURCE_MEM;
387 region.start = base; 387 region.start = base;
388 region.end = limit + 0xfffff; 388 region.end = limit + 0xfffff;
389 pcibios_bus_to_resource(dev, res, &region); 389 pcibios_bus_to_resource(dev->bus, res, &region);
390 dev_printk(KERN_DEBUG, &dev->dev, " bridge window %pR\n", res); 390 dev_printk(KERN_DEBUG, &dev->dev, " bridge window %pR\n", res);
391 } 391 }
392} 392}
@@ -436,7 +436,7 @@ static void pci_read_bridge_mmio_pref(struct pci_bus *child)
436 res->flags |= IORESOURCE_MEM_64; 436 res->flags |= IORESOURCE_MEM_64;
437 region.start = base; 437 region.start = base;
438 region.end = limit + 0xfffff; 438 region.end = limit + 0xfffff;
439 pcibios_bus_to_resource(dev, res, &region); 439 pcibios_bus_to_resource(dev->bus, res, &region);
440 dev_printk(KERN_DEBUG, &dev->dev, " bridge window %pR\n", res); 440 dev_printk(KERN_DEBUG, &dev->dev, " bridge window %pR\n", res);
441 } 441 }
442} 442}
@@ -1084,24 +1084,24 @@ int pci_setup_device(struct pci_dev *dev)
1084 region.end = 0x1F7; 1084 region.end = 0x1F7;
1085 res = &dev->resource[0]; 1085 res = &dev->resource[0];
1086 res->flags = LEGACY_IO_RESOURCE; 1086 res->flags = LEGACY_IO_RESOURCE;
1087 pcibios_bus_to_resource(dev, res, &region); 1087 pcibios_bus_to_resource(dev->bus, res, &region);
1088 region.start = 0x3F6; 1088 region.start = 0x3F6;
1089 region.end = 0x3F6; 1089 region.end = 0x3F6;
1090 res = &dev->resource[1]; 1090 res = &dev->resource[1];
1091 res->flags = LEGACY_IO_RESOURCE; 1091 res->flags = LEGACY_IO_RESOURCE;
1092 pcibios_bus_to_resource(dev, res, &region); 1092 pcibios_bus_to_resource(dev->bus, res, &region);
1093 } 1093 }
1094 if ((progif & 4) == 0) { 1094 if ((progif & 4) == 0) {
1095 region.start = 0x170; 1095 region.start = 0x170;
1096 region.end = 0x177; 1096 region.end = 0x177;
1097 res = &dev->resource[2]; 1097 res = &dev->resource[2];
1098 res->flags = LEGACY_IO_RESOURCE; 1098 res->flags = LEGACY_IO_RESOURCE;
1099 pcibios_bus_to_resource(dev, res, &region); 1099 pcibios_bus_to_resource(dev->bus, res, &region);
1100 region.start = 0x376; 1100 region.start = 0x376;
1101 region.end = 0x376; 1101 region.end = 0x376;
1102 res = &dev->resource[3]; 1102 res = &dev->resource[3];
1103 res->flags = LEGACY_IO_RESOURCE; 1103 res->flags = LEGACY_IO_RESOURCE;
1104 pcibios_bus_to_resource(dev, res, &region); 1104 pcibios_bus_to_resource(dev->bus, res, &region);
1105 } 1105 }
1106 } 1106 }
1107 break; 1107 break;