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authorHidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>2008-05-19 00:48:17 -0400
committerJesse Barnes <jbarnes@virtuousgeek.org>2008-06-10 13:59:49 -0400
commit5ca5c02f0e81c094c19d30dc0d13be4e929a994a (patch)
treeb014b51148dc378ce15c0daf81c19f03139dc01c /drivers/pci/msi.c
parentcf35e4ad57b4c39a4c74921e20e48ec0dbeb14f4 (diff)
PCI/MSI: skip calling pci_find_capability from msi_set_mask_bits
The position of MSI capability is already cached in the msi_desc when we enter the msi_set_mask_bits(). Use it instead. Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Acked-by: Arnaldo Carvalho de Melo <acme@redhat.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'drivers/pci/msi.c')
-rw-r--r--drivers/pci/msi.c12
1 files changed, 8 insertions, 4 deletions
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index 8c61304cbb37..ccb1974464fb 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -70,12 +70,10 @@ arch_teardown_msi_irqs(struct pci_dev *dev)
70 } 70 }
71} 71}
72 72
73static void msi_set_enable(struct pci_dev *dev, int enable) 73static void __msi_set_enable(struct pci_dev *dev, int pos, int enable)
74{ 74{
75 int pos;
76 u16 control; 75 u16 control;
77 76
78 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
79 if (pos) { 77 if (pos) {
80 pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control); 78 pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control);
81 control &= ~PCI_MSI_FLAGS_ENABLE; 79 control &= ~PCI_MSI_FLAGS_ENABLE;
@@ -85,6 +83,11 @@ static void msi_set_enable(struct pci_dev *dev, int enable)
85 } 83 }
86} 84}
87 85
86static void msi_set_enable(struct pci_dev *dev, int enable)
87{
88 __msi_set_enable(dev, pci_find_capability(dev, PCI_CAP_ID_MSI), enable);
89}
90
88static void msix_set_enable(struct pci_dev *dev, int enable) 91static void msix_set_enable(struct pci_dev *dev, int enable)
89{ 92{
90 int pos; 93 int pos;
@@ -141,7 +144,8 @@ static void msi_set_mask_bits(unsigned int irq, u32 mask, u32 flag)
141 mask_bits |= flag & mask; 144 mask_bits |= flag & mask;
142 pci_write_config_dword(entry->dev, pos, mask_bits); 145 pci_write_config_dword(entry->dev, pos, mask_bits);
143 } else { 146 } else {
144 msi_set_enable(entry->dev, !flag); 147 __msi_set_enable(entry->dev, entry->msi_attrib.pos,
148 !flag);
145 } 149 }
146 break; 150 break;
147 case PCI_CAP_ID_MSIX: 151 case PCI_CAP_ID_MSIX: