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authorYinghai Lu <yinghai@kernel.org>2010-04-08 14:58:23 -0400
committerDavid Woodhouse <David.Woodhouse@intel.com>2010-04-09 11:33:13 -0400
commit680a7524622356f5476e8fad2fe32b2b68b432c0 (patch)
treed0c3db810e627ef590ed3e9f952a80809990bf25 /drivers/pci/intel-iommu.c
parent5715f0f9d3814e83e5f2f754d3f7abdfa096a0b9 (diff)
intel-iommu: Print out iommu seq_id
more info on system with more than one IOMMU Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers/pci/intel-iommu.c')
-rw-r--r--drivers/pci/intel-iommu.c9
1 files changed, 6 insertions, 3 deletions
diff --git a/drivers/pci/intel-iommu.c b/drivers/pci/intel-iommu.c
index 9ce79b1bae83..da40f0789739 100644
--- a/drivers/pci/intel-iommu.c
+++ b/drivers/pci/intel-iommu.c
@@ -1150,7 +1150,8 @@ static int iommu_init_domains(struct intel_iommu *iommu)
1150 unsigned long nlongs; 1150 unsigned long nlongs;
1151 1151
1152 ndomains = cap_ndoms(iommu->cap); 1152 ndomains = cap_ndoms(iommu->cap);
1153 pr_debug("Number of Domains supportd <%ld>\n", ndomains); 1153 pr_debug("IOMMU %d: Number of Domains supportd <%ld>\n", iommu->seq_id,
1154 ndomains);
1154 nlongs = BITS_TO_LONGS(ndomains); 1155 nlongs = BITS_TO_LONGS(ndomains);
1155 1156
1156 spin_lock_init(&iommu->lock); 1157 spin_lock_init(&iommu->lock);
@@ -2319,14 +2320,16 @@ int __init init_dmars(void)
2319 */ 2320 */
2320 iommu->flush.flush_context = __iommu_flush_context; 2321 iommu->flush.flush_context = __iommu_flush_context;
2321 iommu->flush.flush_iotlb = __iommu_flush_iotlb; 2322 iommu->flush.flush_iotlb = __iommu_flush_iotlb;
2322 printk(KERN_INFO "IOMMU 0x%Lx: using Register based " 2323 printk(KERN_INFO "IOMMU %d 0x%Lx: using Register based "
2323 "invalidation\n", 2324 "invalidation\n",
2325 iommu->seq_id,
2324 (unsigned long long)drhd->reg_base_addr); 2326 (unsigned long long)drhd->reg_base_addr);
2325 } else { 2327 } else {
2326 iommu->flush.flush_context = qi_flush_context; 2328 iommu->flush.flush_context = qi_flush_context;
2327 iommu->flush.flush_iotlb = qi_flush_iotlb; 2329 iommu->flush.flush_iotlb = qi_flush_iotlb;
2328 printk(KERN_INFO "IOMMU 0x%Lx: using Queued " 2330 printk(KERN_INFO "IOMMU %d 0x%Lx: using Queued "
2329 "invalidation\n", 2331 "invalidation\n",
2332 iommu->seq_id,
2330 (unsigned long long)drhd->reg_base_addr); 2333 (unsigned long long)drhd->reg_base_addr);
2331 } 2334 }
2332 } 2335 }