diff options
| author | Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> | 2007-08-09 19:09:34 -0400 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@suse.de> | 2007-10-12 18:03:14 -0400 |
| commit | 71ad556dadcd303b4d32e9b890dcf1ccfbe9aeb3 (patch) | |
| tree | 46284af00c356644114752d3066dfbb905f77f32 /drivers/pci/hotplug | |
| parent | c8426483776d913c5bdc3d698a7633496a885b78 (diff) | |
pciehp: remove trailing whitespace from pciehp_hpc.c
Remove trailing whitespaces from pciehp_hpc.c.
Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/pci/hotplug')
| -rw-r--r-- | drivers/pci/hotplug/pciehp_hpc.c | 50 |
1 files changed, 25 insertions, 25 deletions
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c index f6143175de71..2e501f73c3b6 100644 --- a/drivers/pci/hotplug/pciehp_hpc.c +++ b/drivers/pci/hotplug/pciehp_hpc.c | |||
| @@ -129,10 +129,10 @@ static inline int pciehp_writel(struct controller *ctrl, int reg, u32 value) | |||
| 129 | /* Link Width Encoding */ | 129 | /* Link Width Encoding */ |
| 130 | #define LNK_X1 0x01 | 130 | #define LNK_X1 0x01 |
| 131 | #define LNK_X2 0x02 | 131 | #define LNK_X2 0x02 |
| 132 | #define LNK_X4 0x04 | 132 | #define LNK_X4 0x04 |
| 133 | #define LNK_X8 0x08 | 133 | #define LNK_X8 0x08 |
| 134 | #define LNK_X12 0x0C | 134 | #define LNK_X12 0x0C |
| 135 | #define LNK_X16 0x10 | 135 | #define LNK_X16 0x10 |
| 136 | #define LNK_X32 0x20 | 136 | #define LNK_X32 0x20 |
| 137 | 137 | ||
| 138 | /*Field definitions of Link Status Register */ | 138 | /*Field definitions of Link Status Register */ |
| @@ -262,7 +262,7 @@ static int pcie_write_cmd(struct slot *slot, u16 cmd, u16 mask) | |||
| 262 | goto out; | 262 | goto out; |
| 263 | } | 263 | } |
| 264 | 264 | ||
| 265 | if ((slot_status & CMD_COMPLETED) == CMD_COMPLETED ) { | 265 | if ((slot_status & CMD_COMPLETED) == CMD_COMPLETED ) { |
| 266 | /* After 1 sec and CMD_COMPLETED still not set, just | 266 | /* After 1 sec and CMD_COMPLETED still not set, just |
| 267 | proceed forward to issue the next command according | 267 | proceed forward to issue the next command according |
| 268 | to spec. Just print out the error message */ | 268 | to spec. Just print out the error message */ |
| @@ -310,7 +310,7 @@ static int hpc_check_lnk_status(struct controller *ctrl) | |||
| 310 | } | 310 | } |
| 311 | 311 | ||
| 312 | dbg("%s: lnk_status = %x\n", __FUNCTION__, lnk_status); | 312 | dbg("%s: lnk_status = %x\n", __FUNCTION__, lnk_status); |
| 313 | if ( (lnk_status & LNK_TRN) || (lnk_status & LNK_TRN_ERR) || | 313 | if ( (lnk_status & LNK_TRN) || (lnk_status & LNK_TRN_ERR) || |
| 314 | !(lnk_status & NEG_LINK_WD)) { | 314 | !(lnk_status & NEG_LINK_WD)) { |
| 315 | err("%s : Link Training Error occurs \n", __FUNCTION__); | 315 | err("%s : Link Training Error occurs \n", __FUNCTION__); |
| 316 | retval = -1; | 316 | retval = -1; |
| @@ -382,7 +382,7 @@ static int hpc_get_power_status(struct slot *slot, u8 *status) | |||
| 382 | *status = 1; | 382 | *status = 1; |
| 383 | break; | 383 | break; |
| 384 | case 1: | 384 | case 1: |
| 385 | *status = 0; | 385 | *status = 0; |
| 386 | break; | 386 | break; |
| 387 | default: | 387 | default: |
| 388 | *status = 0xFF; | 388 | *status = 0xFF; |
| @@ -405,7 +405,7 @@ static int hpc_get_latch_status(struct slot *slot, u8 *status) | |||
| 405 | return retval; | 405 | return retval; |
| 406 | } | 406 | } |
| 407 | 407 | ||
| 408 | *status = (((slot_status & MRL_STATE) >> 5) == 0) ? 0 : 1; | 408 | *status = (((slot_status & MRL_STATE) >> 5) == 0) ? 0 : 1; |
| 409 | 409 | ||
| 410 | return 0; | 410 | return 0; |
| 411 | } | 411 | } |
| @@ -441,7 +441,7 @@ static int hpc_query_power_fault(struct slot *slot) | |||
| 441 | return retval; | 441 | return retval; |
| 442 | } | 442 | } |
| 443 | pwr_fault = (u8)((slot_status & PWR_FAULT_DETECTED) >> 1); | 443 | pwr_fault = (u8)((slot_status & PWR_FAULT_DETECTED) >> 1); |
| 444 | 444 | ||
| 445 | return pwr_fault; | 445 | return pwr_fault; |
| 446 | } | 446 | } |
| 447 | 447 | ||
| @@ -509,7 +509,7 @@ static int hpc_set_attention_status(struct slot *slot, u8 value) | |||
| 509 | rc = pcie_write_cmd(slot, slot_cmd, cmd_mask); | 509 | rc = pcie_write_cmd(slot, slot_cmd, cmd_mask); |
| 510 | dbg("%s: SLOTCTRL %x write cmd %x\n", | 510 | dbg("%s: SLOTCTRL %x write cmd %x\n", |
| 511 | __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd); | 511 | __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd); |
| 512 | 512 | ||
| 513 | return rc; | 513 | return rc; |
| 514 | } | 514 | } |
| 515 | 515 | ||
| @@ -519,7 +519,7 @@ static void hpc_set_green_led_on(struct slot *slot) | |||
| 519 | struct controller *ctrl = slot->ctrl; | 519 | struct controller *ctrl = slot->ctrl; |
| 520 | u16 slot_cmd; | 520 | u16 slot_cmd; |
| 521 | u16 cmd_mask; | 521 | u16 cmd_mask; |
| 522 | 522 | ||
| 523 | slot_cmd = 0x0100; | 523 | slot_cmd = 0x0100; |
| 524 | cmd_mask = PWR_LED_CTRL; | 524 | cmd_mask = PWR_LED_CTRL; |
| 525 | if (!pciehp_poll_mode) { | 525 | if (!pciehp_poll_mode) { |
| @@ -556,7 +556,7 @@ static void hpc_set_green_led_blink(struct slot *slot) | |||
| 556 | struct controller *ctrl = slot->ctrl; | 556 | struct controller *ctrl = slot->ctrl; |
| 557 | u16 slot_cmd; | 557 | u16 slot_cmd; |
| 558 | u16 cmd_mask; | 558 | u16 cmd_mask; |
| 559 | 559 | ||
| 560 | slot_cmd = 0x0200; | 560 | slot_cmd = 0x0200; |
| 561 | cmd_mask = PWR_LED_CTRL; | 561 | cmd_mask = PWR_LED_CTRL; |
| 562 | if (!pciehp_poll_mode) { | 562 | if (!pciehp_poll_mode) { |
| @@ -736,7 +736,7 @@ static irqreturn_t pcie_isr(int irq, void *dev_id) | |||
| 736 | } | 736 | } |
| 737 | dbg("%s: pciehp_readw(SLOTSTATUS) with value %x\n", | 737 | dbg("%s: pciehp_readw(SLOTSTATUS) with value %x\n", |
| 738 | __FUNCTION__, slot_status); | 738 | __FUNCTION__, slot_status); |
| 739 | 739 | ||
| 740 | /* Clear command complete interrupt caused by this write */ | 740 | /* Clear command complete interrupt caused by this write */ |
| 741 | temp_word = 0x1f; | 741 | temp_word = 0x1f; |
| 742 | rc = pciehp_writew(ctrl, SLOTSTATUS, temp_word); | 742 | rc = pciehp_writew(ctrl, SLOTSTATUS, temp_word); |
| @@ -746,10 +746,10 @@ static irqreturn_t pcie_isr(int irq, void *dev_id) | |||
| 746 | return IRQ_NONE; | 746 | return IRQ_NONE; |
| 747 | } | 747 | } |
| 748 | } | 748 | } |
| 749 | 749 | ||
| 750 | if (intr_loc & CMD_COMPLETED) { | 750 | if (intr_loc & CMD_COMPLETED) { |
| 751 | /* | 751 | /* |
| 752 | * Command Complete Interrupt Pending | 752 | * Command Complete Interrupt Pending |
| 753 | */ | 753 | */ |
| 754 | ctrl->cmd_busy = 0; | 754 | ctrl->cmd_busy = 0; |
| 755 | wake_up_interruptible(&ctrl->queue); | 755 | wake_up_interruptible(&ctrl->queue); |
| @@ -803,7 +803,7 @@ static irqreturn_t pcie_isr(int irq, void *dev_id) | |||
| 803 | __FUNCTION__); | 803 | __FUNCTION__); |
| 804 | return IRQ_NONE; | 804 | return IRQ_NONE; |
| 805 | } | 805 | } |
| 806 | 806 | ||
| 807 | /* Clear command complete interrupt caused by this write */ | 807 | /* Clear command complete interrupt caused by this write */ |
| 808 | temp_word = 0x1F; | 808 | temp_word = 0x1F; |
| 809 | rc = pciehp_writew(ctrl, SLOTSTATUS, temp_word); | 809 | rc = pciehp_writew(ctrl, SLOTSTATUS, temp_word); |
| @@ -815,7 +815,7 @@ static irqreturn_t pcie_isr(int irq, void *dev_id) | |||
| 815 | dbg("%s: pciehp_writew(SLOTSTATUS) with value %x\n", | 815 | dbg("%s: pciehp_writew(SLOTSTATUS) with value %x\n", |
| 816 | __FUNCTION__, temp_word); | 816 | __FUNCTION__, temp_word); |
| 817 | } | 817 | } |
| 818 | 818 | ||
| 819 | return IRQ_HANDLED; | 819 | return IRQ_HANDLED; |
| 820 | } | 820 | } |
| 821 | 821 | ||
| @@ -936,7 +936,7 @@ static int hpc_get_cur_lnk_width (struct slot *slot, enum pcie_link_width *value | |||
| 936 | err("%s: Cannot read LNKSTATUS register\n", __FUNCTION__); | 936 | err("%s: Cannot read LNKSTATUS register\n", __FUNCTION__); |
| 937 | return retval; | 937 | return retval; |
| 938 | } | 938 | } |
| 939 | 939 | ||
| 940 | switch ((lnk_status & 0x03F0) >> 4){ | 940 | switch ((lnk_status & 0x03F0) >> 4){ |
| 941 | case 0: | 941 | case 0: |
| 942 | lnk_wdth = PCIE_LNK_WIDTH_RESRV; | 942 | lnk_wdth = PCIE_LNK_WIDTH_RESRV; |
| @@ -988,12 +988,12 @@ static struct hpc_ops pciehp_hpc_ops = { | |||
| 988 | .get_cur_bus_speed = hpc_get_cur_lnk_speed, | 988 | .get_cur_bus_speed = hpc_get_cur_lnk_speed, |
| 989 | .get_max_lnk_width = hpc_get_max_lnk_width, | 989 | .get_max_lnk_width = hpc_get_max_lnk_width, |
| 990 | .get_cur_lnk_width = hpc_get_cur_lnk_width, | 990 | .get_cur_lnk_width = hpc_get_cur_lnk_width, |
| 991 | 991 | ||
| 992 | .query_power_fault = hpc_query_power_fault, | 992 | .query_power_fault = hpc_query_power_fault, |
| 993 | .green_led_on = hpc_set_green_led_on, | 993 | .green_led_on = hpc_set_green_led_on, |
| 994 | .green_led_off = hpc_set_green_led_off, | 994 | .green_led_off = hpc_set_green_led_off, |
| 995 | .green_led_blink = hpc_set_green_led_blink, | 995 | .green_led_blink = hpc_set_green_led_blink, |
| 996 | 996 | ||
| 997 | .release_ctlr = hpc_release_ctlr, | 997 | .release_ctlr = hpc_release_ctlr, |
| 998 | .check_lnk_status = hpc_check_lnk_status, | 998 | .check_lnk_status = hpc_check_lnk_status, |
| 999 | }; | 999 | }; |
| @@ -1144,7 +1144,7 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev) | |||
| 1144 | (unsigned long long)pci_resource_start(pdev, rc), | 1144 | (unsigned long long)pci_resource_start(pdev, rc), |
| 1145 | (unsigned long long)pci_resource_len(pdev, rc)); | 1145 | (unsigned long long)pci_resource_len(pdev, rc)); |
| 1146 | 1146 | ||
| 1147 | info("HPC vendor_id %x device_id %x ss_vid %x ss_did %x\n", pdev->vendor, pdev->device, | 1147 | info("HPC vendor_id %x device_id %x ss_vid %x ss_did %x\n", pdev->vendor, pdev->device, |
| 1148 | pdev->subsystem_vendor, pdev->subsystem_device); | 1148 | pdev->subsystem_vendor, pdev->subsystem_device); |
| 1149 | 1149 | ||
| 1150 | mutex_init(&ctrl->crit_sect); | 1150 | mutex_init(&ctrl->crit_sect); |
| @@ -1232,14 +1232,14 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev) | |||
| 1232 | 1232 | ||
| 1233 | if (ATTN_BUTTN(slot_cap)) | 1233 | if (ATTN_BUTTN(slot_cap)) |
| 1234 | intr_enable = intr_enable | ATTN_BUTTN_ENABLE; | 1234 | intr_enable = intr_enable | ATTN_BUTTN_ENABLE; |
| 1235 | 1235 | ||
| 1236 | if (POWER_CTRL(slot_cap)) | 1236 | if (POWER_CTRL(slot_cap)) |
| 1237 | intr_enable = intr_enable | PWR_FAULT_DETECT_ENABLE; | 1237 | intr_enable = intr_enable | PWR_FAULT_DETECT_ENABLE; |
| 1238 | 1238 | ||
| 1239 | if (MRL_SENS(slot_cap)) | 1239 | if (MRL_SENS(slot_cap)) |
| 1240 | intr_enable = intr_enable | MRL_DETECT_ENABLE; | 1240 | intr_enable = intr_enable | MRL_DETECT_ENABLE; |
| 1241 | 1241 | ||
| 1242 | temp_word = (temp_word & ~intr_enable) | intr_enable; | 1242 | temp_word = (temp_word & ~intr_enable) | intr_enable; |
| 1243 | 1243 | ||
| 1244 | if (pciehp_poll_mode) { | 1244 | if (pciehp_poll_mode) { |
| 1245 | temp_word = (temp_word & ~HP_INTR_ENABLE) | 0x0; | 1245 | temp_word = (temp_word & ~HP_INTR_ENABLE) | 0x0; |
| @@ -1258,14 +1258,14 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev) | |||
| 1258 | err("%s: Cannot read SLOTSTATUS register\n", __FUNCTION__); | 1258 | err("%s: Cannot read SLOTSTATUS register\n", __FUNCTION__); |
| 1259 | goto abort_disable_intr; | 1259 | goto abort_disable_intr; |
| 1260 | } | 1260 | } |
| 1261 | 1261 | ||
| 1262 | temp_word = 0x1F; /* Clear all events */ | 1262 | temp_word = 0x1F; /* Clear all events */ |
| 1263 | rc = pciehp_writew(ctrl, SLOTSTATUS, temp_word); | 1263 | rc = pciehp_writew(ctrl, SLOTSTATUS, temp_word); |
| 1264 | if (rc) { | 1264 | if (rc) { |
| 1265 | err("%s: Cannot write to SLOTSTATUS register\n", __FUNCTION__); | 1265 | err("%s: Cannot write to SLOTSTATUS register\n", __FUNCTION__); |
| 1266 | goto abort_disable_intr; | 1266 | goto abort_disable_intr; |
| 1267 | } | 1267 | } |
| 1268 | 1268 | ||
| 1269 | if (pciehp_force) { | 1269 | if (pciehp_force) { |
| 1270 | dbg("Bypassing BIOS check for pciehp use on %s\n", | 1270 | dbg("Bypassing BIOS check for pciehp use on %s\n", |
| 1271 | pci_name(ctrl->pci_dev)); | 1271 | pci_name(ctrl->pci_dev)); |
