diff options
author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-10-12 18:50:23 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-10-12 18:50:23 -0400 |
commit | 6a84258e5f5bb8b9bd72e06a5837fa6fdacaf5c5 (patch) | |
tree | 3c4911a489c85e908b0ef3ed83d78264788f858c /drivers/pci/hotplug | |
parent | efefc6eb38d43b8e5daef482f575d767b002004e (diff) | |
parent | f3e6f164c2389853432454c89b316a8ab7485e2f (diff) |
Merge master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6: (37 commits)
PCI: merge almost all of pci_32.h and pci_64.h together
PCI: X86: Introduce and enable PCI domain support
PCI: Add 'nodomains' boot option, and pci_domains_supported global
PCI: modify PCI bridge control ISA flag for clarity
PCI: use _CRS for PCI resource allocation
PCI: avoid P2P prefetch window for expansion ROMs
PCI: skip ISA ioresource alignment on some systems
PCI: remove transparent bridge sizing
pci: write file size to inode on proc bus file write
pci: use size stored in proc_dir_entry for proc bus files
pci: implement "pci=noaer"
PCI: fix IDE legacy mode resources
MSI: Use correct data offset for 32-bit MSI in read_msi_msg()
PCI: Fix incorrect argument order to list_add_tail() in PCI dynamic ID code
PCI: i386: Compaq EVO N800c needs PCI bus renumbering
PCI: Remove no longer correct documentation regarding MSI vector assignment
PCI: re-enable onboard sound on "MSI K8T Neo2-FIR"
PCI: quirk_vt82c586_acpi: Omit reading PCI revision ID
PCI: quirk amd_8131_mmrbc: Omit reading pci revision ID
cpqphp: Use PCI_CLASS_REVISION instead of PCI_REVISION_ID for read
...
Diffstat (limited to 'drivers/pci/hotplug')
-rw-r--r-- | drivers/pci/hotplug/cpqphp_core.c | 2 | ||||
-rw-r--r-- | drivers/pci/hotplug/cpqphp_ctrl.c | 74 | ||||
-rw-r--r-- | drivers/pci/hotplug/ibmphp_hpc.c | 57 | ||||
-rw-r--r-- | drivers/pci/hotplug/pciehp_core.c | 24 | ||||
-rw-r--r-- | drivers/pci/hotplug/pciehp_ctrl.c | 20 | ||||
-rw-r--r-- | drivers/pci/hotplug/pciehp_hpc.c | 203 | ||||
-rw-r--r-- | drivers/pci/hotplug/pciehp_pci.c | 24 |
7 files changed, 124 insertions, 280 deletions
diff --git a/drivers/pci/hotplug/cpqphp_core.c b/drivers/pci/hotplug/cpqphp_core.c index 2305cc450a45..a96b739b2d35 100644 --- a/drivers/pci/hotplug/cpqphp_core.c +++ b/drivers/pci/hotplug/cpqphp_core.c | |||
@@ -549,7 +549,7 @@ get_slot_mapping(struct pci_bus *bus, u8 bus_num, u8 dev_num, u8 *slot) | |||
549 | * slot. */ | 549 | * slot. */ |
550 | bus->number = tbus; | 550 | bus->number = tbus; |
551 | pci_bus_read_config_dword(bus, PCI_DEVFN(tdevice, 0), | 551 | pci_bus_read_config_dword(bus, PCI_DEVFN(tdevice, 0), |
552 | PCI_REVISION_ID, &work); | 552 | PCI_CLASS_REVISION, &work); |
553 | 553 | ||
554 | if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) { | 554 | if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) { |
555 | pci_bus_read_config_dword(bus, | 555 | pci_bus_read_config_dword(bus, |
diff --git a/drivers/pci/hotplug/cpqphp_ctrl.c b/drivers/pci/hotplug/cpqphp_ctrl.c index 37d72f123a80..3ef0a4875a62 100644 --- a/drivers/pci/hotplug/cpqphp_ctrl.c +++ b/drivers/pci/hotplug/cpqphp_ctrl.c | |||
@@ -37,6 +37,7 @@ | |||
37 | #include <linux/smp_lock.h> | 37 | #include <linux/smp_lock.h> |
38 | #include <linux/pci.h> | 38 | #include <linux/pci.h> |
39 | #include <linux/pci_hotplug.h> | 39 | #include <linux/pci_hotplug.h> |
40 | #include <linux/kthread.h> | ||
40 | #include "cpqphp.h" | 41 | #include "cpqphp.h" |
41 | 42 | ||
42 | static u32 configure_new_device(struct controller* ctrl, struct pci_func *func, | 43 | static u32 configure_new_device(struct controller* ctrl, struct pci_func *func, |
@@ -45,34 +46,20 @@ static int configure_new_function(struct controller* ctrl, struct pci_func *func | |||
45 | u8 behind_bridge, struct resource_lists *resources); | 46 | u8 behind_bridge, struct resource_lists *resources); |
46 | static void interrupt_event_handler(struct controller *ctrl); | 47 | static void interrupt_event_handler(struct controller *ctrl); |
47 | 48 | ||
48 | static struct semaphore event_semaphore; /* mutex for process loop (up if something to process) */ | ||
49 | static struct semaphore event_exit; /* guard ensure thread has exited before calling it quits */ | ||
50 | static int event_finished; | ||
51 | static unsigned long pushbutton_pending; /* = 0 */ | ||
52 | 49 | ||
53 | /* things needed for the long_delay function */ | 50 | static struct task_struct *cpqhp_event_thread; |
54 | static struct semaphore delay_sem; | 51 | static unsigned long pushbutton_pending; /* = 0 */ |
55 | static wait_queue_head_t delay_wait; | ||
56 | 52 | ||
57 | /* delay is in jiffies to wait for */ | 53 | /* delay is in jiffies to wait for */ |
58 | static void long_delay(int delay) | 54 | static void long_delay(int delay) |
59 | { | 55 | { |
60 | DECLARE_WAITQUEUE(wait, current); | 56 | /* |
61 | 57 | * XXX(hch): if someone is bored please convert all callers | |
62 | /* only allow 1 customer into the delay queue at once | 58 | * to call msleep_interruptible directly. They really want |
63 | * yes this makes some people wait even longer, but who really cares? | 59 | * to specify timeouts in natural units and spend a lot of |
64 | * this is for _huge_ delays to make the hardware happy as the | 60 | * effort converting them to jiffies.. |
65 | * signals bounce around | ||
66 | */ | 61 | */ |
67 | down (&delay_sem); | ||
68 | |||
69 | init_waitqueue_head(&delay_wait); | ||
70 | |||
71 | add_wait_queue(&delay_wait, &wait); | ||
72 | msleep_interruptible(jiffies_to_msecs(delay)); | 62 | msleep_interruptible(jiffies_to_msecs(delay)); |
73 | remove_wait_queue(&delay_wait, &wait); | ||
74 | |||
75 | up(&delay_sem); | ||
76 | } | 63 | } |
77 | 64 | ||
78 | 65 | ||
@@ -955,8 +942,8 @@ irqreturn_t cpqhp_ctrl_intr(int IRQ, void *data) | |||
955 | } | 942 | } |
956 | 943 | ||
957 | if (schedule_flag) { | 944 | if (schedule_flag) { |
958 | up(&event_semaphore); | 945 | wake_up_process(cpqhp_event_thread); |
959 | dbg("Signal event_semaphore\n"); | 946 | dbg("Waking even thread"); |
960 | } | 947 | } |
961 | return IRQ_HANDLED; | 948 | return IRQ_HANDLED; |
962 | } | 949 | } |
@@ -973,16 +960,13 @@ struct pci_func *cpqhp_slot_create(u8 busnumber) | |||
973 | struct pci_func *new_slot; | 960 | struct pci_func *new_slot; |
974 | struct pci_func *next; | 961 | struct pci_func *next; |
975 | 962 | ||
976 | new_slot = kmalloc(sizeof(*new_slot), GFP_KERNEL); | 963 | new_slot = kzalloc(sizeof(*new_slot), GFP_KERNEL); |
977 | |||
978 | if (new_slot == NULL) { | 964 | if (new_slot == NULL) { |
979 | /* I'm not dead yet! | 965 | /* I'm not dead yet! |
980 | * You will be. */ | 966 | * You will be. */ |
981 | return new_slot; | 967 | return new_slot; |
982 | } | 968 | } |
983 | 969 | ||
984 | memset(new_slot, 0, sizeof(struct pci_func)); | ||
985 | |||
986 | new_slot->next = NULL; | 970 | new_slot->next = NULL; |
987 | new_slot->configured = 1; | 971 | new_slot->configured = 1; |
988 | 972 | ||
@@ -1738,7 +1722,7 @@ static u32 remove_board(struct pci_func * func, u32 replace_flag, struct control | |||
1738 | static void pushbutton_helper_thread(unsigned long data) | 1722 | static void pushbutton_helper_thread(unsigned long data) |
1739 | { | 1723 | { |
1740 | pushbutton_pending = data; | 1724 | pushbutton_pending = data; |
1741 | up(&event_semaphore); | 1725 | wake_up_process(cpqhp_event_thread); |
1742 | } | 1726 | } |
1743 | 1727 | ||
1744 | 1728 | ||
@@ -1747,13 +1731,13 @@ static int event_thread(void* data) | |||
1747 | { | 1731 | { |
1748 | struct controller *ctrl; | 1732 | struct controller *ctrl; |
1749 | 1733 | ||
1750 | daemonize("phpd_event"); | ||
1751 | |||
1752 | while (1) { | 1734 | while (1) { |
1753 | dbg("!!!!event_thread sleeping\n"); | 1735 | dbg("!!!!event_thread sleeping\n"); |
1754 | down_interruptible (&event_semaphore); | 1736 | set_current_state(TASK_INTERRUPTIBLE); |
1755 | dbg("event_thread woken finished = %d\n", event_finished); | 1737 | schedule(); |
1756 | if (event_finished) break; | 1738 | |
1739 | if (kthread_should_stop()) | ||
1740 | break; | ||
1757 | /* Do stuff here */ | 1741 | /* Do stuff here */ |
1758 | if (pushbutton_pending) | 1742 | if (pushbutton_pending) |
1759 | cpqhp_pushbutton_thread(pushbutton_pending); | 1743 | cpqhp_pushbutton_thread(pushbutton_pending); |
@@ -1762,38 +1746,24 @@ static int event_thread(void* data) | |||
1762 | interrupt_event_handler(ctrl); | 1746 | interrupt_event_handler(ctrl); |
1763 | } | 1747 | } |
1764 | dbg("event_thread signals exit\n"); | 1748 | dbg("event_thread signals exit\n"); |
1765 | up(&event_exit); | ||
1766 | return 0; | 1749 | return 0; |
1767 | } | 1750 | } |
1768 | 1751 | ||
1769 | |||
1770 | int cpqhp_event_start_thread(void) | 1752 | int cpqhp_event_start_thread(void) |
1771 | { | 1753 | { |
1772 | int pid; | 1754 | cpqhp_event_thread = kthread_run(event_thread, NULL, "phpd_event"); |
1773 | 1755 | if (IS_ERR(cpqhp_event_thread)) { | |
1774 | /* initialize our semaphores */ | ||
1775 | init_MUTEX(&delay_sem); | ||
1776 | init_MUTEX_LOCKED(&event_semaphore); | ||
1777 | init_MUTEX_LOCKED(&event_exit); | ||
1778 | event_finished=0; | ||
1779 | |||
1780 | pid = kernel_thread(event_thread, NULL, 0); | ||
1781 | if (pid < 0) { | ||
1782 | err ("Can't start up our event thread\n"); | 1756 | err ("Can't start up our event thread\n"); |
1783 | return -1; | 1757 | return PTR_ERR(cpqhp_event_thread); |
1784 | } | 1758 | } |
1785 | dbg("Our event thread pid = %d\n", pid); | 1759 | |
1786 | return 0; | 1760 | return 0; |
1787 | } | 1761 | } |
1788 | 1762 | ||
1789 | 1763 | ||
1790 | void cpqhp_event_stop_thread(void) | 1764 | void cpqhp_event_stop_thread(void) |
1791 | { | 1765 | { |
1792 | event_finished = 1; | 1766 | kthread_stop(cpqhp_event_thread); |
1793 | dbg("event_thread finish command given\n"); | ||
1794 | up(&event_semaphore); | ||
1795 | dbg("wait for event_thread to exit\n"); | ||
1796 | down(&event_exit); | ||
1797 | } | 1767 | } |
1798 | 1768 | ||
1799 | 1769 | ||
diff --git a/drivers/pci/hotplug/ibmphp_hpc.c b/drivers/pci/hotplug/ibmphp_hpc.c index d06ccb69e411..c31e7bf34502 100644 --- a/drivers/pci/hotplug/ibmphp_hpc.c +++ b/drivers/pci/hotplug/ibmphp_hpc.c | |||
@@ -35,7 +35,7 @@ | |||
35 | #include <linux/init.h> | 35 | #include <linux/init.h> |
36 | #include <linux/mutex.h> | 36 | #include <linux/mutex.h> |
37 | #include <linux/sched.h> | 37 | #include <linux/sched.h> |
38 | 38 | #include <linux/kthread.h> | |
39 | #include "ibmphp.h" | 39 | #include "ibmphp.h" |
40 | 40 | ||
41 | static int to_debug = 0; | 41 | static int to_debug = 0; |
@@ -101,12 +101,11 @@ static int to_debug = 0; | |||
101 | //---------------------------------------------------------------------------- | 101 | //---------------------------------------------------------------------------- |
102 | // global variables | 102 | // global variables |
103 | //---------------------------------------------------------------------------- | 103 | //---------------------------------------------------------------------------- |
104 | static int ibmphp_shutdown; | ||
105 | static int tid_poll; | ||
106 | static struct mutex sem_hpcaccess; // lock access to HPC | 104 | static struct mutex sem_hpcaccess; // lock access to HPC |
107 | static struct semaphore semOperations; // lock all operations and | 105 | static struct semaphore semOperations; // lock all operations and |
108 | // access to data structures | 106 | // access to data structures |
109 | static struct semaphore sem_exit; // make sure polling thread goes away | 107 | static struct semaphore sem_exit; // make sure polling thread goes away |
108 | static struct task_struct *ibmphp_poll_thread; | ||
110 | //---------------------------------------------------------------------------- | 109 | //---------------------------------------------------------------------------- |
111 | // local function prototypes | 110 | // local function prototypes |
112 | //---------------------------------------------------------------------------- | 111 | //---------------------------------------------------------------------------- |
@@ -116,10 +115,9 @@ static u8 hpc_writecmdtoindex (u8, u8); | |||
116 | static u8 hpc_readcmdtoindex (u8, u8); | 115 | static u8 hpc_readcmdtoindex (u8, u8); |
117 | static void get_hpc_access (void); | 116 | static void get_hpc_access (void); |
118 | static void free_hpc_access (void); | 117 | static void free_hpc_access (void); |
119 | static void poll_hpc (void); | 118 | static int poll_hpc(void *data); |
120 | static int process_changeinstatus (struct slot *, struct slot *); | 119 | static int process_changeinstatus (struct slot *, struct slot *); |
121 | static int process_changeinlatch (u8, u8, struct controller *); | 120 | static int process_changeinlatch (u8, u8, struct controller *); |
122 | static int hpc_poll_thread (void *); | ||
123 | static int hpc_wait_ctlr_notworking (int, struct controller *, void __iomem *, u8 *); | 121 | static int hpc_wait_ctlr_notworking (int, struct controller *, void __iomem *, u8 *); |
124 | //---------------------------------------------------------------------------- | 122 | //---------------------------------------------------------------------------- |
125 | 123 | ||
@@ -137,8 +135,6 @@ void __init ibmphp_hpc_initvars (void) | |||
137 | init_MUTEX (&semOperations); | 135 | init_MUTEX (&semOperations); |
138 | init_MUTEX_LOCKED (&sem_exit); | 136 | init_MUTEX_LOCKED (&sem_exit); |
139 | to_debug = 0; | 137 | to_debug = 0; |
140 | ibmphp_shutdown = 0; | ||
141 | tid_poll = 0; | ||
142 | 138 | ||
143 | debug ("%s - Exit\n", __FUNCTION__); | 139 | debug ("%s - Exit\n", __FUNCTION__); |
144 | } | 140 | } |
@@ -819,7 +815,7 @@ void ibmphp_unlock_operations (void) | |||
819 | #define POLL_LATCH_REGISTER 0 | 815 | #define POLL_LATCH_REGISTER 0 |
820 | #define POLL_SLOTS 1 | 816 | #define POLL_SLOTS 1 |
821 | #define POLL_SLEEP 2 | 817 | #define POLL_SLEEP 2 |
822 | static void poll_hpc (void) | 818 | static int poll_hpc(void *data) |
823 | { | 819 | { |
824 | struct slot myslot; | 820 | struct slot myslot; |
825 | struct slot *pslot = NULL; | 821 | struct slot *pslot = NULL; |
@@ -833,10 +829,7 @@ static void poll_hpc (void) | |||
833 | 829 | ||
834 | debug ("%s - Entry\n", __FUNCTION__); | 830 | debug ("%s - Entry\n", __FUNCTION__); |
835 | 831 | ||
836 | while (!ibmphp_shutdown) { | 832 | while (!kthread_should_stop()) { |
837 | if (ibmphp_shutdown) | ||
838 | break; | ||
839 | |||
840 | /* try to get the lock to do some kind of hardware access */ | 833 | /* try to get the lock to do some kind of hardware access */ |
841 | down (&semOperations); | 834 | down (&semOperations); |
842 | 835 | ||
@@ -896,7 +889,7 @@ static void poll_hpc (void) | |||
896 | up (&semOperations); | 889 | up (&semOperations); |
897 | msleep(POLL_INTERVAL_SEC * 1000); | 890 | msleep(POLL_INTERVAL_SEC * 1000); |
898 | 891 | ||
899 | if (ibmphp_shutdown) | 892 | if (kthread_should_stop()) |
900 | break; | 893 | break; |
901 | 894 | ||
902 | down (&semOperations); | 895 | down (&semOperations); |
@@ -915,6 +908,7 @@ static void poll_hpc (void) | |||
915 | } | 908 | } |
916 | up (&sem_exit); | 909 | up (&sem_exit); |
917 | debug ("%s - Exit\n", __FUNCTION__); | 910 | debug ("%s - Exit\n", __FUNCTION__); |
911 | return 0; | ||
918 | } | 912 | } |
919 | 913 | ||
920 | 914 | ||
@@ -1050,47 +1044,20 @@ static int process_changeinlatch (u8 old, u8 new, struct controller *ctrl) | |||
1050 | } | 1044 | } |
1051 | 1045 | ||
1052 | /*---------------------------------------------------------------------- | 1046 | /*---------------------------------------------------------------------- |
1053 | * Name: hpc_poll_thread | ||
1054 | * | ||
1055 | * Action: polling | ||
1056 | * | ||
1057 | * Return 0 | ||
1058 | * Value: | ||
1059 | *---------------------------------------------------------------------*/ | ||
1060 | static int hpc_poll_thread (void *data) | ||
1061 | { | ||
1062 | debug ("%s - Entry\n", __FUNCTION__); | ||
1063 | |||
1064 | daemonize("hpc_poll"); | ||
1065 | allow_signal(SIGKILL); | ||
1066 | |||
1067 | poll_hpc (); | ||
1068 | |||
1069 | tid_poll = 0; | ||
1070 | debug ("%s - Exit\n", __FUNCTION__); | ||
1071 | return 0; | ||
1072 | } | ||
1073 | |||
1074 | |||
1075 | /*---------------------------------------------------------------------- | ||
1076 | * Name: ibmphp_hpc_start_poll_thread | 1047 | * Name: ibmphp_hpc_start_poll_thread |
1077 | * | 1048 | * |
1078 | * Action: start polling thread | 1049 | * Action: start polling thread |
1079 | *---------------------------------------------------------------------*/ | 1050 | *---------------------------------------------------------------------*/ |
1080 | int __init ibmphp_hpc_start_poll_thread (void) | 1051 | int __init ibmphp_hpc_start_poll_thread (void) |
1081 | { | 1052 | { |
1082 | int rc = 0; | ||
1083 | |||
1084 | debug ("%s - Entry\n", __FUNCTION__); | 1053 | debug ("%s - Entry\n", __FUNCTION__); |
1085 | 1054 | ||
1086 | tid_poll = kernel_thread (hpc_poll_thread, NULL, 0); | 1055 | ibmphp_poll_thread = kthread_run(poll_hpc, NULL, "hpc_poll"); |
1087 | if (tid_poll < 0) { | 1056 | if (IS_ERR(ibmphp_poll_thread)) { |
1088 | err ("%s - Error, thread not started\n", __FUNCTION__); | 1057 | err ("%s - Error, thread not started\n", __FUNCTION__); |
1089 | rc = -1; | 1058 | return PTR_ERR(ibmphp_poll_thread); |
1090 | } | 1059 | } |
1091 | 1060 | return 0; | |
1092 | debug ("%s - Exit tid_poll[%d] rc[%d]\n", __FUNCTION__, tid_poll, rc); | ||
1093 | return rc; | ||
1094 | } | 1061 | } |
1095 | 1062 | ||
1096 | /*---------------------------------------------------------------------- | 1063 | /*---------------------------------------------------------------------- |
@@ -1102,7 +1069,7 @@ void __exit ibmphp_hpc_stop_poll_thread (void) | |||
1102 | { | 1069 | { |
1103 | debug ("%s - Entry\n", __FUNCTION__); | 1070 | debug ("%s - Entry\n", __FUNCTION__); |
1104 | 1071 | ||
1105 | ibmphp_shutdown = 1; | 1072 | kthread_stop(ibmphp_poll_thread); |
1106 | debug ("before locking operations \n"); | 1073 | debug ("before locking operations \n"); |
1107 | ibmphp_lock_operations (); | 1074 | ibmphp_lock_operations (); |
1108 | debug ("after locking operations \n"); | 1075 | debug ("after locking operations \n"); |
diff --git a/drivers/pci/hotplug/pciehp_core.c b/drivers/pci/hotplug/pciehp_core.c index e5d3f0b4f45a..6462ac3b405f 100644 --- a/drivers/pci/hotplug/pciehp_core.c +++ b/drivers/pci/hotplug/pciehp_core.c | |||
@@ -304,8 +304,8 @@ static int set_attention_status(struct hotplug_slot *hotplug_slot, u8 status) | |||
304 | dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name); | 304 | dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name); |
305 | 305 | ||
306 | hotplug_slot->info->attention_status = status; | 306 | hotplug_slot->info->attention_status = status; |
307 | 307 | ||
308 | if (ATTN_LED(slot->ctrl->ctrlcap)) | 308 | if (ATTN_LED(slot->ctrl->ctrlcap)) |
309 | slot->hpc_ops->set_attention_status(slot, status); | 309 | slot->hpc_ops->set_attention_status(slot, status); |
310 | 310 | ||
311 | return 0; | 311 | return 0; |
@@ -405,7 +405,7 @@ static int get_max_bus_speed(struct hotplug_slot *hotplug_slot, enum pci_bus_spe | |||
405 | int retval; | 405 | int retval; |
406 | 406 | ||
407 | dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name); | 407 | dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name); |
408 | 408 | ||
409 | retval = slot->hpc_ops->get_max_bus_speed(slot, value); | 409 | retval = slot->hpc_ops->get_max_bus_speed(slot, value); |
410 | if (retval < 0) | 410 | if (retval < 0) |
411 | *value = PCI_SPEED_UNKNOWN; | 411 | *value = PCI_SPEED_UNKNOWN; |
@@ -419,7 +419,7 @@ static int get_cur_bus_speed(struct hotplug_slot *hotplug_slot, enum pci_bus_spe | |||
419 | int retval; | 419 | int retval; |
420 | 420 | ||
421 | dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name); | 421 | dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name); |
422 | 422 | ||
423 | retval = slot->hpc_ops->get_cur_bus_speed(slot, value); | 423 | retval = slot->hpc_ops->get_cur_bus_speed(slot, value); |
424 | if (retval < 0) | 424 | if (retval < 0) |
425 | *value = PCI_SPEED_UNKNOWN; | 425 | *value = PCI_SPEED_UNKNOWN; |
@@ -434,7 +434,7 @@ static int pciehp_probe(struct pcie_device *dev, const struct pcie_port_service_ | |||
434 | struct slot *t_slot; | 434 | struct slot *t_slot; |
435 | u8 value; | 435 | u8 value; |
436 | struct pci_dev *pdev; | 436 | struct pci_dev *pdev; |
437 | 437 | ||
438 | ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL); | 438 | ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL); |
439 | if (!ctrl) { | 439 | if (!ctrl) { |
440 | err("%s : out of memory\n", __FUNCTION__); | 440 | err("%s : out of memory\n", __FUNCTION__); |
@@ -502,23 +502,23 @@ static void pciehp_remove (struct pcie_device *dev) | |||
502 | #ifdef CONFIG_PM | 502 | #ifdef CONFIG_PM |
503 | static int pciehp_suspend (struct pcie_device *dev, pm_message_t state) | 503 | static int pciehp_suspend (struct pcie_device *dev, pm_message_t state) |
504 | { | 504 | { |
505 | printk("%s ENTRY\n", __FUNCTION__); | 505 | printk("%s ENTRY\n", __FUNCTION__); |
506 | return 0; | 506 | return 0; |
507 | } | 507 | } |
508 | 508 | ||
509 | static int pciehp_resume (struct pcie_device *dev) | 509 | static int pciehp_resume (struct pcie_device *dev) |
510 | { | 510 | { |
511 | printk("%s ENTRY\n", __FUNCTION__); | 511 | printk("%s ENTRY\n", __FUNCTION__); |
512 | return 0; | 512 | return 0; |
513 | } | 513 | } |
514 | #endif | 514 | #endif |
515 | 515 | ||
516 | static struct pcie_port_service_id port_pci_ids[] = { { | 516 | static struct pcie_port_service_id port_pci_ids[] = { { |
517 | .vendor = PCI_ANY_ID, | 517 | .vendor = PCI_ANY_ID, |
518 | .device = PCI_ANY_ID, | 518 | .device = PCI_ANY_ID, |
519 | .port_type = PCIE_ANY_PORT, | 519 | .port_type = PCIE_ANY_PORT, |
520 | .service_type = PCIE_PORT_SERVICE_HP, | 520 | .service_type = PCIE_PORT_SERVICE_HP, |
521 | .driver_data = 0, | 521 | .driver_data = 0, |
522 | }, { /* end: all zeroes */ } | 522 | }, { /* end: all zeroes */ } |
523 | }; | 523 | }; |
524 | static const char device_name[] = "hpdriver"; | 524 | static const char device_name[] = "hpdriver"; |
@@ -540,10 +540,6 @@ static int __init pcied_init(void) | |||
540 | { | 540 | { |
541 | int retval = 0; | 541 | int retval = 0; |
542 | 542 | ||
543 | #ifdef CONFIG_HOTPLUG_PCI_PCIE_POLL_EVENT_MODE | ||
544 | pciehp_poll_mode = 1; | ||
545 | #endif | ||
546 | |||
547 | retval = pcie_port_service_register(&hpdriver_portdrv); | 543 | retval = pcie_port_service_register(&hpdriver_portdrv); |
548 | dbg("pcie_port_service_register = %d\n", retval); | 544 | dbg("pcie_port_service_register = %d\n", retval); |
549 | info(DRIVER_DESC " version: " DRIVER_VERSION "\n"); | 545 | info(DRIVER_DESC " version: " DRIVER_VERSION "\n"); |
diff --git a/drivers/pci/hotplug/pciehp_ctrl.c b/drivers/pci/hotplug/pciehp_ctrl.c index 98e541ffef3d..c8cb49c5a752 100644 --- a/drivers/pci/hotplug/pciehp_ctrl.c +++ b/drivers/pci/hotplug/pciehp_ctrl.c | |||
@@ -173,7 +173,7 @@ u8 pciehp_handle_power_fault(u8 hp_slot, struct controller *ctrl) | |||
173 | return 1; | 173 | return 1; |
174 | } | 174 | } |
175 | 175 | ||
176 | /* The following routines constitute the bulk of the | 176 | /* The following routines constitute the bulk of the |
177 | hotplug controller logic | 177 | hotplug controller logic |
178 | */ | 178 | */ |
179 | 179 | ||
@@ -181,7 +181,7 @@ static void set_slot_off(struct controller *ctrl, struct slot * pslot) | |||
181 | { | 181 | { |
182 | /* turn off slot, turn on Amber LED, turn off Green LED if supported*/ | 182 | /* turn off slot, turn on Amber LED, turn off Green LED if supported*/ |
183 | if (POWER_CTRL(ctrl->ctrlcap)) { | 183 | if (POWER_CTRL(ctrl->ctrlcap)) { |
184 | if (pslot->hpc_ops->power_off_slot(pslot)) { | 184 | if (pslot->hpc_ops->power_off_slot(pslot)) { |
185 | err("%s: Issue of Slot Power Off command failed\n", | 185 | err("%s: Issue of Slot Power Off command failed\n", |
186 | __FUNCTION__); | 186 | __FUNCTION__); |
187 | return; | 187 | return; |
@@ -189,7 +189,7 @@ static void set_slot_off(struct controller *ctrl, struct slot * pslot) | |||
189 | } | 189 | } |
190 | 190 | ||
191 | if (PWR_LED(ctrl->ctrlcap)) | 191 | if (PWR_LED(ctrl->ctrlcap)) |
192 | pslot->hpc_ops->green_led_off(pslot); | 192 | pslot->hpc_ops->green_led_off(pslot); |
193 | 193 | ||
194 | if (ATTN_LED(ctrl->ctrlcap)) { | 194 | if (ATTN_LED(ctrl->ctrlcap)) { |
195 | if (pslot->hpc_ops->set_attention_status(pslot, 1)) { | 195 | if (pslot->hpc_ops->set_attention_status(pslot, 1)) { |
@@ -231,7 +231,7 @@ static int board_added(struct slot *p_slot) | |||
231 | if (retval) | 231 | if (retval) |
232 | return retval; | 232 | return retval; |
233 | } | 233 | } |
234 | 234 | ||
235 | if (PWR_LED(ctrl->ctrlcap)) | 235 | if (PWR_LED(ctrl->ctrlcap)) |
236 | p_slot->hpc_ops->green_led_blink(p_slot); | 236 | p_slot->hpc_ops->green_led_blink(p_slot); |
237 | 237 | ||
@@ -548,7 +548,7 @@ int pciehp_enable_slot(struct slot *p_slot) | |||
548 | mutex_unlock(&p_slot->ctrl->crit_sect); | 548 | mutex_unlock(&p_slot->ctrl->crit_sect); |
549 | return -ENODEV; | 549 | return -ENODEV; |
550 | } | 550 | } |
551 | if (MRL_SENS(p_slot->ctrl->ctrlcap)) { | 551 | if (MRL_SENS(p_slot->ctrl->ctrlcap)) { |
552 | rc = p_slot->hpc_ops->get_latch_status(p_slot, &getstatus); | 552 | rc = p_slot->hpc_ops->get_latch_status(p_slot, &getstatus); |
553 | if (rc || getstatus) { | 553 | if (rc || getstatus) { |
554 | info("%s: latch open on slot(%s)\n", __FUNCTION__, | 554 | info("%s: latch open on slot(%s)\n", __FUNCTION__, |
@@ -557,8 +557,8 @@ int pciehp_enable_slot(struct slot *p_slot) | |||
557 | return -ENODEV; | 557 | return -ENODEV; |
558 | } | 558 | } |
559 | } | 559 | } |
560 | 560 | ||
561 | if (POWER_CTRL(p_slot->ctrl->ctrlcap)) { | 561 | if (POWER_CTRL(p_slot->ctrl->ctrlcap)) { |
562 | rc = p_slot->hpc_ops->get_power_status(p_slot, &getstatus); | 562 | rc = p_slot->hpc_ops->get_power_status(p_slot, &getstatus); |
563 | if (rc || getstatus) { | 563 | if (rc || getstatus) { |
564 | info("%s: already enabled on slot(%s)\n", __FUNCTION__, | 564 | info("%s: already enabled on slot(%s)\n", __FUNCTION__, |
@@ -593,7 +593,7 @@ int pciehp_disable_slot(struct slot *p_slot) | |||
593 | /* Check to see if (latch closed, card present, power on) */ | 593 | /* Check to see if (latch closed, card present, power on) */ |
594 | mutex_lock(&p_slot->ctrl->crit_sect); | 594 | mutex_lock(&p_slot->ctrl->crit_sect); |
595 | 595 | ||
596 | if (!HP_SUPR_RM(p_slot->ctrl->ctrlcap)) { | 596 | if (!HP_SUPR_RM(p_slot->ctrl->ctrlcap)) { |
597 | ret = p_slot->hpc_ops->get_adapter_status(p_slot, &getstatus); | 597 | ret = p_slot->hpc_ops->get_adapter_status(p_slot, &getstatus); |
598 | if (ret || !getstatus) { | 598 | if (ret || !getstatus) { |
599 | info("%s: no adapter on slot(%s)\n", __FUNCTION__, | 599 | info("%s: no adapter on slot(%s)\n", __FUNCTION__, |
@@ -603,7 +603,7 @@ int pciehp_disable_slot(struct slot *p_slot) | |||
603 | } | 603 | } |
604 | } | 604 | } |
605 | 605 | ||
606 | if (MRL_SENS(p_slot->ctrl->ctrlcap)) { | 606 | if (MRL_SENS(p_slot->ctrl->ctrlcap)) { |
607 | ret = p_slot->hpc_ops->get_latch_status(p_slot, &getstatus); | 607 | ret = p_slot->hpc_ops->get_latch_status(p_slot, &getstatus); |
608 | if (ret || getstatus) { | 608 | if (ret || getstatus) { |
609 | info("%s: latch open on slot(%s)\n", __FUNCTION__, | 609 | info("%s: latch open on slot(%s)\n", __FUNCTION__, |
@@ -613,7 +613,7 @@ int pciehp_disable_slot(struct slot *p_slot) | |||
613 | } | 613 | } |
614 | } | 614 | } |
615 | 615 | ||
616 | if (POWER_CTRL(p_slot->ctrl->ctrlcap)) { | 616 | if (POWER_CTRL(p_slot->ctrl->ctrlcap)) { |
617 | ret = p_slot->hpc_ops->get_power_status(p_slot, &getstatus); | 617 | ret = p_slot->hpc_ops->get_power_status(p_slot, &getstatus); |
618 | if (ret || !getstatus) { | 618 | if (ret || !getstatus) { |
619 | info("%s: already disabled slot(%s)\n", __FUNCTION__, | 619 | info("%s: already disabled slot(%s)\n", __FUNCTION__, |
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c index 016eea94a8a5..06d025b8b13f 100644 --- a/drivers/pci/hotplug/pciehp_hpc.c +++ b/drivers/pci/hotplug/pciehp_hpc.c | |||
@@ -39,37 +39,6 @@ | |||
39 | 39 | ||
40 | #include "../pci.h" | 40 | #include "../pci.h" |
41 | #include "pciehp.h" | 41 | #include "pciehp.h" |
42 | #ifdef DEBUG | ||
43 | #define DBG_K_TRACE_ENTRY ((unsigned int)0x00000001) /* On function entry */ | ||
44 | #define DBG_K_TRACE_EXIT ((unsigned int)0x00000002) /* On function exit */ | ||
45 | #define DBG_K_INFO ((unsigned int)0x00000004) /* Info messages */ | ||
46 | #define DBG_K_ERROR ((unsigned int)0x00000008) /* Error messages */ | ||
47 | #define DBG_K_TRACE (DBG_K_TRACE_ENTRY|DBG_K_TRACE_EXIT) | ||
48 | #define DBG_K_STANDARD (DBG_K_INFO|DBG_K_ERROR|DBG_K_TRACE) | ||
49 | /* Redefine this flagword to set debug level */ | ||
50 | #define DEBUG_LEVEL DBG_K_STANDARD | ||
51 | |||
52 | #define DEFINE_DBG_BUFFER char __dbg_str_buf[256]; | ||
53 | |||
54 | #define DBG_PRINT( dbg_flags, args... ) \ | ||
55 | do { \ | ||
56 | if ( DEBUG_LEVEL & ( dbg_flags ) ) \ | ||
57 | { \ | ||
58 | int len; \ | ||
59 | len = sprintf( __dbg_str_buf, "%s:%d: %s: ", \ | ||
60 | __FILE__, __LINE__, __FUNCTION__ ); \ | ||
61 | sprintf( __dbg_str_buf + len, args ); \ | ||
62 | printk( KERN_NOTICE "%s\n", __dbg_str_buf ); \ | ||
63 | } \ | ||
64 | } while (0) | ||
65 | |||
66 | #define DBG_ENTER_ROUTINE DBG_PRINT (DBG_K_TRACE_ENTRY, "%s", "[Entry]"); | ||
67 | #define DBG_LEAVE_ROUTINE DBG_PRINT (DBG_K_TRACE_EXIT, "%s", "[Exit]"); | ||
68 | #else | ||
69 | #define DEFINE_DBG_BUFFER | ||
70 | #define DBG_ENTER_ROUTINE | ||
71 | #define DBG_LEAVE_ROUTINE | ||
72 | #endif /* DEBUG */ | ||
73 | 42 | ||
74 | static atomic_t pciehp_num_controllers = ATOMIC_INIT(0); | 43 | static atomic_t pciehp_num_controllers = ATOMIC_INIT(0); |
75 | 44 | ||
@@ -160,10 +129,10 @@ static inline int pciehp_writel(struct controller *ctrl, int reg, u32 value) | |||
160 | /* Link Width Encoding */ | 129 | /* Link Width Encoding */ |
161 | #define LNK_X1 0x01 | 130 | #define LNK_X1 0x01 |
162 | #define LNK_X2 0x02 | 131 | #define LNK_X2 0x02 |
163 | #define LNK_X4 0x04 | 132 | #define LNK_X4 0x04 |
164 | #define LNK_X8 0x08 | 133 | #define LNK_X8 0x08 |
165 | #define LNK_X12 0x0C | 134 | #define LNK_X12 0x0C |
166 | #define LNK_X16 0x10 | 135 | #define LNK_X16 0x10 |
167 | #define LNK_X32 0x20 | 136 | #define LNK_X32 0x20 |
168 | 137 | ||
169 | /*Field definitions of Link Status Register */ | 138 | /*Field definitions of Link Status Register */ |
@@ -221,8 +190,6 @@ static inline int pciehp_writel(struct controller *ctrl, int reg, u32 value) | |||
221 | #define EMI_STATE 0x0080 | 190 | #define EMI_STATE 0x0080 |
222 | #define EMI_STATUS_BIT 7 | 191 | #define EMI_STATUS_BIT 7 |
223 | 192 | ||
224 | DEFINE_DBG_BUFFER /* Debug string buffer for entire HPC defined here */ | ||
225 | |||
226 | static irqreturn_t pcie_isr(int irq, void *dev_id); | 193 | static irqreturn_t pcie_isr(int irq, void *dev_id); |
227 | static void start_int_poll_timer(struct controller *ctrl, int sec); | 194 | static void start_int_poll_timer(struct controller *ctrl, int sec); |
228 | 195 | ||
@@ -231,14 +198,12 @@ static void int_poll_timeout(unsigned long data) | |||
231 | { | 198 | { |
232 | struct controller *ctrl = (struct controller *)data; | 199 | struct controller *ctrl = (struct controller *)data; |
233 | 200 | ||
234 | DBG_ENTER_ROUTINE | ||
235 | |||
236 | /* Poll for interrupt events. regs == NULL => polling */ | 201 | /* Poll for interrupt events. regs == NULL => polling */ |
237 | pcie_isr(0, ctrl); | 202 | pcie_isr(0, ctrl); |
238 | 203 | ||
239 | init_timer(&ctrl->poll_timer); | 204 | init_timer(&ctrl->poll_timer); |
240 | if (!pciehp_poll_time) | 205 | if (!pciehp_poll_time) |
241 | pciehp_poll_time = 2; /* reset timer to poll in 2 secs if user doesn't specify at module installation*/ | 206 | pciehp_poll_time = 2; /* default polling interval is 2 sec */ |
242 | 207 | ||
243 | start_int_poll_timer(ctrl, pciehp_poll_time); | 208 | start_int_poll_timer(ctrl, pciehp_poll_time); |
244 | } | 209 | } |
@@ -289,8 +254,6 @@ static int pcie_write_cmd(struct slot *slot, u16 cmd, u16 mask) | |||
289 | u16 slot_ctrl; | 254 | u16 slot_ctrl; |
290 | unsigned long flags; | 255 | unsigned long flags; |
291 | 256 | ||
292 | DBG_ENTER_ROUTINE | ||
293 | |||
294 | mutex_lock(&ctrl->ctrl_lock); | 257 | mutex_lock(&ctrl->ctrl_lock); |
295 | 258 | ||
296 | retval = pciehp_readw(ctrl, SLOTSTATUS, &slot_status); | 259 | retval = pciehp_readw(ctrl, SLOTSTATUS, &slot_status); |
@@ -299,7 +262,7 @@ static int pcie_write_cmd(struct slot *slot, u16 cmd, u16 mask) | |||
299 | goto out; | 262 | goto out; |
300 | } | 263 | } |
301 | 264 | ||
302 | if ((slot_status & CMD_COMPLETED) == CMD_COMPLETED ) { | 265 | if ((slot_status & CMD_COMPLETED) == CMD_COMPLETED ) { |
303 | /* After 1 sec and CMD_COMPLETED still not set, just | 266 | /* After 1 sec and CMD_COMPLETED still not set, just |
304 | proceed forward to issue the next command according | 267 | proceed forward to issue the next command according |
305 | to spec. Just print out the error message */ | 268 | to spec. Just print out the error message */ |
@@ -332,7 +295,6 @@ static int pcie_write_cmd(struct slot *slot, u16 cmd, u16 mask) | |||
332 | retval = pcie_wait_cmd(ctrl); | 295 | retval = pcie_wait_cmd(ctrl); |
333 | out: | 296 | out: |
334 | mutex_unlock(&ctrl->ctrl_lock); | 297 | mutex_unlock(&ctrl->ctrl_lock); |
335 | DBG_LEAVE_ROUTINE | ||
336 | return retval; | 298 | return retval; |
337 | } | 299 | } |
338 | 300 | ||
@@ -341,8 +303,6 @@ static int hpc_check_lnk_status(struct controller *ctrl) | |||
341 | u16 lnk_status; | 303 | u16 lnk_status; |
342 | int retval = 0; | 304 | int retval = 0; |
343 | 305 | ||
344 | DBG_ENTER_ROUTINE | ||
345 | |||
346 | retval = pciehp_readw(ctrl, LNKSTATUS, &lnk_status); | 306 | retval = pciehp_readw(ctrl, LNKSTATUS, &lnk_status); |
347 | if (retval) { | 307 | if (retval) { |
348 | err("%s: Cannot read LNKSTATUS register\n", __FUNCTION__); | 308 | err("%s: Cannot read LNKSTATUS register\n", __FUNCTION__); |
@@ -350,26 +310,22 @@ static int hpc_check_lnk_status(struct controller *ctrl) | |||
350 | } | 310 | } |
351 | 311 | ||
352 | dbg("%s: lnk_status = %x\n", __FUNCTION__, lnk_status); | 312 | dbg("%s: lnk_status = %x\n", __FUNCTION__, lnk_status); |
353 | if ( (lnk_status & LNK_TRN) || (lnk_status & LNK_TRN_ERR) || | 313 | if ( (lnk_status & LNK_TRN) || (lnk_status & LNK_TRN_ERR) || |
354 | !(lnk_status & NEG_LINK_WD)) { | 314 | !(lnk_status & NEG_LINK_WD)) { |
355 | err("%s : Link Training Error occurs \n", __FUNCTION__); | 315 | err("%s : Link Training Error occurs \n", __FUNCTION__); |
356 | retval = -1; | 316 | retval = -1; |
357 | return retval; | 317 | return retval; |
358 | } | 318 | } |
359 | 319 | ||
360 | DBG_LEAVE_ROUTINE | ||
361 | return retval; | 320 | return retval; |
362 | } | 321 | } |
363 | 322 | ||
364 | |||
365 | static int hpc_get_attention_status(struct slot *slot, u8 *status) | 323 | static int hpc_get_attention_status(struct slot *slot, u8 *status) |
366 | { | 324 | { |
367 | struct controller *ctrl = slot->ctrl; | 325 | struct controller *ctrl = slot->ctrl; |
368 | u16 slot_ctrl; | 326 | u16 slot_ctrl; |
369 | u8 atten_led_state; | 327 | u8 atten_led_state; |
370 | int retval = 0; | 328 | int retval = 0; |
371 | |||
372 | DBG_ENTER_ROUTINE | ||
373 | 329 | ||
374 | retval = pciehp_readw(ctrl, SLOTCTRL, &slot_ctrl); | 330 | retval = pciehp_readw(ctrl, SLOTCTRL, &slot_ctrl); |
375 | if (retval) { | 331 | if (retval) { |
@@ -400,7 +356,6 @@ static int hpc_get_attention_status(struct slot *slot, u8 *status) | |||
400 | break; | 356 | break; |
401 | } | 357 | } |
402 | 358 | ||
403 | DBG_LEAVE_ROUTINE | ||
404 | return 0; | 359 | return 0; |
405 | } | 360 | } |
406 | 361 | ||
@@ -410,8 +365,6 @@ static int hpc_get_power_status(struct slot *slot, u8 *status) | |||
410 | u16 slot_ctrl; | 365 | u16 slot_ctrl; |
411 | u8 pwr_state; | 366 | u8 pwr_state; |
412 | int retval = 0; | 367 | int retval = 0; |
413 | |||
414 | DBG_ENTER_ROUTINE | ||
415 | 368 | ||
416 | retval = pciehp_readw(ctrl, SLOTCTRL, &slot_ctrl); | 369 | retval = pciehp_readw(ctrl, SLOTCTRL, &slot_ctrl); |
417 | if (retval) { | 370 | if (retval) { |
@@ -428,35 +381,30 @@ static int hpc_get_power_status(struct slot *slot, u8 *status) | |||
428 | *status = 1; | 381 | *status = 1; |
429 | break; | 382 | break; |
430 | case 1: | 383 | case 1: |
431 | *status = 0; | 384 | *status = 0; |
432 | break; | 385 | break; |
433 | default: | 386 | default: |
434 | *status = 0xFF; | 387 | *status = 0xFF; |
435 | break; | 388 | break; |
436 | } | 389 | } |
437 | 390 | ||
438 | DBG_LEAVE_ROUTINE | ||
439 | return retval; | 391 | return retval; |
440 | } | 392 | } |
441 | 393 | ||
442 | |||
443 | static int hpc_get_latch_status(struct slot *slot, u8 *status) | 394 | static int hpc_get_latch_status(struct slot *slot, u8 *status) |
444 | { | 395 | { |
445 | struct controller *ctrl = slot->ctrl; | 396 | struct controller *ctrl = slot->ctrl; |
446 | u16 slot_status; | 397 | u16 slot_status; |
447 | int retval = 0; | 398 | int retval = 0; |
448 | 399 | ||
449 | DBG_ENTER_ROUTINE | ||
450 | |||
451 | retval = pciehp_readw(ctrl, SLOTSTATUS, &slot_status); | 400 | retval = pciehp_readw(ctrl, SLOTSTATUS, &slot_status); |
452 | if (retval) { | 401 | if (retval) { |
453 | err("%s: Cannot read SLOTSTATUS register\n", __FUNCTION__); | 402 | err("%s: Cannot read SLOTSTATUS register\n", __FUNCTION__); |
454 | return retval; | 403 | return retval; |
455 | } | 404 | } |
456 | 405 | ||
457 | *status = (((slot_status & MRL_STATE) >> 5) == 0) ? 0 : 1; | 406 | *status = (((slot_status & MRL_STATE) >> 5) == 0) ? 0 : 1; |
458 | 407 | ||
459 | DBG_LEAVE_ROUTINE | ||
460 | return 0; | 408 | return 0; |
461 | } | 409 | } |
462 | 410 | ||
@@ -467,8 +415,6 @@ static int hpc_get_adapter_status(struct slot *slot, u8 *status) | |||
467 | u8 card_state; | 415 | u8 card_state; |
468 | int retval = 0; | 416 | int retval = 0; |
469 | 417 | ||
470 | DBG_ENTER_ROUTINE | ||
471 | |||
472 | retval = pciehp_readw(ctrl, SLOTSTATUS, &slot_status); | 418 | retval = pciehp_readw(ctrl, SLOTSTATUS, &slot_status); |
473 | if (retval) { | 419 | if (retval) { |
474 | err("%s: Cannot read SLOTSTATUS register\n", __FUNCTION__); | 420 | err("%s: Cannot read SLOTSTATUS register\n", __FUNCTION__); |
@@ -477,7 +423,6 @@ static int hpc_get_adapter_status(struct slot *slot, u8 *status) | |||
477 | card_state = (u8)((slot_status & PRSN_STATE) >> 6); | 423 | card_state = (u8)((slot_status & PRSN_STATE) >> 6); |
478 | *status = (card_state == 1) ? 1 : 0; | 424 | *status = (card_state == 1) ? 1 : 0; |
479 | 425 | ||
480 | DBG_LEAVE_ROUTINE | ||
481 | return 0; | 426 | return 0; |
482 | } | 427 | } |
483 | 428 | ||
@@ -488,16 +433,13 @@ static int hpc_query_power_fault(struct slot *slot) | |||
488 | u8 pwr_fault; | 433 | u8 pwr_fault; |
489 | int retval = 0; | 434 | int retval = 0; |
490 | 435 | ||
491 | DBG_ENTER_ROUTINE | ||
492 | |||
493 | retval = pciehp_readw(ctrl, SLOTSTATUS, &slot_status); | 436 | retval = pciehp_readw(ctrl, SLOTSTATUS, &slot_status); |
494 | if (retval) { | 437 | if (retval) { |
495 | err("%s: Cannot check for power fault\n", __FUNCTION__); | 438 | err("%s: Cannot check for power fault\n", __FUNCTION__); |
496 | return retval; | 439 | return retval; |
497 | } | 440 | } |
498 | pwr_fault = (u8)((slot_status & PWR_FAULT_DETECTED) >> 1); | 441 | pwr_fault = (u8)((slot_status & PWR_FAULT_DETECTED) >> 1); |
499 | 442 | ||
500 | DBG_LEAVE_ROUTINE | ||
501 | return pwr_fault; | 443 | return pwr_fault; |
502 | } | 444 | } |
503 | 445 | ||
@@ -507,8 +449,6 @@ static int hpc_get_emi_status(struct slot *slot, u8 *status) | |||
507 | u16 slot_status; | 449 | u16 slot_status; |
508 | int retval = 0; | 450 | int retval = 0; |
509 | 451 | ||
510 | DBG_ENTER_ROUTINE | ||
511 | |||
512 | retval = pciehp_readw(ctrl, SLOTSTATUS, &slot_status); | 452 | retval = pciehp_readw(ctrl, SLOTSTATUS, &slot_status); |
513 | if (retval) { | 453 | if (retval) { |
514 | err("%s : Cannot check EMI status\n", __FUNCTION__); | 454 | err("%s : Cannot check EMI status\n", __FUNCTION__); |
@@ -516,7 +456,6 @@ static int hpc_get_emi_status(struct slot *slot, u8 *status) | |||
516 | } | 456 | } |
517 | *status = (slot_status & EMI_STATE) >> EMI_STATUS_BIT; | 457 | *status = (slot_status & EMI_STATE) >> EMI_STATUS_BIT; |
518 | 458 | ||
519 | DBG_LEAVE_ROUTINE | ||
520 | return retval; | 459 | return retval; |
521 | } | 460 | } |
522 | 461 | ||
@@ -526,8 +465,6 @@ static int hpc_toggle_emi(struct slot *slot) | |||
526 | u16 cmd_mask; | 465 | u16 cmd_mask; |
527 | int rc; | 466 | int rc; |
528 | 467 | ||
529 | DBG_ENTER_ROUTINE | ||
530 | |||
531 | slot_cmd = EMI_CTRL; | 468 | slot_cmd = EMI_CTRL; |
532 | cmd_mask = EMI_CTRL; | 469 | cmd_mask = EMI_CTRL; |
533 | if (!pciehp_poll_mode) { | 470 | if (!pciehp_poll_mode) { |
@@ -537,7 +474,7 @@ static int hpc_toggle_emi(struct slot *slot) | |||
537 | 474 | ||
538 | rc = pcie_write_cmd(slot, slot_cmd, cmd_mask); | 475 | rc = pcie_write_cmd(slot, slot_cmd, cmd_mask); |
539 | slot->last_emi_toggle = get_seconds(); | 476 | slot->last_emi_toggle = get_seconds(); |
540 | DBG_LEAVE_ROUTINE | 477 | |
541 | return rc; | 478 | return rc; |
542 | } | 479 | } |
543 | 480 | ||
@@ -548,8 +485,6 @@ static int hpc_set_attention_status(struct slot *slot, u8 value) | |||
548 | u16 cmd_mask; | 485 | u16 cmd_mask; |
549 | int rc; | 486 | int rc; |
550 | 487 | ||
551 | DBG_ENTER_ROUTINE | ||
552 | |||
553 | cmd_mask = ATTN_LED_CTRL; | 488 | cmd_mask = ATTN_LED_CTRL; |
554 | switch (value) { | 489 | switch (value) { |
555 | case 0 : /* turn off */ | 490 | case 0 : /* turn off */ |
@@ -572,19 +507,15 @@ static int hpc_set_attention_status(struct slot *slot, u8 value) | |||
572 | rc = pcie_write_cmd(slot, slot_cmd, cmd_mask); | 507 | rc = pcie_write_cmd(slot, slot_cmd, cmd_mask); |
573 | dbg("%s: SLOTCTRL %x write cmd %x\n", | 508 | dbg("%s: SLOTCTRL %x write cmd %x\n", |
574 | __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd); | 509 | __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd); |
575 | 510 | ||
576 | DBG_LEAVE_ROUTINE | ||
577 | return rc; | 511 | return rc; |
578 | } | 512 | } |
579 | 513 | ||
580 | |||
581 | static void hpc_set_green_led_on(struct slot *slot) | 514 | static void hpc_set_green_led_on(struct slot *slot) |
582 | { | 515 | { |
583 | struct controller *ctrl = slot->ctrl; | 516 | struct controller *ctrl = slot->ctrl; |
584 | u16 slot_cmd; | 517 | u16 slot_cmd; |
585 | u16 cmd_mask; | 518 | u16 cmd_mask; |
586 | |||
587 | DBG_ENTER_ROUTINE | ||
588 | 519 | ||
589 | slot_cmd = 0x0100; | 520 | slot_cmd = 0x0100; |
590 | cmd_mask = PWR_LED_CTRL; | 521 | cmd_mask = PWR_LED_CTRL; |
@@ -597,8 +528,6 @@ static void hpc_set_green_led_on(struct slot *slot) | |||
597 | 528 | ||
598 | dbg("%s: SLOTCTRL %x write cmd %x\n", | 529 | dbg("%s: SLOTCTRL %x write cmd %x\n", |
599 | __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd); | 530 | __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd); |
600 | DBG_LEAVE_ROUTINE | ||
601 | return; | ||
602 | } | 531 | } |
603 | 532 | ||
604 | static void hpc_set_green_led_off(struct slot *slot) | 533 | static void hpc_set_green_led_off(struct slot *slot) |
@@ -607,8 +536,6 @@ static void hpc_set_green_led_off(struct slot *slot) | |||
607 | u16 slot_cmd; | 536 | u16 slot_cmd; |
608 | u16 cmd_mask; | 537 | u16 cmd_mask; |
609 | 538 | ||
610 | DBG_ENTER_ROUTINE | ||
611 | |||
612 | slot_cmd = 0x0300; | 539 | slot_cmd = 0x0300; |
613 | cmd_mask = PWR_LED_CTRL; | 540 | cmd_mask = PWR_LED_CTRL; |
614 | if (!pciehp_poll_mode) { | 541 | if (!pciehp_poll_mode) { |
@@ -619,9 +546,6 @@ static void hpc_set_green_led_off(struct slot *slot) | |||
619 | pcie_write_cmd(slot, slot_cmd, cmd_mask); | 546 | pcie_write_cmd(slot, slot_cmd, cmd_mask); |
620 | dbg("%s: SLOTCTRL %x write cmd %x\n", | 547 | dbg("%s: SLOTCTRL %x write cmd %x\n", |
621 | __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd); | 548 | __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd); |
622 | |||
623 | DBG_LEAVE_ROUTINE | ||
624 | return; | ||
625 | } | 549 | } |
626 | 550 | ||
627 | static void hpc_set_green_led_blink(struct slot *slot) | 551 | static void hpc_set_green_led_blink(struct slot *slot) |
@@ -629,8 +553,6 @@ static void hpc_set_green_led_blink(struct slot *slot) | |||
629 | struct controller *ctrl = slot->ctrl; | 553 | struct controller *ctrl = slot->ctrl; |
630 | u16 slot_cmd; | 554 | u16 slot_cmd; |
631 | u16 cmd_mask; | 555 | u16 cmd_mask; |
632 | |||
633 | DBG_ENTER_ROUTINE | ||
634 | 556 | ||
635 | slot_cmd = 0x0200; | 557 | slot_cmd = 0x0200; |
636 | cmd_mask = PWR_LED_CTRL; | 558 | cmd_mask = PWR_LED_CTRL; |
@@ -643,14 +565,10 @@ static void hpc_set_green_led_blink(struct slot *slot) | |||
643 | 565 | ||
644 | dbg("%s: SLOTCTRL %x write cmd %x\n", | 566 | dbg("%s: SLOTCTRL %x write cmd %x\n", |
645 | __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd); | 567 | __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd); |
646 | DBG_LEAVE_ROUTINE | ||
647 | return; | ||
648 | } | 568 | } |
649 | 569 | ||
650 | static void hpc_release_ctlr(struct controller *ctrl) | 570 | static void hpc_release_ctlr(struct controller *ctrl) |
651 | { | 571 | { |
652 | DBG_ENTER_ROUTINE | ||
653 | |||
654 | if (pciehp_poll_mode) | 572 | if (pciehp_poll_mode) |
655 | del_timer(&ctrl->poll_timer); | 573 | del_timer(&ctrl->poll_timer); |
656 | else | 574 | else |
@@ -662,8 +580,6 @@ static void hpc_release_ctlr(struct controller *ctrl) | |||
662 | */ | 580 | */ |
663 | if (atomic_dec_and_test(&pciehp_num_controllers)) | 581 | if (atomic_dec_and_test(&pciehp_num_controllers)) |
664 | destroy_workqueue(pciehp_wq); | 582 | destroy_workqueue(pciehp_wq); |
665 | |||
666 | DBG_LEAVE_ROUTINE | ||
667 | } | 583 | } |
668 | 584 | ||
669 | static int hpc_power_on_slot(struct slot * slot) | 585 | static int hpc_power_on_slot(struct slot * slot) |
@@ -674,8 +590,6 @@ static int hpc_power_on_slot(struct slot * slot) | |||
674 | u16 slot_status; | 590 | u16 slot_status; |
675 | int retval = 0; | 591 | int retval = 0; |
676 | 592 | ||
677 | DBG_ENTER_ROUTINE | ||
678 | |||
679 | dbg("%s: slot->hp_slot %x\n", __FUNCTION__, slot->hp_slot); | 593 | dbg("%s: slot->hp_slot %x\n", __FUNCTION__, slot->hp_slot); |
680 | 594 | ||
681 | /* Clear sticky power-fault bit from previous power failures */ | 595 | /* Clear sticky power-fault bit from previous power failures */ |
@@ -719,8 +633,6 @@ static int hpc_power_on_slot(struct slot * slot) | |||
719 | dbg("%s: SLOTCTRL %x write cmd %x\n", | 633 | dbg("%s: SLOTCTRL %x write cmd %x\n", |
720 | __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd); | 634 | __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd); |
721 | 635 | ||
722 | DBG_LEAVE_ROUTINE | ||
723 | |||
724 | return retval; | 636 | return retval; |
725 | } | 637 | } |
726 | 638 | ||
@@ -731,8 +643,6 @@ static int hpc_power_off_slot(struct slot * slot) | |||
731 | u16 cmd_mask; | 643 | u16 cmd_mask; |
732 | int retval = 0; | 644 | int retval = 0; |
733 | 645 | ||
734 | DBG_ENTER_ROUTINE | ||
735 | |||
736 | dbg("%s: slot->hp_slot %x\n", __FUNCTION__, slot->hp_slot); | 646 | dbg("%s: slot->hp_slot %x\n", __FUNCTION__, slot->hp_slot); |
737 | 647 | ||
738 | slot_cmd = POWER_OFF; | 648 | slot_cmd = POWER_OFF; |
@@ -764,8 +674,6 @@ static int hpc_power_off_slot(struct slot * slot) | |||
764 | dbg("%s: SLOTCTRL %x write cmd %x\n", | 674 | dbg("%s: SLOTCTRL %x write cmd %x\n", |
765 | __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd); | 675 | __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_cmd); |
766 | 676 | ||
767 | DBG_LEAVE_ROUTINE | ||
768 | |||
769 | return retval; | 677 | return retval; |
770 | } | 678 | } |
771 | 679 | ||
@@ -784,8 +692,8 @@ static irqreturn_t pcie_isr(int irq, void *dev_id) | |||
784 | return IRQ_NONE; | 692 | return IRQ_NONE; |
785 | } | 693 | } |
786 | 694 | ||
787 | intr_detect = ( ATTN_BUTTN_PRESSED | PWR_FAULT_DETECTED | MRL_SENS_CHANGED | | 695 | intr_detect = (ATTN_BUTTN_PRESSED | PWR_FAULT_DETECTED | |
788 | PRSN_DETECT_CHANGED | CMD_COMPLETED ); | 696 | MRL_SENS_CHANGED | PRSN_DETECT_CHANGED | CMD_COMPLETED); |
789 | 697 | ||
790 | intr_loc = slot_status & intr_detect; | 698 | intr_loc = slot_status & intr_detect; |
791 | 699 | ||
@@ -807,7 +715,8 @@ static irqreturn_t pcie_isr(int irq, void *dev_id) | |||
807 | 715 | ||
808 | dbg("%s: pciehp_readw(SLOTCTRL) with value %x\n", | 716 | dbg("%s: pciehp_readw(SLOTCTRL) with value %x\n", |
809 | __FUNCTION__, temp_word); | 717 | __FUNCTION__, temp_word); |
810 | temp_word = (temp_word & ~HP_INTR_ENABLE & ~CMD_CMPL_INTR_ENABLE) | 0x00; | 718 | temp_word = (temp_word & ~HP_INTR_ENABLE & |
719 | ~CMD_CMPL_INTR_ENABLE) | 0x00; | ||
811 | rc = pciehp_writew(ctrl, SLOTCTRL, temp_word); | 720 | rc = pciehp_writew(ctrl, SLOTCTRL, temp_word); |
812 | if (rc) { | 721 | if (rc) { |
813 | err("%s: Cannot write to SLOTCTRL register\n", | 722 | err("%s: Cannot write to SLOTCTRL register\n", |
@@ -825,7 +734,7 @@ static irqreturn_t pcie_isr(int irq, void *dev_id) | |||
825 | } | 734 | } |
826 | dbg("%s: pciehp_readw(SLOTSTATUS) with value %x\n", | 735 | dbg("%s: pciehp_readw(SLOTSTATUS) with value %x\n", |
827 | __FUNCTION__, slot_status); | 736 | __FUNCTION__, slot_status); |
828 | 737 | ||
829 | /* Clear command complete interrupt caused by this write */ | 738 | /* Clear command complete interrupt caused by this write */ |
830 | temp_word = 0x1f; | 739 | temp_word = 0x1f; |
831 | rc = pciehp_writew(ctrl, SLOTSTATUS, temp_word); | 740 | rc = pciehp_writew(ctrl, SLOTSTATUS, temp_word); |
@@ -835,10 +744,10 @@ static irqreturn_t pcie_isr(int irq, void *dev_id) | |||
835 | return IRQ_NONE; | 744 | return IRQ_NONE; |
836 | } | 745 | } |
837 | } | 746 | } |
838 | 747 | ||
839 | if (intr_loc & CMD_COMPLETED) { | 748 | if (intr_loc & CMD_COMPLETED) { |
840 | /* | 749 | /* |
841 | * Command Complete Interrupt Pending | 750 | * Command Complete Interrupt Pending |
842 | */ | 751 | */ |
843 | ctrl->cmd_busy = 0; | 752 | ctrl->cmd_busy = 0; |
844 | wake_up_interruptible(&ctrl->queue); | 753 | wake_up_interruptible(&ctrl->queue); |
@@ -892,7 +801,7 @@ static irqreturn_t pcie_isr(int irq, void *dev_id) | |||
892 | __FUNCTION__); | 801 | __FUNCTION__); |
893 | return IRQ_NONE; | 802 | return IRQ_NONE; |
894 | } | 803 | } |
895 | 804 | ||
896 | /* Clear command complete interrupt caused by this write */ | 805 | /* Clear command complete interrupt caused by this write */ |
897 | temp_word = 0x1F; | 806 | temp_word = 0x1F; |
898 | rc = pciehp_writew(ctrl, SLOTSTATUS, temp_word); | 807 | rc = pciehp_writew(ctrl, SLOTSTATUS, temp_word); |
@@ -904,19 +813,17 @@ static irqreturn_t pcie_isr(int irq, void *dev_id) | |||
904 | dbg("%s: pciehp_writew(SLOTSTATUS) with value %x\n", | 813 | dbg("%s: pciehp_writew(SLOTSTATUS) with value %x\n", |
905 | __FUNCTION__, temp_word); | 814 | __FUNCTION__, temp_word); |
906 | } | 815 | } |
907 | 816 | ||
908 | return IRQ_HANDLED; | 817 | return IRQ_HANDLED; |
909 | } | 818 | } |
910 | 819 | ||
911 | static int hpc_get_max_lnk_speed (struct slot *slot, enum pci_bus_speed *value) | 820 | static int hpc_get_max_lnk_speed(struct slot *slot, enum pci_bus_speed *value) |
912 | { | 821 | { |
913 | struct controller *ctrl = slot->ctrl; | 822 | struct controller *ctrl = slot->ctrl; |
914 | enum pcie_link_speed lnk_speed; | 823 | enum pcie_link_speed lnk_speed; |
915 | u32 lnk_cap; | 824 | u32 lnk_cap; |
916 | int retval = 0; | 825 | int retval = 0; |
917 | 826 | ||
918 | DBG_ENTER_ROUTINE | ||
919 | |||
920 | retval = pciehp_readl(ctrl, LNKCAP, &lnk_cap); | 827 | retval = pciehp_readl(ctrl, LNKCAP, &lnk_cap); |
921 | if (retval) { | 828 | if (retval) { |
922 | err("%s: Cannot read LNKCAP register\n", __FUNCTION__); | 829 | err("%s: Cannot read LNKCAP register\n", __FUNCTION__); |
@@ -934,19 +841,18 @@ static int hpc_get_max_lnk_speed (struct slot *slot, enum pci_bus_speed *value) | |||
934 | 841 | ||
935 | *value = lnk_speed; | 842 | *value = lnk_speed; |
936 | dbg("Max link speed = %d\n", lnk_speed); | 843 | dbg("Max link speed = %d\n", lnk_speed); |
937 | DBG_LEAVE_ROUTINE | 844 | |
938 | return retval; | 845 | return retval; |
939 | } | 846 | } |
940 | 847 | ||
941 | static int hpc_get_max_lnk_width (struct slot *slot, enum pcie_link_width *value) | 848 | static int hpc_get_max_lnk_width(struct slot *slot, |
849 | enum pcie_link_width *value) | ||
942 | { | 850 | { |
943 | struct controller *ctrl = slot->ctrl; | 851 | struct controller *ctrl = slot->ctrl; |
944 | enum pcie_link_width lnk_wdth; | 852 | enum pcie_link_width lnk_wdth; |
945 | u32 lnk_cap; | 853 | u32 lnk_cap; |
946 | int retval = 0; | 854 | int retval = 0; |
947 | 855 | ||
948 | DBG_ENTER_ROUTINE | ||
949 | |||
950 | retval = pciehp_readl(ctrl, LNKCAP, &lnk_cap); | 856 | retval = pciehp_readl(ctrl, LNKCAP, &lnk_cap); |
951 | if (retval) { | 857 | if (retval) { |
952 | err("%s: Cannot read LNKCAP register\n", __FUNCTION__); | 858 | err("%s: Cannot read LNKCAP register\n", __FUNCTION__); |
@@ -985,19 +891,17 @@ static int hpc_get_max_lnk_width (struct slot *slot, enum pcie_link_width *value | |||
985 | 891 | ||
986 | *value = lnk_wdth; | 892 | *value = lnk_wdth; |
987 | dbg("Max link width = %d\n", lnk_wdth); | 893 | dbg("Max link width = %d\n", lnk_wdth); |
988 | DBG_LEAVE_ROUTINE | 894 | |
989 | return retval; | 895 | return retval; |
990 | } | 896 | } |
991 | 897 | ||
992 | static int hpc_get_cur_lnk_speed (struct slot *slot, enum pci_bus_speed *value) | 898 | static int hpc_get_cur_lnk_speed(struct slot *slot, enum pci_bus_speed *value) |
993 | { | 899 | { |
994 | struct controller *ctrl = slot->ctrl; | 900 | struct controller *ctrl = slot->ctrl; |
995 | enum pcie_link_speed lnk_speed = PCI_SPEED_UNKNOWN; | 901 | enum pcie_link_speed lnk_speed = PCI_SPEED_UNKNOWN; |
996 | int retval = 0; | 902 | int retval = 0; |
997 | u16 lnk_status; | 903 | u16 lnk_status; |
998 | 904 | ||
999 | DBG_ENTER_ROUTINE | ||
1000 | |||
1001 | retval = pciehp_readw(ctrl, LNKSTATUS, &lnk_status); | 905 | retval = pciehp_readw(ctrl, LNKSTATUS, &lnk_status); |
1002 | if (retval) { | 906 | if (retval) { |
1003 | err("%s: Cannot read LNKSTATUS register\n", __FUNCTION__); | 907 | err("%s: Cannot read LNKSTATUS register\n", __FUNCTION__); |
@@ -1015,25 +919,24 @@ static int hpc_get_cur_lnk_speed (struct slot *slot, enum pci_bus_speed *value) | |||
1015 | 919 | ||
1016 | *value = lnk_speed; | 920 | *value = lnk_speed; |
1017 | dbg("Current link speed = %d\n", lnk_speed); | 921 | dbg("Current link speed = %d\n", lnk_speed); |
1018 | DBG_LEAVE_ROUTINE | 922 | |
1019 | return retval; | 923 | return retval; |
1020 | } | 924 | } |
1021 | 925 | ||
1022 | static int hpc_get_cur_lnk_width (struct slot *slot, enum pcie_link_width *value) | 926 | static int hpc_get_cur_lnk_width(struct slot *slot, |
927 | enum pcie_link_width *value) | ||
1023 | { | 928 | { |
1024 | struct controller *ctrl = slot->ctrl; | 929 | struct controller *ctrl = slot->ctrl; |
1025 | enum pcie_link_width lnk_wdth = PCIE_LNK_WIDTH_UNKNOWN; | 930 | enum pcie_link_width lnk_wdth = PCIE_LNK_WIDTH_UNKNOWN; |
1026 | int retval = 0; | 931 | int retval = 0; |
1027 | u16 lnk_status; | 932 | u16 lnk_status; |
1028 | 933 | ||
1029 | DBG_ENTER_ROUTINE | ||
1030 | |||
1031 | retval = pciehp_readw(ctrl, LNKSTATUS, &lnk_status); | 934 | retval = pciehp_readw(ctrl, LNKSTATUS, &lnk_status); |
1032 | if (retval) { | 935 | if (retval) { |
1033 | err("%s: Cannot read LNKSTATUS register\n", __FUNCTION__); | 936 | err("%s: Cannot read LNKSTATUS register\n", __FUNCTION__); |
1034 | return retval; | 937 | return retval; |
1035 | } | 938 | } |
1036 | 939 | ||
1037 | switch ((lnk_status & 0x03F0) >> 4){ | 940 | switch ((lnk_status & 0x03F0) >> 4){ |
1038 | case 0: | 941 | case 0: |
1039 | lnk_wdth = PCIE_LNK_WIDTH_RESRV; | 942 | lnk_wdth = PCIE_LNK_WIDTH_RESRV; |
@@ -1066,7 +969,7 @@ static int hpc_get_cur_lnk_width (struct slot *slot, enum pcie_link_width *value | |||
1066 | 969 | ||
1067 | *value = lnk_wdth; | 970 | *value = lnk_wdth; |
1068 | dbg("Current link width = %d\n", lnk_wdth); | 971 | dbg("Current link width = %d\n", lnk_wdth); |
1069 | DBG_LEAVE_ROUTINE | 972 | |
1070 | return retval; | 973 | return retval; |
1071 | } | 974 | } |
1072 | 975 | ||
@@ -1085,12 +988,12 @@ static struct hpc_ops pciehp_hpc_ops = { | |||
1085 | .get_cur_bus_speed = hpc_get_cur_lnk_speed, | 988 | .get_cur_bus_speed = hpc_get_cur_lnk_speed, |
1086 | .get_max_lnk_width = hpc_get_max_lnk_width, | 989 | .get_max_lnk_width = hpc_get_max_lnk_width, |
1087 | .get_cur_lnk_width = hpc_get_cur_lnk_width, | 990 | .get_cur_lnk_width = hpc_get_cur_lnk_width, |
1088 | 991 | ||
1089 | .query_power_fault = hpc_query_power_fault, | 992 | .query_power_fault = hpc_query_power_fault, |
1090 | .green_led_on = hpc_set_green_led_on, | 993 | .green_led_on = hpc_set_green_led_on, |
1091 | .green_led_off = hpc_set_green_led_off, | 994 | .green_led_off = hpc_set_green_led_off, |
1092 | .green_led_blink = hpc_set_green_led_blink, | 995 | .green_led_blink = hpc_set_green_led_blink, |
1093 | 996 | ||
1094 | .release_ctlr = hpc_release_ctlr, | 997 | .release_ctlr = hpc_release_ctlr, |
1095 | .check_lnk_status = hpc_check_lnk_status, | 998 | .check_lnk_status = hpc_check_lnk_status, |
1096 | }; | 999 | }; |
@@ -1138,6 +1041,7 @@ int pciehp_acpi_get_hp_hw_control_from_firmware(struct pci_dev *dev) | |||
1138 | dbg("Trying to get hotplug control for %s \n", | 1041 | dbg("Trying to get hotplug control for %s \n", |
1139 | (char *)string.pointer); | 1042 | (char *)string.pointer); |
1140 | status = pci_osc_control_set(handle, | 1043 | status = pci_osc_control_set(handle, |
1044 | OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL | | ||
1141 | OSC_PCI_EXPRESS_NATIVE_HP_CONTROL); | 1045 | OSC_PCI_EXPRESS_NATIVE_HP_CONTROL); |
1142 | if (status == AE_NOT_FOUND) | 1046 | if (status == AE_NOT_FOUND) |
1143 | status = acpi_run_oshp(handle); | 1047 | status = acpi_run_oshp(handle); |
@@ -1163,8 +1067,6 @@ int pciehp_acpi_get_hp_hw_control_from_firmware(struct pci_dev *dev) | |||
1163 | } | 1067 | } |
1164 | #endif | 1068 | #endif |
1165 | 1069 | ||
1166 | |||
1167 | |||
1168 | int pcie_init(struct controller * ctrl, struct pcie_device *dev) | 1070 | int pcie_init(struct controller * ctrl, struct pcie_device *dev) |
1169 | { | 1071 | { |
1170 | int rc; | 1072 | int rc; |
@@ -1176,8 +1078,6 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev) | |||
1176 | u16 slot_status, slot_ctrl; | 1078 | u16 slot_status, slot_ctrl; |
1177 | struct pci_dev *pdev; | 1079 | struct pci_dev *pdev; |
1178 | 1080 | ||
1179 | DBG_ENTER_ROUTINE | ||
1180 | |||
1181 | pdev = dev->port; | 1081 | pdev = dev->port; |
1182 | ctrl->pci_dev = pdev; /* save pci_dev in context */ | 1082 | ctrl->pci_dev = pdev; /* save pci_dev in context */ |
1183 | 1083 | ||
@@ -1201,9 +1101,11 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev) | |||
1201 | dbg("%s: CAPREG offset %x cap_reg %x\n", | 1101 | dbg("%s: CAPREG offset %x cap_reg %x\n", |
1202 | __FUNCTION__, ctrl->cap_base + CAPREG, cap_reg); | 1102 | __FUNCTION__, ctrl->cap_base + CAPREG, cap_reg); |
1203 | 1103 | ||
1204 | if (((cap_reg & SLOT_IMPL) == 0) || (((cap_reg & DEV_PORT_TYPE) != 0x0040) | 1104 | if (((cap_reg & SLOT_IMPL) == 0) || |
1105 | (((cap_reg & DEV_PORT_TYPE) != 0x0040) | ||
1205 | && ((cap_reg & DEV_PORT_TYPE) != 0x0060))) { | 1106 | && ((cap_reg & DEV_PORT_TYPE) != 0x0060))) { |
1206 | dbg("%s : This is not a root port or the port is not connected to a slot\n", __FUNCTION__); | 1107 | dbg("%s : This is not a root port or the port is not " |
1108 | "connected to a slot\n", __FUNCTION__); | ||
1207 | goto abort_free_ctlr; | 1109 | goto abort_free_ctlr; |
1208 | } | 1110 | } |
1209 | 1111 | ||
@@ -1236,14 +1138,15 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev) | |||
1236 | dbg("%s: SLOTCTRL offset %x slot_ctrl %x\n", | 1138 | dbg("%s: SLOTCTRL offset %x slot_ctrl %x\n", |
1237 | __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_ctrl); | 1139 | __FUNCTION__, ctrl->cap_base + SLOTCTRL, slot_ctrl); |
1238 | 1140 | ||
1239 | for ( rc = 0; rc < DEVICE_COUNT_RESOURCE; rc++) | 1141 | for (rc = 0; rc < DEVICE_COUNT_RESOURCE; rc++) |
1240 | if (pci_resource_len(pdev, rc) > 0) | 1142 | if (pci_resource_len(pdev, rc) > 0) |
1241 | dbg("pci resource[%d] start=0x%llx(len=0x%llx)\n", rc, | 1143 | dbg("pci resource[%d] start=0x%llx(len=0x%llx)\n", rc, |
1242 | (unsigned long long)pci_resource_start(pdev, rc), | 1144 | (unsigned long long)pci_resource_start(pdev, rc), |
1243 | (unsigned long long)pci_resource_len(pdev, rc)); | 1145 | (unsigned long long)pci_resource_len(pdev, rc)); |
1244 | 1146 | ||
1245 | info("HPC vendor_id %x device_id %x ss_vid %x ss_did %x\n", pdev->vendor, pdev->device, | 1147 | info("HPC vendor_id %x device_id %x ss_vid %x ss_did %x\n", |
1246 | pdev->subsystem_vendor, pdev->subsystem_device); | 1148 | pdev->vendor, pdev->device, |
1149 | pdev->subsystem_vendor, pdev->subsystem_device); | ||
1247 | 1150 | ||
1248 | mutex_init(&ctrl->crit_sect); | 1151 | mutex_init(&ctrl->crit_sect); |
1249 | mutex_init(&ctrl->ctrl_lock); | 1152 | mutex_init(&ctrl->ctrl_lock); |
@@ -1267,7 +1170,8 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev) | |||
1267 | 1170 | ||
1268 | dbg("%s: SLOTCTRL %x value read %x\n", | 1171 | dbg("%s: SLOTCTRL %x value read %x\n", |
1269 | __FUNCTION__, ctrl->cap_base + SLOTCTRL, temp_word); | 1172 | __FUNCTION__, ctrl->cap_base + SLOTCTRL, temp_word); |
1270 | temp_word = (temp_word & ~HP_INTR_ENABLE & ~CMD_CMPL_INTR_ENABLE) | 0x00; | 1173 | temp_word = (temp_word & ~HP_INTR_ENABLE & ~CMD_CMPL_INTR_ENABLE) | |
1174 | 0x00; | ||
1271 | 1175 | ||
1272 | rc = pciehp_writew(ctrl, SLOTCTRL, temp_word); | 1176 | rc = pciehp_writew(ctrl, SLOTCTRL, temp_word); |
1273 | if (rc) { | 1177 | if (rc) { |
@@ -1330,14 +1234,14 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev) | |||
1330 | 1234 | ||
1331 | if (ATTN_BUTTN(slot_cap)) | 1235 | if (ATTN_BUTTN(slot_cap)) |
1332 | intr_enable = intr_enable | ATTN_BUTTN_ENABLE; | 1236 | intr_enable = intr_enable | ATTN_BUTTN_ENABLE; |
1333 | 1237 | ||
1334 | if (POWER_CTRL(slot_cap)) | 1238 | if (POWER_CTRL(slot_cap)) |
1335 | intr_enable = intr_enable | PWR_FAULT_DETECT_ENABLE; | 1239 | intr_enable = intr_enable | PWR_FAULT_DETECT_ENABLE; |
1336 | 1240 | ||
1337 | if (MRL_SENS(slot_cap)) | 1241 | if (MRL_SENS(slot_cap)) |
1338 | intr_enable = intr_enable | MRL_DETECT_ENABLE; | 1242 | intr_enable = intr_enable | MRL_DETECT_ENABLE; |
1339 | 1243 | ||
1340 | temp_word = (temp_word & ~intr_enable) | intr_enable; | 1244 | temp_word = (temp_word & ~intr_enable) | intr_enable; |
1341 | 1245 | ||
1342 | if (pciehp_poll_mode) { | 1246 | if (pciehp_poll_mode) { |
1343 | temp_word = (temp_word & ~HP_INTR_ENABLE) | 0x0; | 1247 | temp_word = (temp_word & ~HP_INTR_ENABLE) | 0x0; |
@@ -1345,7 +1249,10 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev) | |||
1345 | temp_word = (temp_word & ~HP_INTR_ENABLE) | HP_INTR_ENABLE; | 1249 | temp_word = (temp_word & ~HP_INTR_ENABLE) | HP_INTR_ENABLE; |
1346 | } | 1250 | } |
1347 | 1251 | ||
1348 | /* Unmask Hot-plug Interrupt Enable for the interrupt notification mechanism case */ | 1252 | /* |
1253 | * Unmask Hot-plug Interrupt Enable for the interrupt | ||
1254 | * notification mechanism case. | ||
1255 | */ | ||
1349 | rc = pciehp_writew(ctrl, SLOTCTRL, temp_word); | 1256 | rc = pciehp_writew(ctrl, SLOTCTRL, temp_word); |
1350 | if (rc) { | 1257 | if (rc) { |
1351 | err("%s: Cannot write to SLOTCTRL register\n", __FUNCTION__); | 1258 | err("%s: Cannot write to SLOTCTRL register\n", __FUNCTION__); |
@@ -1356,14 +1263,14 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev) | |||
1356 | err("%s: Cannot read SLOTSTATUS register\n", __FUNCTION__); | 1263 | err("%s: Cannot read SLOTSTATUS register\n", __FUNCTION__); |
1357 | goto abort_disable_intr; | 1264 | goto abort_disable_intr; |
1358 | } | 1265 | } |
1359 | 1266 | ||
1360 | temp_word = 0x1F; /* Clear all events */ | 1267 | temp_word = 0x1F; /* Clear all events */ |
1361 | rc = pciehp_writew(ctrl, SLOTSTATUS, temp_word); | 1268 | rc = pciehp_writew(ctrl, SLOTSTATUS, temp_word); |
1362 | if (rc) { | 1269 | if (rc) { |
1363 | err("%s: Cannot write to SLOTSTATUS register\n", __FUNCTION__); | 1270 | err("%s: Cannot write to SLOTSTATUS register\n", __FUNCTION__); |
1364 | goto abort_disable_intr; | 1271 | goto abort_disable_intr; |
1365 | } | 1272 | } |
1366 | 1273 | ||
1367 | if (pciehp_force) { | 1274 | if (pciehp_force) { |
1368 | dbg("Bypassing BIOS check for pciehp use on %s\n", | 1275 | dbg("Bypassing BIOS check for pciehp use on %s\n", |
1369 | pci_name(ctrl->pci_dev)); | 1276 | pci_name(ctrl->pci_dev)); |
@@ -1375,10 +1282,9 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev) | |||
1375 | 1282 | ||
1376 | ctrl->hpc_ops = &pciehp_hpc_ops; | 1283 | ctrl->hpc_ops = &pciehp_hpc_ops; |
1377 | 1284 | ||
1378 | DBG_LEAVE_ROUTINE | ||
1379 | return 0; | 1285 | return 0; |
1380 | 1286 | ||
1381 | /* We end up here for the many possible ways to fail this API. */ | 1287 | /* We end up here for the many possible ways to fail this API. */ |
1382 | abort_disable_intr: | 1288 | abort_disable_intr: |
1383 | rc = pciehp_readw(ctrl, SLOTCTRL, &temp_word); | 1289 | rc = pciehp_readw(ctrl, SLOTCTRL, &temp_word); |
1384 | if (!rc) { | 1290 | if (!rc) { |
@@ -1395,6 +1301,5 @@ abort_free_irq: | |||
1395 | free_irq(ctrl->pci_dev->irq, ctrl); | 1301 | free_irq(ctrl->pci_dev->irq, ctrl); |
1396 | 1302 | ||
1397 | abort_free_ctlr: | 1303 | abort_free_ctlr: |
1398 | DBG_LEAVE_ROUTINE | ||
1399 | return -1; | 1304 | return -1; |
1400 | } | 1305 | } |
diff --git a/drivers/pci/hotplug/pciehp_pci.c b/drivers/pci/hotplug/pciehp_pci.c index 854aaea09e4d..c424aded13fb 100644 --- a/drivers/pci/hotplug/pciehp_pci.c +++ b/drivers/pci/hotplug/pciehp_pci.c | |||
@@ -243,9 +243,10 @@ int pciehp_configure_device(struct slot *p_slot) | |||
243 | 243 | ||
244 | int pciehp_unconfigure_device(struct slot *p_slot) | 244 | int pciehp_unconfigure_device(struct slot *p_slot) |
245 | { | 245 | { |
246 | int rc = 0; | 246 | int ret, rc = 0; |
247 | int j; | 247 | int j; |
248 | u8 bctl = 0; | 248 | u8 bctl = 0; |
249 | u8 presence = 0; | ||
249 | struct pci_bus *parent = p_slot->ctrl->pci_dev->subordinate; | 250 | struct pci_bus *parent = p_slot->ctrl->pci_dev->subordinate; |
250 | 251 | ||
251 | dbg("%s: bus/dev = %x/%x\n", __FUNCTION__, p_slot->bus, | 252 | dbg("%s: bus/dev = %x/%x\n", __FUNCTION__, p_slot->bus, |
@@ -263,23 +264,28 @@ int pciehp_unconfigure_device(struct slot *p_slot) | |||
263 | continue; | 264 | continue; |
264 | } | 265 | } |
265 | if (temp->hdr_type == PCI_HEADER_TYPE_BRIDGE) { | 266 | if (temp->hdr_type == PCI_HEADER_TYPE_BRIDGE) { |
266 | pci_read_config_byte(temp, PCI_BRIDGE_CONTROL, &bctl); | 267 | ret = p_slot->hpc_ops->get_adapter_status(p_slot, |
267 | if (bctl & PCI_BRIDGE_CTL_VGA) { | 268 | &presence); |
268 | err("Cannot remove display device %s\n", | 269 | if (!ret && presence) { |
270 | pci_read_config_byte(temp, PCI_BRIDGE_CONTROL, | ||
271 | &bctl); | ||
272 | if (bctl & PCI_BRIDGE_CTL_VGA) { | ||
273 | err("Cannot remove display device %s\n", | ||
269 | pci_name(temp)); | 274 | pci_name(temp)); |
270 | pci_dev_put(temp); | 275 | pci_dev_put(temp); |
271 | continue; | 276 | continue; |
277 | } | ||
272 | } | 278 | } |
273 | } | 279 | } |
274 | pci_remove_bus_device(temp); | 280 | pci_remove_bus_device(temp); |
275 | pci_dev_put(temp); | 281 | pci_dev_put(temp); |
276 | } | 282 | } |
277 | /* | 283 | /* |
278 | * Some PCI Express root ports require fixup after hot-plug operation. | 284 | * Some PCI Express root ports require fixup after hot-plug operation. |
279 | */ | 285 | */ |
280 | if (pcie_mch_quirk) | 286 | if (pcie_mch_quirk) |
281 | pci_fixup_device(pci_fixup_final, p_slot->ctrl->pci_dev); | 287 | pci_fixup_device(pci_fixup_final, p_slot->ctrl->pci_dev); |
282 | 288 | ||
283 | return rc; | 289 | return rc; |
284 | } | 290 | } |
285 | 291 | ||