diff options
author | Bjorn Helgaas <bhelgaas@google.com> | 2013-12-14 15:06:16 -0500 |
---|---|---|
committer | Bjorn Helgaas <bhelgaas@google.com> | 2013-12-15 18:07:32 -0500 |
commit | 6dae62020f0e6a2ffe424c8cea542fa49d42ec6e (patch) | |
tree | 57f76e124dcccc1a84dfe0655e213d3a28351e91 /drivers/pci/hotplug/pciehp_hpc.c | |
parent | 1a84b99ccbb954ce201024691babfe4d7d9f506f (diff) |
PCI: pciehp: Make various functions void since they can't fail
These functions:
pcie_enable_notification()
pciehp_power_off_slot()
pciehp_get_power_status()
pciehp_get_attention_status()
pciehp_set_attention_status()
pciehp_get_latch_status()
pciehp_get_adapter_status()
pcie_write_cmd()
now always return success, so this patch makes them void and drops the
error-checking code in their callers.
No functional change.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers/pci/hotplug/pciehp_hpc.c')
-rw-r--r-- | drivers/pci/hotplug/pciehp_hpc.c | 56 |
1 files changed, 16 insertions, 40 deletions
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c index 6afdd2358227..83df74910f9a 100644 --- a/drivers/pci/hotplug/pciehp_hpc.c +++ b/drivers/pci/hotplug/pciehp_hpc.c | |||
@@ -153,7 +153,7 @@ static void pcie_wait_cmd(struct controller *ctrl, int poll) | |||
153 | * @cmd: command value written to slot control register | 153 | * @cmd: command value written to slot control register |
154 | * @mask: bitmask of slot control register to be modified | 154 | * @mask: bitmask of slot control register to be modified |
155 | */ | 155 | */ |
156 | static int pcie_write_cmd(struct controller *ctrl, u16 cmd, u16 mask) | 156 | static void pcie_write_cmd(struct controller *ctrl, u16 cmd, u16 mask) |
157 | { | 157 | { |
158 | struct pci_dev *pdev = ctrl_dev(ctrl); | 158 | struct pci_dev *pdev = ctrl_dev(ctrl); |
159 | u16 slot_status; | 159 | u16 slot_status; |
@@ -208,7 +208,6 @@ static int pcie_write_cmd(struct controller *ctrl, u16 cmd, u16 mask) | |||
208 | pcie_wait_cmd(ctrl, poll); | 208 | pcie_wait_cmd(ctrl, poll); |
209 | } | 209 | } |
210 | mutex_unlock(&ctrl->ctrl_lock); | 210 | mutex_unlock(&ctrl->ctrl_lock); |
211 | return 0; | ||
212 | } | 211 | } |
213 | 212 | ||
214 | static bool check_link_active(struct controller *ctrl) | 213 | static bool check_link_active(struct controller *ctrl) |
@@ -342,7 +341,7 @@ static int pciehp_link_disable(struct controller *ctrl) | |||
342 | return __pciehp_link_set(ctrl, false); | 341 | return __pciehp_link_set(ctrl, false); |
343 | } | 342 | } |
344 | 343 | ||
345 | int pciehp_get_attention_status(struct slot *slot, u8 *status) | 344 | void pciehp_get_attention_status(struct slot *slot, u8 *status) |
346 | { | 345 | { |
347 | struct controller *ctrl = slot->ctrl; | 346 | struct controller *ctrl = slot->ctrl; |
348 | struct pci_dev *pdev = ctrl_dev(ctrl); | 347 | struct pci_dev *pdev = ctrl_dev(ctrl); |
@@ -372,11 +371,9 @@ int pciehp_get_attention_status(struct slot *slot, u8 *status) | |||
372 | *status = 0xFF; | 371 | *status = 0xFF; |
373 | break; | 372 | break; |
374 | } | 373 | } |
375 | |||
376 | return 0; | ||
377 | } | 374 | } |
378 | 375 | ||
379 | int pciehp_get_power_status(struct slot *slot, u8 *status) | 376 | void pciehp_get_power_status(struct slot *slot, u8 *status) |
380 | { | 377 | { |
381 | struct controller *ctrl = slot->ctrl; | 378 | struct controller *ctrl = slot->ctrl; |
382 | struct pci_dev *pdev = ctrl_dev(ctrl); | 379 | struct pci_dev *pdev = ctrl_dev(ctrl); |
@@ -400,28 +397,24 @@ int pciehp_get_power_status(struct slot *slot, u8 *status) | |||
400 | *status = 0xFF; | 397 | *status = 0xFF; |
401 | break; | 398 | break; |
402 | } | 399 | } |
403 | |||
404 | return 0; | ||
405 | } | 400 | } |
406 | 401 | ||
407 | int pciehp_get_latch_status(struct slot *slot, u8 *status) | 402 | void pciehp_get_latch_status(struct slot *slot, u8 *status) |
408 | { | 403 | { |
409 | struct pci_dev *pdev = ctrl_dev(slot->ctrl); | 404 | struct pci_dev *pdev = ctrl_dev(slot->ctrl); |
410 | u16 slot_status; | 405 | u16 slot_status; |
411 | 406 | ||
412 | pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status); | 407 | pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status); |
413 | *status = !!(slot_status & PCI_EXP_SLTSTA_MRLSS); | 408 | *status = !!(slot_status & PCI_EXP_SLTSTA_MRLSS); |
414 | return 0; | ||
415 | } | 409 | } |
416 | 410 | ||
417 | int pciehp_get_adapter_status(struct slot *slot, u8 *status) | 411 | void pciehp_get_adapter_status(struct slot *slot, u8 *status) |
418 | { | 412 | { |
419 | struct pci_dev *pdev = ctrl_dev(slot->ctrl); | 413 | struct pci_dev *pdev = ctrl_dev(slot->ctrl); |
420 | u16 slot_status; | 414 | u16 slot_status; |
421 | 415 | ||
422 | pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status); | 416 | pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status); |
423 | *status = !!(slot_status & PCI_EXP_SLTSTA_PDS); | 417 | *status = !!(slot_status & PCI_EXP_SLTSTA_PDS); |
424 | return 0; | ||
425 | } | 418 | } |
426 | 419 | ||
427 | int pciehp_query_power_fault(struct slot *slot) | 420 | int pciehp_query_power_fault(struct slot *slot) |
@@ -433,7 +426,7 @@ int pciehp_query_power_fault(struct slot *slot) | |||
433 | return !!(slot_status & PCI_EXP_SLTSTA_PFD); | 426 | return !!(slot_status & PCI_EXP_SLTSTA_PFD); |
434 | } | 427 | } |
435 | 428 | ||
436 | int pciehp_set_attention_status(struct slot *slot, u8 value) | 429 | void pciehp_set_attention_status(struct slot *slot, u8 value) |
437 | { | 430 | { |
438 | struct controller *ctrl = slot->ctrl; | 431 | struct controller *ctrl = slot->ctrl; |
439 | u16 slot_cmd; | 432 | u16 slot_cmd; |
@@ -451,11 +444,11 @@ int pciehp_set_attention_status(struct slot *slot, u8 value) | |||
451 | slot_cmd = 0x0080; | 444 | slot_cmd = 0x0080; |
452 | break; | 445 | break; |
453 | default: | 446 | default: |
454 | return -EINVAL; | 447 | return; |
455 | } | 448 | } |
456 | ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, | 449 | ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, |
457 | pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_cmd); | 450 | pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_cmd); |
458 | return pcie_write_cmd(ctrl, slot_cmd, cmd_mask); | 451 | pcie_write_cmd(ctrl, slot_cmd, cmd_mask); |
459 | } | 452 | } |
460 | 453 | ||
461 | void pciehp_green_led_on(struct slot *slot) | 454 | void pciehp_green_led_on(struct slot *slot) |
@@ -515,11 +508,7 @@ int pciehp_power_on_slot(struct slot * slot) | |||
515 | 508 | ||
516 | slot_cmd = POWER_ON; | 509 | slot_cmd = POWER_ON; |
517 | cmd_mask = PCI_EXP_SLTCTL_PCC; | 510 | cmd_mask = PCI_EXP_SLTCTL_PCC; |
518 | retval = pcie_write_cmd(ctrl, slot_cmd, cmd_mask); | 511 | pcie_write_cmd(ctrl, slot_cmd, cmd_mask); |
519 | if (retval) { | ||
520 | ctrl_err(ctrl, "Write %x command failed!\n", slot_cmd); | ||
521 | return retval; | ||
522 | } | ||
523 | ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, | 512 | ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, |
524 | pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_cmd); | 513 | pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_cmd); |
525 | 514 | ||
@@ -530,12 +519,11 @@ int pciehp_power_on_slot(struct slot * slot) | |||
530 | return retval; | 519 | return retval; |
531 | } | 520 | } |
532 | 521 | ||
533 | int pciehp_power_off_slot(struct slot * slot) | 522 | void pciehp_power_off_slot(struct slot * slot) |
534 | { | 523 | { |
535 | struct controller *ctrl = slot->ctrl; | 524 | struct controller *ctrl = slot->ctrl; |
536 | u16 slot_cmd; | 525 | u16 slot_cmd; |
537 | u16 cmd_mask; | 526 | u16 cmd_mask; |
538 | int retval; | ||
539 | 527 | ||
540 | /* Disable the link at first */ | 528 | /* Disable the link at first */ |
541 | pciehp_link_disable(ctrl); | 529 | pciehp_link_disable(ctrl); |
@@ -547,14 +535,9 @@ int pciehp_power_off_slot(struct slot * slot) | |||
547 | 535 | ||
548 | slot_cmd = POWER_OFF; | 536 | slot_cmd = POWER_OFF; |
549 | cmd_mask = PCI_EXP_SLTCTL_PCC; | 537 | cmd_mask = PCI_EXP_SLTCTL_PCC; |
550 | retval = pcie_write_cmd(ctrl, slot_cmd, cmd_mask); | 538 | pcie_write_cmd(ctrl, slot_cmd, cmd_mask); |
551 | if (retval) { | ||
552 | ctrl_err(ctrl, "Write command failed!\n"); | ||
553 | return retval; | ||
554 | } | ||
555 | ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, | 539 | ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, |
556 | pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_cmd); | 540 | pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_cmd); |
557 | return 0; | ||
558 | } | 541 | } |
559 | 542 | ||
560 | static irqreturn_t pcie_isr(int irq, void *dev_id) | 543 | static irqreturn_t pcie_isr(int irq, void *dev_id) |
@@ -617,7 +600,7 @@ static irqreturn_t pcie_isr(int irq, void *dev_id) | |||
617 | return IRQ_HANDLED; | 600 | return IRQ_HANDLED; |
618 | } | 601 | } |
619 | 602 | ||
620 | int pcie_enable_notification(struct controller *ctrl) | 603 | void pcie_enable_notification(struct controller *ctrl) |
621 | { | 604 | { |
622 | u16 cmd, mask; | 605 | u16 cmd, mask; |
623 | 606 | ||
@@ -643,22 +626,18 @@ int pcie_enable_notification(struct controller *ctrl) | |||
643 | PCI_EXP_SLTCTL_MRLSCE | PCI_EXP_SLTCTL_PFDE | | 626 | PCI_EXP_SLTCTL_MRLSCE | PCI_EXP_SLTCTL_PFDE | |
644 | PCI_EXP_SLTCTL_HPIE | PCI_EXP_SLTCTL_CCIE); | 627 | PCI_EXP_SLTCTL_HPIE | PCI_EXP_SLTCTL_CCIE); |
645 | 628 | ||
646 | if (pcie_write_cmd(ctrl, cmd, mask)) { | 629 | pcie_write_cmd(ctrl, cmd, mask); |
647 | ctrl_err(ctrl, "Cannot enable software notification\n"); | ||
648 | return -1; | ||
649 | } | ||
650 | return 0; | ||
651 | } | 630 | } |
652 | 631 | ||
653 | static void pcie_disable_notification(struct controller *ctrl) | 632 | static void pcie_disable_notification(struct controller *ctrl) |
654 | { | 633 | { |
655 | u16 mask; | 634 | u16 mask; |
635 | |||
656 | mask = (PCI_EXP_SLTCTL_PDCE | PCI_EXP_SLTCTL_ABPE | | 636 | mask = (PCI_EXP_SLTCTL_PDCE | PCI_EXP_SLTCTL_ABPE | |
657 | PCI_EXP_SLTCTL_MRLSCE | PCI_EXP_SLTCTL_PFDE | | 637 | PCI_EXP_SLTCTL_MRLSCE | PCI_EXP_SLTCTL_PFDE | |
658 | PCI_EXP_SLTCTL_HPIE | PCI_EXP_SLTCTL_CCIE | | 638 | PCI_EXP_SLTCTL_HPIE | PCI_EXP_SLTCTL_CCIE | |
659 | PCI_EXP_SLTCTL_DLLSCE); | 639 | PCI_EXP_SLTCTL_DLLSCE); |
660 | if (pcie_write_cmd(ctrl, 0, mask)) | 640 | pcie_write_cmd(ctrl, 0, mask); |
661 | ctrl_warn(ctrl, "Cannot disable software notification\n"); | ||
662 | } | 641 | } |
663 | 642 | ||
664 | /* | 643 | /* |
@@ -698,10 +677,7 @@ int pcie_init_notification(struct controller *ctrl) | |||
698 | { | 677 | { |
699 | if (pciehp_request_irq(ctrl)) | 678 | if (pciehp_request_irq(ctrl)) |
700 | return -1; | 679 | return -1; |
701 | if (pcie_enable_notification(ctrl)) { | 680 | pcie_enable_notification(ctrl); |
702 | pciehp_free_irq(ctrl); | ||
703 | return -1; | ||
704 | } | ||
705 | ctrl->notification_enabled = 1; | 681 | ctrl->notification_enabled = 1; |
706 | return 0; | 682 | return 0; |
707 | } | 683 | } |