diff options
author | Bjorn Helgaas <bhelgaas@google.com> | 2013-12-09 17:11:25 -0500 |
---|---|---|
committer | Bjorn Helgaas <bhelgaas@google.com> | 2013-12-09 17:11:25 -0500 |
commit | 0b8cfb6aa3aabc96177b1e68ef13d2eb5c686606 (patch) | |
tree | f73f50a95fffacf1db6ef809012a9930ef3f938c /drivers/pci/host | |
parent | 64989e7399f09b72689e25fb40f2d0d5e073b13a (diff) |
PCI: designware: Use typical "for" loop idiom
It's conventional to use "for" rather than "while" for simple iteration.
No functional change.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers/pci/host')
-rw-r--r-- | drivers/pci/host/pcie-designware.c | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/drivers/pci/host/pcie-designware.c b/drivers/pci/host/pcie-designware.c index 5274085ecd4b..1c92833a4ed3 100644 --- a/drivers/pci/host/pcie-designware.c +++ b/drivers/pci/host/pcie-designware.c | |||
@@ -214,8 +214,7 @@ static void clear_irq_range(struct pcie_port *pp, unsigned int irq_base, | |||
214 | { | 214 | { |
215 | unsigned int i, res, bit, val; | 215 | unsigned int i, res, bit, val; |
216 | 216 | ||
217 | i = 0; | 217 | for (i = 0; i < nvec; i++) { |
218 | while (i < nvec) { | ||
219 | irq_set_msi_desc_off(irq_base, i, NULL); | 218 | irq_set_msi_desc_off(irq_base, i, NULL); |
220 | clear_bit(pos + i, pp->msi_irq_in_use); | 219 | clear_bit(pos + i, pp->msi_irq_in_use); |
221 | /* Disable corresponding interrupt on MSI interrupt controller */ | 220 | /* Disable corresponding interrupt on MSI interrupt controller */ |
@@ -224,7 +223,6 @@ static void clear_irq_range(struct pcie_port *pp, unsigned int irq_base, | |||
224 | dw_pcie_rd_own_conf(pp, PCIE_MSI_INTR0_ENABLE + res, 4, &val); | 223 | dw_pcie_rd_own_conf(pp, PCIE_MSI_INTR0_ENABLE + res, 4, &val); |
225 | val &= ~(1 << bit); | 224 | val &= ~(1 << bit); |
226 | dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_ENABLE + res, 4, val); | 225 | dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_ENABLE + res, 4, val); |
227 | ++i; | ||
228 | } | 226 | } |
229 | } | 227 | } |
230 | 228 | ||
@@ -268,8 +266,7 @@ static int assign_irq(int no_irqs, struct msi_desc *desc, int *pos) | |||
268 | * descs are also successfully allocated. | 266 | * descs are also successfully allocated. |
269 | */ | 267 | */ |
270 | 268 | ||
271 | i = 0; | 269 | for (i = 0; i < no_irqs; i++) { |
272 | while (i < no_irqs) { | ||
273 | if (irq_set_msi_desc_off(irq, i, desc) != 0) { | 270 | if (irq_set_msi_desc_off(irq, i, desc) != 0) { |
274 | clear_irq_range(pp, irq, i, pos0); | 271 | clear_irq_range(pp, irq, i, pos0); |
275 | goto no_valid_irq; | 272 | goto no_valid_irq; |
@@ -281,7 +278,6 @@ static int assign_irq(int no_irqs, struct msi_desc *desc, int *pos) | |||
281 | dw_pcie_rd_own_conf(pp, PCIE_MSI_INTR0_ENABLE + res, 4, &val); | 278 | dw_pcie_rd_own_conf(pp, PCIE_MSI_INTR0_ENABLE + res, 4, &val); |
282 | val |= 1 << bit; | 279 | val |= 1 << bit; |
283 | dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_ENABLE + res, 4, val); | 280 | dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_ENABLE + res, 4, val); |
284 | i++; | ||
285 | } | 281 | } |
286 | 282 | ||
287 | *pos = pos0; | 283 | *pos = pos0; |