Merge branch 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm into next

Pull ARM updates from Russell King:

 - Major clean-up of the L2 cache support code.  The existing mess was
   becoming rather unmaintainable through all the additions that others
   have done over time.  This turns it into a much nicer structure, and
   implements a few performance improvements as well.

 - Clean up some of the CP15 control register tweaks for alignment
   support, moving some code and data into alignment.c

 - DMA properties for ARM, from Santosh and reviewed by DT people.  This
   adds DT properties to specify bus translations we can't discover
   automatically, and to indicate whether devices are coherent.

 - Hibernation support for ARM

 - Make ftrace work with read-only text in modules

 - add suspend support for PJ4B CPUs

 - rework interrupt masking for undefined instruction handling, which
   allows us to enable interrupts earlier in the handling of these
   exceptions.

 - support for big endian page tables

 - fix stacktrace support to exclude stacktrace functions from the
   trace, and add save_stack_trace_regs() implementation so that kprobes
   can record stack traces.

 - Add support for the Cortex-A17 CPU.

 - Remove last vestiges of ARM710 support.

 - Removal of ARM "meminfo" structure, finally converting us solely to
   memblock to handle the early memory initialisation.

* 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: (142 commits)
  ARM: ensure C page table setup code follows assembly code (part II)
  ARM: ensure C page table setup code follows assembly code
  ARM: consolidate last remaining open-coded alignment trap enable
  ARM: remove global cr_no_alignment
  ARM: remove CPU_CP15 conditional from alignment.c
  ARM: remove unused adjust_cr() function
  ARM: move "noalign" command line option to alignment.c
  ARM: provide common method to clear bits in CPU control register
  ARM: 8025/1: Get rid of meminfo
  ARM: 8060/1: mm: allow sub-architectures to override PCI I/O memory type
  ARM: 8066/1: correction for ARM patch 8031/2
  ARM: 8049/1: ftrace/add save_stack_trace_regs() implementation
  ARM: 8065/1: remove last use of CONFIG_CPU_ARM710
  ARM: 8062/1: Modify ldrt fixup handler to re-execute the userspace instruction
  ARM: 8047/1: rwsem: use asm-generic rwsem implementation
  ARM: l2c: trial at enabling some Cortex-A9 optimisations
  ARM: l2c: add warnings for stuff modifying aux_ctrl register values
  ARM: l2c: print a warning with L2C-310 caches if the cache size is modified
  ARM: l2c: remove old .set_debug method
  ARM: l2c: kill L2X0_AUX_CTRL_MASK before anyone else makes use of this
  ...

2 files changed, 169 insertions, 6 deletions

diff --git a/drivers/of/address.c b/drivers/of/address.c
index 95351b2a112c..5edfcb0da37d 100644
--- a/drivers/of/address.c
+++ b/drivers/of/address.c
@@ -701,3 +701,113 @@ void __iomem *of_iomap(struct device_node *np, int index)
         return ioremap(res.start, resource_size(&res));
 }
 EXPORT_SYMBOL(of_iomap);
+
+/**
+ * of_dma_get_range - Get DMA range info
+ * @np:         device node to get DMA range info
+ * @dma_addr:   pointer to store initial DMA address of DMA range
+ * @paddr:      pointer to store initial CPU address of DMA range
+ * @size:       pointer to store size of DMA range
+ *
+ * Look in bottom up direction for the first "dma-ranges" property
+ * and parse it.
+ *  dma-ranges format:
+ *      DMA addr (dma_addr)     : naddr cells
+ *      CPU addr (phys_addr_t)  : pna cells
+ *      size                    : nsize cells
+ *
+ * It returns -ENODEV if "dma-ranges" property was not found
+ * for this device in DT.
+ */
+int of_dma_get_range(struct device_node *np, u64 *dma_addr, u64 *paddr, u64 *size)
+{
+        struct device_node *node = of_node_get(np);
+        const __be32 *ranges = NULL;
+        int len, naddr, nsize, pna;
+        int ret = 0;
+        u64 dmaaddr;
+
+        if (!node)
+                return -EINVAL;
+
+        while (1) {
+                naddr = of_n_addr_cells(node);
+                nsize = of_n_size_cells(node);
+                node = of_get_next_parent(node);
+                if (!node)
+                        break;
+
+                ranges = of_get_property(node, "dma-ranges", &len);
+
+                /* Ignore empty ranges, they imply no translation required */
+                if (ranges && len > 0)
+                        break;
+
+                /*
+                 * At least empty ranges has to be defined for parent node if
+                 * DMA is supported
+                 */
+                if (!ranges)
+                        break;
+        }
+
+        if (!ranges) {
+                pr_debug("%s: no dma-ranges found for node(%s)\n",
+                         __func__, np->full_name);
+                ret = -ENODEV;
+                goto out;
+        }
+
+        len /= sizeof(u32);
+
+        pna = of_n_addr_cells(node);
+
+        /* dma-ranges format:
+         * DMA addr     : naddr cells
+         * CPU addr     : pna cells
+         * size         : nsize cells
+         */
+        dmaaddr = of_read_number(ranges, naddr);
+        *paddr = of_translate_dma_address(np, ranges);
+        if (*paddr == OF_BAD_ADDR) {
+                pr_err("%s: translation of DMA address(%pad) to CPU address failed node(%s)\n",
+                       __func__, dma_addr, np->full_name);
+                ret = -EINVAL;
+                goto out;
+        }
+        *dma_addr = dmaaddr;
+
+        *size = of_read_number(ranges + naddr + pna, nsize);
+
+        pr_debug("dma_addr(%llx) cpu_addr(%llx) size(%llx)\n",
+                 *dma_addr, *paddr, *size);
+
+out:
+        of_node_put(node);
+
+        return ret;
+}
+EXPORT_SYMBOL_GPL(of_dma_get_range);
+
+/**
+ * of_dma_is_coherent - Check if device is coherent
+ * @np: device node
+ *
+ * It returns true if "dma-coherent" property was found
+ * for this device in DT.
+ */
+bool of_dma_is_coherent(struct device_node *np)
+{
+        struct device_node *node = of_node_get(np);
+
+        while (node) {
+                if (of_property_read_bool(node, "dma-coherent")) {
+                        of_node_put(node);
+                        return true;
+                }
+                node = of_get_next_parent(node);
+        }
+        of_node_put(node);
+        return false;
+}
+EXPORT_SYMBOL_GPL(of_dma_is_coherent);
diff --git a/drivers/of/platform.c b/drivers/of/platform.c
index 92c060e58b02..d90a02d89f51 100644
--- a/drivers/of/platform.c
+++ b/drivers/of/platform.c
@@ -153,6 +153,64 @@ struct platform_device *of_device_alloc(struct device_node *np,
 EXPORT_SYMBOL(of_device_alloc);
 
 /**
+ * of_dma_configure - Setup DMA configuration
+ * @dev:        Device to apply DMA configuration
+ *
+ * Try to get devices's DMA configuration from DT and update it
+ * accordingly.
+ *
+ * In case if platform code need to use own special DMA configuration,it
+ * can use Platform bus notifier and handle BUS_NOTIFY_ADD_DEVICE event
+ * to fix up DMA configuration.
+ */
+static void of_dma_configure(struct platform_device *pdev)
+{
+        u64 dma_addr, paddr, size;
+        int ret;
+        struct device *dev = &pdev->dev;
+
+#if defined(CONFIG_MICROBLAZE)
+        pdev->archdata.dma_mask = 0xffffffffUL;
+#endif
+
+        /*
+         * Set default dma-mask to 32 bit. Drivers are expected to setup
+         * the correct supported dma_mask.
+         */
+        dev->coherent_dma_mask = DMA_BIT_MASK(32);
+
+        /*
+         * Set it to coherent_dma_mask by default if the architecture
+         * code has not set it.
+         */
+        if (!dev->dma_mask)
+                dev->dma_mask = &dev->coherent_dma_mask;
+
+        /*
+         * if dma-coherent property exist, call arch hook to setup
+         * dma coherent operations.
+         */
+        if (of_dma_is_coherent(dev->of_node)) {
+                set_arch_dma_coherent_ops(dev);
+                dev_dbg(dev, "device is dma coherent\n");
+        }
+
+        /*
+         * if dma-ranges property doesn't exist - just return else
+         * setup the dma offset
+         */
+        ret = of_dma_get_range(dev->of_node, &dma_addr, &paddr, &size);
+        if (ret < 0) {
+                dev_dbg(dev, "no dma range information to setup\n");
+                return;
+        }
+
+        /* DMA ranges found. Calculate and set dma_pfn_offset */
+        dev->dma_pfn_offset = PFN_DOWN(paddr - dma_addr);
+        dev_dbg(dev, "dma_pfn_offset(%#08lx)\n", dev->dma_pfn_offset);
+}
+
+/**
  * of_platform_device_create_pdata - Alloc, initialize and register an of_device
  * @np: pointer to node to create device for
  * @bus_id: name to assign device
@@ -178,12 +236,7 @@ static struct platform_device *of_platform_device_create_pdata(
         if (!dev)
                 goto err_clear_flag;
 
-#if defined(CONFIG_MICROBLAZE)
-        dev->archdata.dma_mask = 0xffffffffUL;
-#endif
-        dev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
-        if (!dev->dev.dma_mask)
-                dev->dev.dma_mask = &dev->dev.coherent_dma_mask;
+        of_dma_configure(dev);
         dev->dev.bus = &platform_bus_type;
         dev->dev.platform_data = platform_data;