diff options
author | Jon Mason <jon.mason@intel.com> | 2013-07-15 18:33:18 -0400 |
---|---|---|
committer | Jon Mason <jon.mason@intel.com> | 2013-09-05 14:07:59 -0400 |
commit | b1ef004303fba92cd28ed32dd3caed3438238f76 (patch) | |
tree | 78de37a133b409d7a978c386e999bb6060ad7105 /drivers/ntb | |
parent | ed6c24eda97b6bdcd013dbd91cc5c8b02de507e9 (diff) |
NTB: Remove References of non-B2B BWD HW
NTB-RP is not a supported configuration on BWD hardware. Remove the
code attempting to set it up.
Signed-off-by: Jon Mason <jon.mason@intel.com>
Diffstat (limited to 'drivers/ntb')
-rw-r--r-- | drivers/ntb/ntb_hw.c | 16 | ||||
-rw-r--r-- | drivers/ntb/ntb_regs.h | 1 |
2 files changed, 4 insertions, 13 deletions
diff --git a/drivers/ntb/ntb_hw.c b/drivers/ntb/ntb_hw.c index 2f3ff73b1d1b..69cd834a8380 100644 --- a/drivers/ntb/ntb_hw.c +++ b/drivers/ntb/ntb_hw.c | |||
@@ -842,7 +842,7 @@ static int ntb_bwd_setup(struct ntb_device *ndev) | |||
842 | break; | 842 | break; |
843 | case NTB_CONN_RP: | 843 | case NTB_CONN_RP: |
844 | default: | 844 | default: |
845 | dev_err(&ndev->pdev->dev, "Only B2B supported at this time\n"); | 845 | dev_err(&ndev->pdev->dev, "Unsupported NTB configuration\n"); |
846 | return -EINVAL; | 846 | return -EINVAL; |
847 | } | 847 | } |
848 | 848 | ||
@@ -859,24 +859,16 @@ static int ntb_bwd_setup(struct ntb_device *ndev) | |||
859 | 859 | ||
860 | ndev->reg_ofs.ldb = ndev->reg_base + BWD_PDOORBELL_OFFSET; | 860 | ndev->reg_ofs.ldb = ndev->reg_base + BWD_PDOORBELL_OFFSET; |
861 | ndev->reg_ofs.ldb_mask = ndev->reg_base + BWD_PDBMSK_OFFSET; | 861 | ndev->reg_ofs.ldb_mask = ndev->reg_base + BWD_PDBMSK_OFFSET; |
862 | ndev->reg_ofs.rdb = ndev->reg_base + BWD_B2B_DOORBELL_OFFSET; | ||
862 | ndev->reg_ofs.bar2_xlat = ndev->reg_base + BWD_SBAR2XLAT_OFFSET; | 863 | ndev->reg_ofs.bar2_xlat = ndev->reg_base + BWD_SBAR2XLAT_OFFSET; |
863 | ndev->reg_ofs.bar4_xlat = ndev->reg_base + BWD_SBAR4XLAT_OFFSET; | 864 | ndev->reg_ofs.bar4_xlat = ndev->reg_base + BWD_SBAR4XLAT_OFFSET; |
864 | ndev->reg_ofs.lnk_cntl = ndev->reg_base + BWD_NTBCNTL_OFFSET; | 865 | ndev->reg_ofs.lnk_cntl = ndev->reg_base + BWD_NTBCNTL_OFFSET; |
865 | ndev->reg_ofs.lnk_stat = ndev->reg_base + BWD_LINK_STATUS_OFFSET; | 866 | ndev->reg_ofs.lnk_stat = ndev->reg_base + BWD_LINK_STATUS_OFFSET; |
866 | ndev->reg_ofs.spad_read = ndev->reg_base + BWD_SPAD_OFFSET; | 867 | ndev->reg_ofs.spad_read = ndev->reg_base + BWD_SPAD_OFFSET; |
868 | ndev->reg_ofs.spad_write = ndev->reg_base + BWD_B2B_SPAD_OFFSET; | ||
867 | ndev->reg_ofs.spci_cmd = ndev->reg_base + BWD_PCICMD_OFFSET; | 869 | ndev->reg_ofs.spci_cmd = ndev->reg_base + BWD_PCICMD_OFFSET; |
868 | |||
869 | if (ndev->conn_type == NTB_CONN_B2B) { | ||
870 | ndev->reg_ofs.rdb = ndev->reg_base + BWD_B2B_DOORBELL_OFFSET; | ||
871 | ndev->reg_ofs.spad_write = ndev->reg_base + BWD_B2B_SPAD_OFFSET; | ||
872 | ndev->limits.max_spads = BWD_MAX_SPADS; | ||
873 | } else { | ||
874 | ndev->reg_ofs.rdb = ndev->reg_base + BWD_PDOORBELL_OFFSET; | ||
875 | ndev->reg_ofs.spad_write = ndev->reg_base + BWD_SPAD_OFFSET; | ||
876 | ndev->limits.max_spads = BWD_MAX_COMPAT_SPADS; | ||
877 | } | ||
878 | |||
879 | ndev->limits.max_mw = BWD_MAX_MW; | 870 | ndev->limits.max_mw = BWD_MAX_MW; |
871 | ndev->limits.max_spads = BWD_MAX_SPADS; | ||
880 | ndev->limits.max_db_bits = BWD_MAX_DB_BITS; | 872 | ndev->limits.max_db_bits = BWD_MAX_DB_BITS; |
881 | ndev->limits.msix_cnt = BWD_MSIX_CNT; | 873 | ndev->limits.msix_cnt = BWD_MSIX_CNT; |
882 | ndev->bits_per_vector = BWD_DB_BITS_PER_VEC; | 874 | ndev->bits_per_vector = BWD_DB_BITS_PER_VEC; |
diff --git a/drivers/ntb/ntb_regs.h b/drivers/ntb/ntb_regs.h index b4f4604f4ce5..aa4bdd393c58 100644 --- a/drivers/ntb/ntb_regs.h +++ b/drivers/ntb/ntb_regs.h | |||
@@ -104,7 +104,6 @@ | |||
104 | 104 | ||
105 | #define BWD_MSIX_CNT 34 | 105 | #define BWD_MSIX_CNT 34 |
106 | #define BWD_MAX_SPADS 16 | 106 | #define BWD_MAX_SPADS 16 |
107 | #define BWD_MAX_COMPAT_SPADS 16 | ||
108 | #define BWD_MAX_DB_BITS 34 | 107 | #define BWD_MAX_DB_BITS 34 |
109 | #define BWD_DB_BITS_PER_VEC 1 | 108 | #define BWD_DB_BITS_PER_VEC 1 |
110 | #define BWD_MAX_MW 2 | 109 | #define BWD_MAX_MW 2 |