diff options
author | Russell King - ARM Linux <linux@arm.linux.org.uk> | 2011-06-09 20:52:35 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2011-06-11 18:56:01 -0400 |
commit | f777737885a69d37132c956f1e8deab676693157 (patch) | |
tree | 171f05f255080db086282244e1962112292aa54d /drivers/net | |
parent | bfc6501324427a97814de1587f89d73bf8677057 (diff) |
NET: am79c961: fix assembler warnings
Fix:
/tmp/ccvoZ6h8.s: Assembler messages:
/tmp/ccvoZ6h8.s:284: Warning: register range not in ascending order
/tmp/ccvoZ6h8.s:881: Warning: register range not in ascending order
/tmp/ccvoZ6h8.s:1087: Warning: register range not in ascending order
by ensuring that we have temporary variables placed into specific
registers. Reorder the code a bit to allow the resulting assembly
to be slightly more optimal.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net')
-rw-r--r-- | drivers/net/arm/am79c961a.c | 35 |
1 files changed, 18 insertions, 17 deletions
diff --git a/drivers/net/arm/am79c961a.c b/drivers/net/arm/am79c961a.c index 79d88a0b00a3..7b3e23f38913 100644 --- a/drivers/net/arm/am79c961a.c +++ b/drivers/net/arm/am79c961a.c | |||
@@ -91,40 +91,41 @@ static inline unsigned short read_ireg(u_long base_addr, u_int reg) | |||
91 | #define am_writeword(dev,off,val) __raw_writew(val, ISAMEM_BASE + ((off) << 1)) | 91 | #define am_writeword(dev,off,val) __raw_writew(val, ISAMEM_BASE + ((off) << 1)) |
92 | #define am_readword(dev,off) __raw_readw(ISAMEM_BASE + ((off) << 1)) | 92 | #define am_readword(dev,off) __raw_readw(ISAMEM_BASE + ((off) << 1)) |
93 | 93 | ||
94 | static inline void | 94 | static void |
95 | am_writebuffer(struct net_device *dev, u_int offset, unsigned char *buf, unsigned int length) | 95 | am_writebuffer(struct net_device *dev, u_int offset, unsigned char *buf, unsigned int length) |
96 | { | 96 | { |
97 | offset = ISAMEM_BASE + (offset << 1); | 97 | offset = ISAMEM_BASE + (offset << 1); |
98 | length = (length + 1) & ~1; | 98 | length = (length + 1) & ~1; |
99 | if ((int)buf & 2) { | 99 | if ((int)buf & 2) { |
100 | __asm__ __volatile__("str%?h %2, [%0], #4" | 100 | asm volatile("str%?h %2, [%0], #4" |
101 | : "=&r" (offset) : "0" (offset), "r" (buf[0] | (buf[1] << 8))); | 101 | : "=&r" (offset) : "0" (offset), "r" (buf[0] | (buf[1] << 8))); |
102 | buf += 2; | 102 | buf += 2; |
103 | length -= 2; | 103 | length -= 2; |
104 | } | 104 | } |
105 | while (length > 8) { | 105 | while (length > 8) { |
106 | unsigned int tmp, tmp2; | 106 | register unsigned int tmp asm("r2"), tmp2 asm("r3"); |
107 | __asm__ __volatile__( | 107 | asm volatile( |
108 | "ldm%?ia %1!, {%2, %3}\n\t" | 108 | "ldm%?ia %0!, {%1, %2}" |
109 | : "+r" (buf), "=&r" (tmp), "=&r" (tmp2)); | ||
110 | length -= 8; | ||
111 | asm volatile( | ||
112 | "str%?h %1, [%0], #4\n\t" | ||
113 | "mov%? %1, %1, lsr #16\n\t" | ||
114 | "str%?h %1, [%0], #4\n\t" | ||
109 | "str%?h %2, [%0], #4\n\t" | 115 | "str%?h %2, [%0], #4\n\t" |
110 | "mov%? %2, %2, lsr #16\n\t" | 116 | "mov%? %2, %2, lsr #16\n\t" |
111 | "str%?h %2, [%0], #4\n\t" | 117 | "str%?h %2, [%0], #4" |
112 | "str%?h %3, [%0], #4\n\t" | 118 | : "+r" (offset), "=&r" (tmp), "=&r" (tmp2)); |
113 | "mov%? %3, %3, lsr #16\n\t" | ||
114 | "str%?h %3, [%0], #4" | ||
115 | : "=&r" (offset), "=&r" (buf), "=r" (tmp), "=r" (tmp2) | ||
116 | : "0" (offset), "1" (buf)); | ||
117 | length -= 8; | ||
118 | } | 119 | } |
119 | while (length > 0) { | 120 | while (length > 0) { |
120 | __asm__ __volatile__("str%?h %2, [%0], #4" | 121 | asm volatile("str%?h %2, [%0], #4" |
121 | : "=&r" (offset) : "0" (offset), "r" (buf[0] | (buf[1] << 8))); | 122 | : "=&r" (offset) : "0" (offset), "r" (buf[0] | (buf[1] << 8))); |
122 | buf += 2; | 123 | buf += 2; |
123 | length -= 2; | 124 | length -= 2; |
124 | } | 125 | } |
125 | } | 126 | } |
126 | 127 | ||
127 | static inline void | 128 | static void |
128 | am_readbuffer(struct net_device *dev, u_int offset, unsigned char *buf, unsigned int length) | 129 | am_readbuffer(struct net_device *dev, u_int offset, unsigned char *buf, unsigned int length) |
129 | { | 130 | { |
130 | offset = ISAMEM_BASE + (offset << 1); | 131 | offset = ISAMEM_BASE + (offset << 1); |
@@ -140,12 +141,12 @@ am_readbuffer(struct net_device *dev, u_int offset, unsigned char *buf, unsigned | |||
140 | length -= 2; | 141 | length -= 2; |
141 | } | 142 | } |
142 | while (length > 8) { | 143 | while (length > 8) { |
143 | unsigned int tmp, tmp2, tmp3; | 144 | register unsigned int tmp asm("r2"), tmp2 asm("r3"), tmp3; |
144 | asm volatile( | 145 | asm volatile( |
145 | "ldr%?h %2, [%0], #4\n\t" | 146 | "ldr%?h %2, [%0], #4\n\t" |
147 | "ldr%?h %4, [%0], #4\n\t" | ||
146 | "ldr%?h %3, [%0], #4\n\t" | 148 | "ldr%?h %3, [%0], #4\n\t" |
147 | "orr%? %2, %2, %3, lsl #16\n\t" | 149 | "orr%? %2, %2, %4, lsl #16\n\t" |
148 | "ldr%?h %3, [%0], #4\n\t" | ||
149 | "ldr%?h %4, [%0], #4\n\t" | 150 | "ldr%?h %4, [%0], #4\n\t" |
150 | "orr%? %3, %3, %4, lsl #16\n\t" | 151 | "orr%? %3, %3, %4, lsl #16\n\t" |
151 | "stm%?ia %1!, {%2, %3}" | 152 | "stm%?ia %1!, {%2, %3}" |