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authorFreddy Xin <freddy@asix.com.tw>2013-03-01 19:41:11 -0500
committerDavid S. Miller <davem@davemloft.net>2013-03-03 01:43:47 -0500
commite2ca90c276e1fc410d7cd3c1a4eee245ec902a20 (patch)
treea971990603bde6af2889598e454d602c85f812b8 /drivers/net
parent81ce0dbc119fa31af21d02febde1cf923022d4d6 (diff)
ax88179_178a: ASIX AX88179_178A USB 3.0/2.0 to gigabit ethernet adapter driver
This is a resubmission. Added kfree() in ax88179_get_eeprom to prevent memory leakage. Modified "__le16 rxctl" to "u16 rxctl" in "struct ax88179_data" and removed pointless casts. Removed asix_init and asix_exit functions and added "module_usb_driver(ax88179_178a_driver)". Fixed endianness issue on big endian systems and verified this driver on iBook G4. Removed steps that change net->features in ax88179_set_features function. Added "const" to ethtool_ops structure and fixed the coding style of AX88179_BULKIN_SIZE array. Fixed the issue that the default MTU is not 1500. Added ax88179_change_mtu function and enabled the hardware jumbo frame function to support an MTU higher than 1500. Fixed indentation and empty line coding style errors. The _nopm version usb functions were added to access register in suspend and resume functions. Serveral variables allocted dynamically were removed and replaced by stack variables. ax88179_get_eeprom were modified from asix_get_eeprom in asix_common. This patch adds a driver for ASIX's AX88179 family of USB 3.0/2.0 to gigabit ethernet adapters. It's based on the AX88xxx driver but the usb commands used to access registers for AX88179 are completely different. This driver had been verified on x86 system with AX88179/AX88178A and Sitcomm LN-032 USB dongles. Signed-off-by: Freddy Xin <freddy@asix.com.tw> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/usb/Kconfig18
-rw-r--r--drivers/net/usb/Makefile1
-rw-r--r--drivers/net/usb/ax88179_178a.c1448
3 files changed, 1467 insertions, 0 deletions
diff --git a/drivers/net/usb/Kconfig b/drivers/net/usb/Kconfig
index da92ed3797aa..3b6e9b83342d 100644
--- a/drivers/net/usb/Kconfig
+++ b/drivers/net/usb/Kconfig
@@ -156,6 +156,24 @@ config USB_NET_AX8817X
156 This driver creates an interface named "ethX", where X depends on 156 This driver creates an interface named "ethX", where X depends on
157 what other networking devices you have in use. 157 what other networking devices you have in use.
158 158
159config USB_NET_AX88179_178A
160 tristate "ASIX AX88179/178A USB 3.0/2.0 to Gigabit Ethernet"
161 depends on USB_USBNET
162 select CRC32
163 select PHYLIB
164 default y
165 help
166 This option adds support for ASIX AX88179 based USB 3.0/2.0
167 to Gigabit Ethernet adapters.
168
169 This driver should work with at least the following devices:
170 * ASIX AX88179
171 * ASIX AX88178A
172 * Sitcomm LN-032
173
174 This driver creates an interface named "ethX", where X depends on
175 what other networking devices you have in use.
176
159config USB_NET_CDCETHER 177config USB_NET_CDCETHER
160 tristate "CDC Ethernet support (smart devices such as cable modems)" 178 tristate "CDC Ethernet support (smart devices such as cable modems)"
161 depends on USB_USBNET 179 depends on USB_USBNET
diff --git a/drivers/net/usb/Makefile b/drivers/net/usb/Makefile
index 478691326f37..119b06c9aa16 100644
--- a/drivers/net/usb/Makefile
+++ b/drivers/net/usb/Makefile
@@ -9,6 +9,7 @@ obj-$(CONFIG_USB_RTL8150) += rtl8150.o
9obj-$(CONFIG_USB_HSO) += hso.o 9obj-$(CONFIG_USB_HSO) += hso.o
10obj-$(CONFIG_USB_NET_AX8817X) += asix.o 10obj-$(CONFIG_USB_NET_AX8817X) += asix.o
11asix-y := asix_devices.o asix_common.o ax88172a.o 11asix-y := asix_devices.o asix_common.o ax88172a.o
12obj-$(CONFIG_USB_NET_AX88179_178A) += ax88179_178a.o
12obj-$(CONFIG_USB_NET_CDCETHER) += cdc_ether.o 13obj-$(CONFIG_USB_NET_CDCETHER) += cdc_ether.o
13obj-$(CONFIG_USB_NET_CDC_EEM) += cdc_eem.o 14obj-$(CONFIG_USB_NET_CDC_EEM) += cdc_eem.o
14obj-$(CONFIG_USB_NET_DM9601) += dm9601.o 15obj-$(CONFIG_USB_NET_DM9601) += dm9601.o
diff --git a/drivers/net/usb/ax88179_178a.c b/drivers/net/usb/ax88179_178a.c
new file mode 100644
index 000000000000..71c27d8d214f
--- /dev/null
+++ b/drivers/net/usb/ax88179_178a.c
@@ -0,0 +1,1448 @@
1/*
2 * ASIX AX88179/178A USB 3.0/2.0 to Gigabit Ethernet Devices
3 *
4 * Copyright (C) 2011-2013 ASIX
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21#include <linux/module.h>
22#include <linux/etherdevice.h>
23#include <linux/mii.h>
24#include <linux/usb.h>
25#include <linux/crc32.h>
26#include <linux/usb/usbnet.h>
27
28#define AX88179_PHY_ID 0x03
29#define AX_EEPROM_LEN 0x100
30#define AX88179_EEPROM_MAGIC 0x17900b95
31#define AX_MCAST_FLTSIZE 8
32#define AX_MAX_MCAST 64
33#define AX_INT_PPLS_LINK ((u32)BIT(16))
34#define AX_RXHDR_L4_TYPE_MASK 0x1c
35#define AX_RXHDR_L4_TYPE_UDP 4
36#define AX_RXHDR_L4_TYPE_TCP 16
37#define AX_RXHDR_L3CSUM_ERR 2
38#define AX_RXHDR_L4CSUM_ERR 1
39#define AX_RXHDR_CRC_ERR ((u32)BIT(31))
40#define AX_RXHDR_DROP_ERR ((u32)BIT(30))
41#define AX_ACCESS_MAC 0x01
42#define AX_ACCESS_PHY 0x02
43#define AX_ACCESS_EEPROM 0x04
44#define AX_ACCESS_EFUS 0x05
45#define AX_PAUSE_WATERLVL_HIGH 0x54
46#define AX_PAUSE_WATERLVL_LOW 0x55
47
48#define PHYSICAL_LINK_STATUS 0x02
49 #define AX_USB_SS 0x04
50 #define AX_USB_HS 0x02
51
52#define GENERAL_STATUS 0x03
53/* Check AX88179 version. UA1:Bit2 = 0, UA2:Bit2 = 1 */
54 #define AX_SECLD 0x04
55
56#define AX_SROM_ADDR 0x07
57#define AX_SROM_CMD 0x0a
58 #define EEP_RD 0x04
59 #define EEP_BUSY 0x10
60
61#define AX_SROM_DATA_LOW 0x08
62#define AX_SROM_DATA_HIGH 0x09
63
64#define AX_RX_CTL 0x0b
65 #define AX_RX_CTL_DROPCRCERR 0x0100
66 #define AX_RX_CTL_IPE 0x0200
67 #define AX_RX_CTL_START 0x0080
68 #define AX_RX_CTL_AP 0x0020
69 #define AX_RX_CTL_AM 0x0010
70 #define AX_RX_CTL_AB 0x0008
71 #define AX_RX_CTL_AMALL 0x0002
72 #define AX_RX_CTL_PRO 0x0001
73 #define AX_RX_CTL_STOP 0x0000
74
75#define AX_NODE_ID 0x10
76#define AX_MULFLTARY 0x16
77
78#define AX_MEDIUM_STATUS_MODE 0x22
79 #define AX_MEDIUM_GIGAMODE 0x01
80 #define AX_MEDIUM_FULL_DUPLEX 0x02
81 #define AX_MEDIUM_ALWAYS_ONE 0x04
82 #define AX_MEDIUM_EN_125MHZ 0x08
83 #define AX_MEDIUM_RXFLOW_CTRLEN 0x10
84 #define AX_MEDIUM_TXFLOW_CTRLEN 0x20
85 #define AX_MEDIUM_RECEIVE_EN 0x100
86 #define AX_MEDIUM_PS 0x200
87 #define AX_MEDIUM_JUMBO_EN 0x8040
88
89#define AX_MONITOR_MOD 0x24
90 #define AX_MONITOR_MODE_RWLC 0x02
91 #define AX_MONITOR_MODE_RWMP 0x04
92 #define AX_MONITOR_MODE_PMEPOL 0x20
93 #define AX_MONITOR_MODE_PMETYPE 0x40
94
95#define AX_GPIO_CTRL 0x25
96 #define AX_GPIO_CTRL_GPIO3EN 0x80
97 #define AX_GPIO_CTRL_GPIO2EN 0x40
98 #define AX_GPIO_CTRL_GPIO1EN 0x20
99
100#define AX_PHYPWR_RSTCTL 0x26
101 #define AX_PHYPWR_RSTCTL_BZ 0x0010
102 #define AX_PHYPWR_RSTCTL_IPRL 0x0020
103 #define AX_PHYPWR_RSTCTL_AT 0x1000
104
105#define AX_RX_BULKIN_QCTRL 0x2e
106#define AX_CLK_SELECT 0x33
107 #define AX_CLK_SELECT_BCS 0x01
108 #define AX_CLK_SELECT_ACS 0x02
109 #define AX_CLK_SELECT_ULR 0x08
110
111#define AX_RXCOE_CTL 0x34
112 #define AX_RXCOE_IP 0x01
113 #define AX_RXCOE_TCP 0x02
114 #define AX_RXCOE_UDP 0x04
115 #define AX_RXCOE_TCPV6 0x20
116 #define AX_RXCOE_UDPV6 0x40
117
118#define AX_TXCOE_CTL 0x35
119 #define AX_TXCOE_IP 0x01
120 #define AX_TXCOE_TCP 0x02
121 #define AX_TXCOE_UDP 0x04
122 #define AX_TXCOE_TCPV6 0x20
123 #define AX_TXCOE_UDPV6 0x40
124
125#define AX_LEDCTRL 0x73
126
127#define GMII_PHY_PHYSR 0x11
128 #define GMII_PHY_PHYSR_SMASK 0xc000
129 #define GMII_PHY_PHYSR_GIGA 0x8000
130 #define GMII_PHY_PHYSR_100 0x4000
131 #define GMII_PHY_PHYSR_FULL 0x2000
132 #define GMII_PHY_PHYSR_LINK 0x400
133
134#define GMII_LED_ACT 0x1a
135 #define GMII_LED_ACTIVE_MASK 0xff8f
136 #define GMII_LED0_ACTIVE BIT(4)
137 #define GMII_LED1_ACTIVE BIT(5)
138 #define GMII_LED2_ACTIVE BIT(6)
139
140#define GMII_LED_LINK 0x1c
141 #define GMII_LED_LINK_MASK 0xf888
142 #define GMII_LED0_LINK_10 BIT(0)
143 #define GMII_LED0_LINK_100 BIT(1)
144 #define GMII_LED0_LINK_1000 BIT(2)
145 #define GMII_LED1_LINK_10 BIT(4)
146 #define GMII_LED1_LINK_100 BIT(5)
147 #define GMII_LED1_LINK_1000 BIT(6)
148 #define GMII_LED2_LINK_10 BIT(8)
149 #define GMII_LED2_LINK_100 BIT(9)
150 #define GMII_LED2_LINK_1000 BIT(10)
151 #define LED0_ACTIVE BIT(0)
152 #define LED0_LINK_10 BIT(1)
153 #define LED0_LINK_100 BIT(2)
154 #define LED0_LINK_1000 BIT(3)
155 #define LED0_FD BIT(4)
156 #define LED0_USB3_MASK 0x001f
157 #define LED1_ACTIVE BIT(5)
158 #define LED1_LINK_10 BIT(6)
159 #define LED1_LINK_100 BIT(7)
160 #define LED1_LINK_1000 BIT(8)
161 #define LED1_FD BIT(9)
162 #define LED1_USB3_MASK 0x03e0
163 #define LED2_ACTIVE BIT(10)
164 #define LED2_LINK_1000 BIT(13)
165 #define LED2_LINK_100 BIT(12)
166 #define LED2_LINK_10 BIT(11)
167 #define LED2_FD BIT(14)
168 #define LED_VALID BIT(15)
169 #define LED2_USB3_MASK 0x7c00
170
171#define GMII_PHYPAGE 0x1e
172#define GMII_PHY_PAGE_SELECT 0x1f
173 #define GMII_PHY_PGSEL_EXT 0x0007
174 #define GMII_PHY_PGSEL_PAGE0 0x0000
175
176struct ax88179_data {
177 u16 rxctl;
178 u16 reserved;
179};
180
181struct ax88179_int_data {
182 __le32 intdata1;
183 __le32 intdata2;
184};
185
186static const struct {
187 unsigned char ctrl, timer_l, timer_h, size, ifg;
188} AX88179_BULKIN_SIZE[] = {
189 {7, 0x4f, 0, 0x12, 0xff},
190 {7, 0x20, 3, 0x16, 0xff},
191 {7, 0xae, 7, 0x18, 0xff},
192 {7, 0xcc, 0x4c, 0x18, 8},
193};
194
195static int __ax88179_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
196 u16 size, void *data, int in_pm)
197{
198 int ret;
199 int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16);
200
201 BUG_ON(!dev);
202
203 if (!in_pm)
204 fn = usbnet_read_cmd;
205 else
206 fn = usbnet_read_cmd_nopm;
207
208 ret = fn(dev, cmd, USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
209 value, index, data, size);
210
211 if (unlikely(ret < 0))
212 netdev_warn(dev->net, "Failed to read reg index 0x%04x: %d\n",
213 index, ret);
214
215 return ret;
216}
217
218static int __ax88179_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
219 u16 size, void *data, int in_pm)
220{
221 int ret;
222 int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16);
223
224 BUG_ON(!dev);
225
226 if (!in_pm)
227 fn = usbnet_write_cmd;
228 else
229 fn = usbnet_write_cmd_nopm;
230
231 ret = fn(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
232 value, index, data, size);
233
234 if (unlikely(ret < 0))
235 netdev_warn(dev->net, "Failed to write reg index 0x%04x: %d\n",
236 index, ret);
237
238 return ret;
239}
240
241static void ax88179_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value,
242 u16 index, u16 size, void *data)
243{
244 u16 buf;
245
246 if (2 == size) {
247 buf = *((u16 *)data);
248 cpu_to_le16s(&buf);
249 usbnet_write_cmd_async(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR |
250 USB_RECIP_DEVICE, value, index, &buf,
251 size);
252 } else {
253 usbnet_write_cmd_async(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR |
254 USB_RECIP_DEVICE, value, index, data,
255 size);
256 }
257}
258
259static int ax88179_read_cmd_nopm(struct usbnet *dev, u8 cmd, u16 value,
260 u16 index, u16 size, void *data)
261{
262 int ret;
263
264 if (2 == size) {
265 u16 buf;
266 ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf, 1);
267 le16_to_cpus(&buf);
268 *((u16 *)data) = buf;
269 } else if (4 == size) {
270 u32 buf;
271 ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf, 1);
272 le32_to_cpus(&buf);
273 *((u32 *)data) = buf;
274 } else {
275 ret = __ax88179_read_cmd(dev, cmd, value, index, size, data, 1);
276 }
277
278 return ret;
279}
280
281static int ax88179_write_cmd_nopm(struct usbnet *dev, u8 cmd, u16 value,
282 u16 index, u16 size, void *data)
283{
284 int ret;
285
286 if (2 == size) {
287 u16 buf;
288 buf = *((u16 *)data);
289 cpu_to_le16s(&buf);
290 ret = __ax88179_write_cmd(dev, cmd, value, index,
291 size, &buf, 1);
292 } else {
293 ret = __ax88179_write_cmd(dev, cmd, value, index,
294 size, data, 1);
295 }
296
297 return ret;
298}
299
300static int ax88179_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
301 u16 size, void *data)
302{
303 int ret;
304
305 if (2 == size) {
306 u16 buf;
307 ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf, 0);
308 le16_to_cpus(&buf);
309 *((u16 *)data) = buf;
310 } else if (4 == size) {
311 u32 buf;
312 ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf, 0);
313 le32_to_cpus(&buf);
314 *((u32 *)data) = buf;
315 } else {
316 ret = __ax88179_read_cmd(dev, cmd, value, index, size, data, 0);
317 }
318
319 return ret;
320}
321
322static int ax88179_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
323 u16 size, void *data)
324{
325 int ret;
326
327 if (2 == size) {
328 u16 buf;
329 buf = *((u16 *)data);
330 cpu_to_le16s(&buf);
331 ret = __ax88179_write_cmd(dev, cmd, value, index,
332 size, &buf, 0);
333 } else {
334 ret = __ax88179_write_cmd(dev, cmd, value, index,
335 size, data, 0);
336 }
337
338 return ret;
339}
340
341static void ax88179_status(struct usbnet *dev, struct urb *urb)
342{
343 struct ax88179_int_data *event;
344 u32 link;
345
346 if (urb->actual_length < 8)
347 return;
348
349 event = urb->transfer_buffer;
350 le32_to_cpus((void *)&event->intdata1);
351
352 link = (((__force u32)event->intdata1) & AX_INT_PPLS_LINK) >> 16;
353
354 if (netif_carrier_ok(dev->net) != link) {
355 if (link)
356 usbnet_defer_kevent(dev, EVENT_LINK_RESET);
357 else
358 netif_carrier_off(dev->net);
359
360 netdev_info(dev->net, "ax88179 - Link status is: %d\n", link);
361 }
362}
363
364static int ax88179_mdio_read(struct net_device *netdev, int phy_id, int loc)
365{
366 struct usbnet *dev = netdev_priv(netdev);
367 u16 res;
368
369 ax88179_read_cmd(dev, AX_ACCESS_PHY, phy_id, (__u16)loc, 2, &res);
370 return res;
371}
372
373static void ax88179_mdio_write(struct net_device *netdev, int phy_id, int loc,
374 int val)
375{
376 struct usbnet *dev = netdev_priv(netdev);
377 u16 res = (u16) val;
378
379 ax88179_write_cmd(dev, AX_ACCESS_PHY, phy_id, (__u16)loc, 2, &res);
380}
381
382static int ax88179_suspend(struct usb_interface *intf, pm_message_t message)
383{
384 struct usbnet *dev = usb_get_intfdata(intf);
385 u16 tmp16;
386 u8 tmp8;
387
388 usbnet_suspend(intf, message);
389
390 /* Disable RX path */
391 ax88179_read_cmd_nopm(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
392 2, 2, &tmp16);
393 tmp16 &= ~AX_MEDIUM_RECEIVE_EN;
394 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
395 2, 2, &tmp16);
396
397 /* Force bulk-in zero length */
398 ax88179_read_cmd_nopm(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
399 2, 2, &tmp16);
400
401 tmp16 |= AX_PHYPWR_RSTCTL_BZ | AX_PHYPWR_RSTCTL_IPRL;
402 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
403 2, 2, &tmp16);
404
405 /* change clock */
406 tmp8 = 0;
407 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
408
409 /* Configure RX control register => stop operation */
410 tmp16 = AX_RX_CTL_STOP;
411 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
412
413 return 0;
414}
415
416/* This function is used to enable the autodetach function. */
417/* This function is determined by offset 0x43 of EEPROM */
418static int ax88179_auto_detach(struct usbnet *dev, int in_pm)
419{
420 u16 tmp16;
421 u8 tmp8;
422 int (*fnr)(struct usbnet *, u8, u16, u16, u16, void *);
423 int (*fnw)(struct usbnet *, u8, u16, u16, u16, void *);
424
425 if (!in_pm) {
426 fnr = ax88179_read_cmd;
427 fnw = ax88179_write_cmd;
428 } else {
429 fnr = ax88179_read_cmd_nopm;
430 fnw = ax88179_write_cmd_nopm;
431 }
432
433 if (fnr(dev, AX_ACCESS_EEPROM, 0x43, 1, 2, &tmp16) < 0)
434 return 0;
435
436 if ((tmp16 == 0xFFFF) || (!(tmp16 & 0x0100)))
437 return 0;
438
439 /* Enable Auto Detach bit */
440 tmp8 = 0;
441 fnr(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
442 tmp8 |= AX_CLK_SELECT_ULR;
443 fnw(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
444
445 fnr(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
446 tmp16 |= AX_PHYPWR_RSTCTL_AT;
447 fnw(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
448
449 return 0;
450}
451
452static int ax88179_resume(struct usb_interface *intf)
453{
454 struct usbnet *dev = usb_get_intfdata(intf);
455 u16 tmp16;
456 u8 tmp8;
457
458 netif_carrier_off(dev->net);
459
460 /* Power up ethernet PHY */
461 tmp16 = 0;
462 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
463 2, 2, &tmp16);
464 udelay(1000);
465
466 tmp16 = AX_PHYPWR_RSTCTL_IPRL;
467 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
468 2, 2, &tmp16);
469 msleep(200);
470
471 /* Ethernet PHY Auto Detach*/
472 ax88179_auto_detach(dev, 1);
473
474 /* Enable clock */
475 ax88179_read_cmd_nopm(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
476 tmp8 |= AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;
477 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
478 msleep(100);
479
480 /* Configure RX control register => start operation */
481 tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
482 AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
483 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
484
485 return usbnet_resume(intf);
486}
487
488static void
489ax88179_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
490{
491 struct usbnet *dev = netdev_priv(net);
492 u8 opt;
493
494 if (ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,
495 1, 1, &opt) < 0) {
496 wolinfo->supported = 0;
497 wolinfo->wolopts = 0;
498 return;
499 }
500
501 wolinfo->supported = WAKE_PHY | WAKE_MAGIC;
502 wolinfo->wolopts = 0;
503 if (opt & AX_MONITOR_MODE_RWLC)
504 wolinfo->wolopts |= WAKE_PHY;
505 if (opt & AX_MONITOR_MODE_RWMP)
506 wolinfo->wolopts |= WAKE_MAGIC;
507}
508
509static int
510ax88179_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
511{
512 struct usbnet *dev = netdev_priv(net);
513 u8 opt = 0;
514
515 if (wolinfo->wolopts & WAKE_PHY)
516 opt |= AX_MONITOR_MODE_RWLC;
517 if (wolinfo->wolopts & WAKE_MAGIC)
518 opt |= AX_MONITOR_MODE_RWMP;
519
520 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,
521 1, 1, &opt) < 0)
522 return -EINVAL;
523
524 return 0;
525}
526
527static int ax88179_get_eeprom_len(struct net_device *net)
528{
529 return AX_EEPROM_LEN;
530}
531
532static int
533ax88179_get_eeprom(struct net_device *net, struct ethtool_eeprom *eeprom,
534 u8 *data)
535{
536 struct usbnet *dev = netdev_priv(net);
537 u16 *eeprom_buff;
538 int first_word, last_word;
539 int i, ret;
540
541 if (eeprom->len == 0)
542 return -EINVAL;
543
544 eeprom->magic = AX88179_EEPROM_MAGIC;
545
546 first_word = eeprom->offset >> 1;
547 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
548 eeprom_buff = kmalloc(sizeof(u16) * (last_word - first_word + 1),
549 GFP_KERNEL);
550 if (!eeprom_buff)
551 return -ENOMEM;
552
553 /* ax88179/178A returns 2 bytes from eeprom on read */
554 for (i = first_word; i <= last_word; i++) {
555 ret = __ax88179_read_cmd(dev, AX_ACCESS_EEPROM, i, 1, 2,
556 &eeprom_buff[i - first_word],
557 0);
558 if (ret < 0) {
559 kfree(eeprom_buff);
560 return -EIO;
561 }
562 }
563
564 memcpy(data, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
565 kfree(eeprom_buff);
566 return 0;
567}
568
569static int ax88179_get_settings(struct net_device *net, struct ethtool_cmd *cmd)
570{
571 struct usbnet *dev = netdev_priv(net);
572 return mii_ethtool_gset(&dev->mii, cmd);
573}
574
575static int ax88179_set_settings(struct net_device *net, struct ethtool_cmd *cmd)
576{
577 struct usbnet *dev = netdev_priv(net);
578 return mii_ethtool_sset(&dev->mii, cmd);
579}
580
581
582static int ax88179_ioctl(struct net_device *net, struct ifreq *rq, int cmd)
583{
584 struct usbnet *dev = netdev_priv(net);
585 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
586}
587
588static const struct ethtool_ops ax88179_ethtool_ops = {
589 .get_link = ethtool_op_get_link,
590 .get_msglevel = usbnet_get_msglevel,
591 .set_msglevel = usbnet_set_msglevel,
592 .get_wol = ax88179_get_wol,
593 .set_wol = ax88179_set_wol,
594 .get_eeprom_len = ax88179_get_eeprom_len,
595 .get_eeprom = ax88179_get_eeprom,
596 .get_settings = ax88179_get_settings,
597 .set_settings = ax88179_set_settings,
598 .nway_reset = usbnet_nway_reset,
599};
600
601static void ax88179_set_multicast(struct net_device *net)
602{
603 struct usbnet *dev = netdev_priv(net);
604 struct ax88179_data *data = (struct ax88179_data *)dev->data;
605 u8 *m_filter = ((u8 *)dev->data) + 12;
606
607 data->rxctl = (AX_RX_CTL_START | AX_RX_CTL_AB | AX_RX_CTL_IPE);
608
609 if (net->flags & IFF_PROMISC) {
610 data->rxctl |= AX_RX_CTL_PRO;
611 } else if (net->flags & IFF_ALLMULTI ||
612 netdev_mc_count(net) > AX_MAX_MCAST) {
613 data->rxctl |= AX_RX_CTL_AMALL;
614 } else if (netdev_mc_empty(net)) {
615 /* just broadcast and directed */
616 } else {
617 /* We use the 20 byte dev->data for our 8 byte filter buffer
618 * to avoid allocating memory that is tricky to free later
619 */
620 u32 crc_bits;
621 struct netdev_hw_addr *ha;
622
623 memset(m_filter, 0, AX_MCAST_FLTSIZE);
624
625 netdev_for_each_mc_addr(ha, net) {
626 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
627 *(m_filter + (crc_bits >> 3)) |= (1 << (crc_bits & 7));
628 }
629
630 ax88179_write_cmd_async(dev, AX_ACCESS_MAC, AX_MULFLTARY,
631 AX_MCAST_FLTSIZE, AX_MCAST_FLTSIZE,
632 m_filter);
633
634 data->rxctl |= AX_RX_CTL_AM;
635 }
636
637 ax88179_write_cmd_async(dev, AX_ACCESS_MAC, AX_RX_CTL,
638 2, 2, &data->rxctl);
639}
640
641static int
642ax88179_set_features(struct net_device *net, netdev_features_t features)
643{
644 u8 tmp;
645 struct usbnet *dev = netdev_priv(net);
646 netdev_features_t changed = net->features ^ features;
647
648 if (changed & NETIF_F_IP_CSUM) {
649 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
650 tmp ^= AX_TXCOE_TCP | AX_TXCOE_UDP;
651 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
652 }
653
654 if (changed & NETIF_F_IPV6_CSUM) {
655 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
656 tmp ^= AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
657 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
658 }
659
660 if (changed & NETIF_F_RXCSUM) {
661 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, &tmp);
662 tmp ^= AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
663 AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
664 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, &tmp);
665 }
666
667 return 0;
668}
669
670static int ax88179_change_mtu(struct net_device *net, int new_mtu)
671{
672 struct usbnet *dev = netdev_priv(net);
673 u16 tmp16;
674
675 if (new_mtu <= 0 || new_mtu > 4088)
676 return -EINVAL;
677
678 net->mtu = new_mtu;
679 dev->hard_mtu = net->mtu + net->hard_header_len;
680
681 if (net->mtu > 1500) {
682 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
683 2, 2, &tmp16);
684 tmp16 |= AX_MEDIUM_JUMBO_EN;
685 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
686 2, 2, &tmp16);
687 } else {
688 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
689 2, 2, &tmp16);
690 tmp16 &= ~AX_MEDIUM_JUMBO_EN;
691 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
692 2, 2, &tmp16);
693 }
694
695 return 0;
696}
697
698static int ax88179_set_mac_addr(struct net_device *net, void *p)
699{
700 struct usbnet *dev = netdev_priv(net);
701 struct sockaddr *addr = p;
702
703 if (netif_running(net))
704 return -EBUSY;
705 if (!is_valid_ether_addr(addr->sa_data))
706 return -EADDRNOTAVAIL;
707
708 memcpy(net->dev_addr, addr->sa_data, ETH_ALEN);
709
710 /* Set the MAC address */
711 return ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN,
712 ETH_ALEN, net->dev_addr);
713}
714
715static const struct net_device_ops ax88179_netdev_ops = {
716 .ndo_open = usbnet_open,
717 .ndo_stop = usbnet_stop,
718 .ndo_start_xmit = usbnet_start_xmit,
719 .ndo_tx_timeout = usbnet_tx_timeout,
720 .ndo_change_mtu = ax88179_change_mtu,
721 .ndo_set_mac_address = ax88179_set_mac_addr,
722 .ndo_validate_addr = eth_validate_addr,
723 .ndo_do_ioctl = ax88179_ioctl,
724 .ndo_set_rx_mode = ax88179_set_multicast,
725 .ndo_set_features = ax88179_set_features,
726};
727
728static int ax88179_check_eeprom(struct usbnet *dev)
729{
730 u8 i, buf, eeprom[20];
731 u16 csum, delay = HZ / 10;
732 unsigned long jtimeout;
733
734 /* Read EEPROM content */
735 for (i = 0; i < 6; i++) {
736 buf = i;
737 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_ADDR,
738 1, 1, &buf) < 0)
739 return -EINVAL;
740
741 buf = EEP_RD;
742 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
743 1, 1, &buf) < 0)
744 return -EINVAL;
745
746 jtimeout = jiffies + delay;
747 do {
748 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
749 1, 1, &buf);
750
751 if (time_after(jiffies, jtimeout))
752 return -EINVAL;
753
754 } while (buf & EEP_BUSY);
755
756 __ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_LOW,
757 2, 2, &eeprom[i * 2], 0);
758
759 if ((i == 0) && (eeprom[0] == 0xFF))
760 return -EINVAL;
761 }
762
763 csum = eeprom[6] + eeprom[7] + eeprom[8] + eeprom[9];
764 csum = (csum >> 8) + (csum & 0xff);
765 if ((csum + eeprom[10]) != 0xff)
766 return -EINVAL;
767
768 return 0;
769}
770
771static int ax88179_check_efuse(struct usbnet *dev, u16 *ledmode)
772{
773 u8 i;
774 u8 efuse[64];
775 u16 csum = 0;
776
777 if (ax88179_read_cmd(dev, AX_ACCESS_EFUS, 0, 64, 64, efuse) < 0)
778 return -EINVAL;
779
780 if (*efuse == 0xFF)
781 return -EINVAL;
782
783 for (i = 0; i < 64; i++)
784 csum = csum + efuse[i];
785
786 while (csum > 255)
787 csum = (csum & 0x00FF) + ((csum >> 8) & 0x00FF);
788
789 if (csum != 0xFF)
790 return -EINVAL;
791
792 *ledmode = (efuse[51] << 8) | efuse[52];
793
794 return 0;
795}
796
797static int ax88179_convert_old_led(struct usbnet *dev, u16 *ledvalue)
798{
799 u16 led;
800
801 /* Loaded the old eFuse LED Mode */
802 if (ax88179_read_cmd(dev, AX_ACCESS_EEPROM, 0x3C, 1, 2, &led) < 0)
803 return -EINVAL;
804
805 led >>= 8;
806 switch (led) {
807 case 0xFF:
808 led = LED0_ACTIVE | LED1_LINK_10 | LED1_LINK_100 |
809 LED1_LINK_1000 | LED2_ACTIVE | LED2_LINK_10 |
810 LED2_LINK_100 | LED2_LINK_1000 | LED_VALID;
811 break;
812 case 0xFE:
813 led = LED0_ACTIVE | LED1_LINK_1000 | LED2_LINK_100 | LED_VALID;
814 break;
815 case 0xFD:
816 led = LED0_ACTIVE | LED1_LINK_1000 | LED2_LINK_100 |
817 LED2_LINK_10 | LED_VALID;
818 break;
819 case 0xFC:
820 led = LED0_ACTIVE | LED1_ACTIVE | LED1_LINK_1000 | LED2_ACTIVE |
821 LED2_LINK_100 | LED2_LINK_10 | LED_VALID;
822 break;
823 default:
824 led = LED0_ACTIVE | LED1_LINK_10 | LED1_LINK_100 |
825 LED1_LINK_1000 | LED2_ACTIVE | LED2_LINK_10 |
826 LED2_LINK_100 | LED2_LINK_1000 | LED_VALID;
827 break;
828 }
829
830 *ledvalue = led;
831
832 return 0;
833}
834
835static int ax88179_led_setting(struct usbnet *dev)
836{
837 u8 ledfd, value = 0;
838 u16 tmp, ledact, ledlink, ledvalue = 0, delay = HZ / 10;
839 unsigned long jtimeout;
840
841 /* Check AX88179 version. UA1 or UA2*/
842 ax88179_read_cmd(dev, AX_ACCESS_MAC, GENERAL_STATUS, 1, 1, &value);
843
844 if (!(value & AX_SECLD)) { /* UA1 */
845 value = AX_GPIO_CTRL_GPIO3EN | AX_GPIO_CTRL_GPIO2EN |
846 AX_GPIO_CTRL_GPIO1EN;
847 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_GPIO_CTRL,
848 1, 1, &value) < 0)
849 return -EINVAL;
850 }
851
852 /* Check EEPROM */
853 if (!ax88179_check_eeprom(dev)) {
854 value = 0x42;
855 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_ADDR,
856 1, 1, &value) < 0)
857 return -EINVAL;
858
859 value = EEP_RD;
860 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
861 1, 1, &value) < 0)
862 return -EINVAL;
863
864 jtimeout = jiffies + delay;
865 do {
866 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
867 1, 1, &value);
868
869 if (time_after(jiffies, jtimeout))
870 return -EINVAL;
871
872 } while (value & EEP_BUSY);
873
874 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_HIGH,
875 1, 1, &value);
876 ledvalue = (value << 8);
877
878 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_LOW,
879 1, 1, &value);
880 ledvalue |= value;
881
882 /* load internal ROM for defaule setting */
883 if ((ledvalue == 0xFFFF) || ((ledvalue & LED_VALID) == 0))
884 ax88179_convert_old_led(dev, &ledvalue);
885
886 } else if (!ax88179_check_efuse(dev, &ledvalue)) {
887 if ((ledvalue == 0xFFFF) || ((ledvalue & LED_VALID) == 0))
888 ax88179_convert_old_led(dev, &ledvalue);
889 } else {
890 ax88179_convert_old_led(dev, &ledvalue);
891 }
892
893 tmp = GMII_PHY_PGSEL_EXT;
894 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
895 GMII_PHY_PAGE_SELECT, 2, &tmp);
896
897 tmp = 0x2c;
898 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
899 GMII_PHYPAGE, 2, &tmp);
900
901 ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
902 GMII_LED_ACT, 2, &ledact);
903
904 ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
905 GMII_LED_LINK, 2, &ledlink);
906
907 ledact &= GMII_LED_ACTIVE_MASK;
908 ledlink &= GMII_LED_LINK_MASK;
909
910 if (ledvalue & LED0_ACTIVE)
911 ledact |= GMII_LED0_ACTIVE;
912
913 if (ledvalue & LED1_ACTIVE)
914 ledact |= GMII_LED1_ACTIVE;
915
916 if (ledvalue & LED2_ACTIVE)
917 ledact |= GMII_LED2_ACTIVE;
918
919 if (ledvalue & LED0_LINK_10)
920 ledlink |= GMII_LED0_LINK_10;
921
922 if (ledvalue & LED1_LINK_10)
923 ledlink |= GMII_LED1_LINK_10;
924
925 if (ledvalue & LED2_LINK_10)
926 ledlink |= GMII_LED2_LINK_10;
927
928 if (ledvalue & LED0_LINK_100)
929 ledlink |= GMII_LED0_LINK_100;
930
931 if (ledvalue & LED1_LINK_100)
932 ledlink |= GMII_LED1_LINK_100;
933
934 if (ledvalue & LED2_LINK_100)
935 ledlink |= GMII_LED2_LINK_100;
936
937 if (ledvalue & LED0_LINK_1000)
938 ledlink |= GMII_LED0_LINK_1000;
939
940 if (ledvalue & LED1_LINK_1000)
941 ledlink |= GMII_LED1_LINK_1000;
942
943 if (ledvalue & LED2_LINK_1000)
944 ledlink |= GMII_LED2_LINK_1000;
945
946 tmp = ledact;
947 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
948 GMII_LED_ACT, 2, &tmp);
949
950 tmp = ledlink;
951 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
952 GMII_LED_LINK, 2, &tmp);
953
954 tmp = GMII_PHY_PGSEL_PAGE0;
955 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
956 GMII_PHY_PAGE_SELECT, 2, &tmp);
957
958 /* LED full duplex setting */
959 ledfd = 0;
960 if (ledvalue & LED0_FD)
961 ledfd |= 0x01;
962 else if ((ledvalue & LED0_USB3_MASK) == 0)
963 ledfd |= 0x02;
964
965 if (ledvalue & LED1_FD)
966 ledfd |= 0x04;
967 else if ((ledvalue & LED1_USB3_MASK) == 0)
968 ledfd |= 0x08;
969
970 if (ledvalue & LED2_FD)
971 ledfd |= 0x10;
972 else if ((ledvalue & LED2_USB3_MASK) == 0)
973 ledfd |= 0x20;
974
975 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_LEDCTRL, 1, 1, &ledfd);
976
977 return 0;
978}
979
980static int ax88179_bind(struct usbnet *dev, struct usb_interface *intf)
981{
982 u8 buf[5];
983 u16 *tmp16;
984 u8 *tmp;
985 struct ax88179_data *ax179_data = (struct ax88179_data *)dev->data;
986
987 usbnet_get_endpoints(dev, intf);
988
989 tmp16 = (u16 *)buf;
990 tmp = (u8 *)buf;
991
992 memset(ax179_data, 0, sizeof(*ax179_data));
993
994 /* Power up ethernet PHY */
995 *tmp16 = 0;
996 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
997 *tmp16 = AX_PHYPWR_RSTCTL_IPRL;
998 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
999 msleep(200);
1000
1001 *tmp = AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;
1002 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, tmp);
1003 msleep(100);
1004
1005 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN,
1006 ETH_ALEN, dev->net->dev_addr);
1007 memcpy(dev->net->perm_addr, dev->net->dev_addr, ETH_ALEN);
1008
1009 /* RX bulk configuration */
1010 memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
1011 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
1012
1013 dev->rx_urb_size = 1024 * 20;
1014
1015 *tmp = 0x34;
1016 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp);
1017
1018 *tmp = 0x52;
1019 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH,
1020 1, 1, tmp);
1021
1022 dev->net->netdev_ops = &ax88179_netdev_ops;
1023 dev->net->ethtool_ops = &ax88179_ethtool_ops;
1024 dev->net->needed_headroom = 8;
1025
1026 /* Initialize MII structure */
1027 dev->mii.dev = dev->net;
1028 dev->mii.mdio_read = ax88179_mdio_read;
1029 dev->mii.mdio_write = ax88179_mdio_write;
1030 dev->mii.phy_id_mask = 0xff;
1031 dev->mii.reg_num_mask = 0xff;
1032 dev->mii.phy_id = 0x03;
1033 dev->mii.supports_gmii = 1;
1034
1035 dev->net->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1036 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_TSO;
1037
1038 dev->net->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1039 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_TSO;
1040
1041 /* Enable checksum offload */
1042 *tmp = AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
1043 AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
1044 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, tmp);
1045
1046 *tmp = AX_TXCOE_IP | AX_TXCOE_TCP | AX_TXCOE_UDP |
1047 AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
1048 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, tmp);
1049
1050 /* Configure RX control register => start operation */
1051 *tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
1052 AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
1053 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16);
1054
1055 *tmp = AX_MONITOR_MODE_PMETYPE | AX_MONITOR_MODE_PMEPOL |
1056 AX_MONITOR_MODE_RWMP;
1057 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD, 1, 1, tmp);
1058
1059 /* Configure default medium type => giga */
1060 *tmp16 = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
1061 AX_MEDIUM_RXFLOW_CTRLEN | AX_MEDIUM_ALWAYS_ONE |
1062 AX_MEDIUM_FULL_DUPLEX | AX_MEDIUM_GIGAMODE;
1063 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1064 2, 2, tmp16);
1065
1066 ax88179_led_setting(dev);
1067
1068 /* Restart autoneg */
1069 mii_nway_restart(&dev->mii);
1070
1071 netif_carrier_off(dev->net);
1072
1073 return 0;
1074}
1075
1076static void ax88179_unbind(struct usbnet *dev, struct usb_interface *intf)
1077{
1078 u16 tmp16;
1079
1080 /* Configure RX control register => stop operation */
1081 tmp16 = AX_RX_CTL_STOP;
1082 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
1083
1084 tmp16 = 0;
1085 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp16);
1086
1087 /* Power down ethernet PHY */
1088 tmp16 = 0;
1089 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
1090}
1091
1092static void
1093ax88179_rx_checksum(struct sk_buff *skb, u32 *pkt_hdr)
1094{
1095 skb->ip_summed = CHECKSUM_NONE;
1096
1097 /* checksum error bit is set */
1098 if ((*pkt_hdr & AX_RXHDR_L3CSUM_ERR) ||
1099 (*pkt_hdr & AX_RXHDR_L4CSUM_ERR))
1100 return;
1101
1102 /* It must be a TCP or UDP packet with a valid checksum */
1103 if (((*pkt_hdr & AX_RXHDR_L4_TYPE_MASK) == AX_RXHDR_L4_TYPE_TCP) ||
1104 ((*pkt_hdr & AX_RXHDR_L4_TYPE_MASK) == AX_RXHDR_L4_TYPE_UDP))
1105 skb->ip_summed = CHECKSUM_UNNECESSARY;
1106}
1107
1108static int ax88179_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
1109{
1110 struct sk_buff *ax_skb;
1111 int pkt_cnt;
1112 u32 rx_hdr;
1113 u16 hdr_off;
1114 u32 *pkt_hdr;
1115
1116 skb_trim(skb, skb->len - 4);
1117 memcpy(&rx_hdr, skb_tail_pointer(skb), 4);
1118 le32_to_cpus(&rx_hdr);
1119
1120 pkt_cnt = (u16)rx_hdr;
1121 hdr_off = (u16)(rx_hdr >> 16);
1122 pkt_hdr = (u32 *)(skb->data + hdr_off);
1123
1124 while (pkt_cnt--) {
1125 u16 pkt_len;
1126
1127 le32_to_cpus(pkt_hdr);
1128 pkt_len = (*pkt_hdr >> 16) & 0x1fff;
1129
1130 /* Check CRC or runt packet */
1131 if ((*pkt_hdr & AX_RXHDR_CRC_ERR) ||
1132 (*pkt_hdr & AX_RXHDR_DROP_ERR)) {
1133 skb_pull(skb, (pkt_len + 7) & 0xFFF8);
1134 pkt_hdr++;
1135 continue;
1136 }
1137
1138 if (pkt_cnt == 0) {
1139 /* Skip IP alignment psudo header */
1140 skb_pull(skb, 2);
1141 skb->len = pkt_len;
1142 skb_set_tail_pointer(skb, pkt_len);
1143 skb->truesize = pkt_len + sizeof(struct sk_buff);
1144 ax88179_rx_checksum(skb, pkt_hdr);
1145 return 1;
1146 }
1147
1148 ax_skb = skb_clone(skb, GFP_ATOMIC);
1149 if (ax_skb) {
1150 ax_skb->len = pkt_len;
1151 ax_skb->data = skb->data + 2;
1152 skb_set_tail_pointer(ax_skb, pkt_len);
1153 ax_skb->truesize = pkt_len + sizeof(struct sk_buff);
1154 ax88179_rx_checksum(ax_skb, pkt_hdr);
1155 usbnet_skb_return(dev, ax_skb);
1156 } else {
1157 return 0;
1158 }
1159
1160 skb_pull(skb, (pkt_len + 7) & 0xFFF8);
1161 pkt_hdr++;
1162 }
1163 return 1;
1164}
1165
1166static struct sk_buff *
1167ax88179_tx_fixup(struct usbnet *dev, struct sk_buff *skb, gfp_t flags)
1168{
1169 u32 tx_hdr1, tx_hdr2;
1170 int frame_size = dev->maxpacket;
1171 int mss = skb_shinfo(skb)->gso_size;
1172 int headroom;
1173 int tailroom;
1174
1175 tx_hdr1 = skb->len;
1176 tx_hdr2 = mss;
1177 if (((skb->len + 8) % frame_size) == 0)
1178 tx_hdr2 |= 0x80008000; /* Enable padding */
1179
1180 skb_linearize(skb);
1181 headroom = skb_headroom(skb);
1182 tailroom = skb_tailroom(skb);
1183
1184 if (!skb_header_cloned(skb) &&
1185 !skb_cloned(skb) &&
1186 (headroom + tailroom) >= 8) {
1187 if (headroom < 8) {
1188 skb->data = memmove(skb->head + 8, skb->data, skb->len);
1189 skb_set_tail_pointer(skb, skb->len);
1190 }
1191 } else {
1192 struct sk_buff *skb2;
1193
1194 skb2 = skb_copy_expand(skb, 8, 0, flags);
1195 dev_kfree_skb_any(skb);
1196 skb = skb2;
1197 if (!skb)
1198 return NULL;
1199 }
1200
1201 skb_push(skb, 4);
1202 cpu_to_le32s(&tx_hdr2);
1203 skb_copy_to_linear_data(skb, &tx_hdr2, 4);
1204
1205 skb_push(skb, 4);
1206 cpu_to_le32s(&tx_hdr1);
1207 skb_copy_to_linear_data(skb, &tx_hdr1, 4);
1208
1209 return skb;
1210}
1211
1212static int ax88179_link_reset(struct usbnet *dev)
1213{
1214 struct ax88179_data *ax179_data = (struct ax88179_data *)dev->data;
1215 u8 tmp[5], link_sts;
1216 u16 mode, tmp16, delay = HZ / 10;
1217 u32 tmp32 = 0x40000000;
1218 unsigned long jtimeout;
1219
1220 jtimeout = jiffies + delay;
1221 while (tmp32 & 0x40000000) {
1222 mode = 0;
1223 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &mode);
1224 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2,
1225 &ax179_data->rxctl);
1226
1227 /*link up, check the usb device control TX FIFO full or empty*/
1228 ax88179_read_cmd(dev, 0x81, 0x8c, 0, 4, &tmp32);
1229
1230 if (time_after(jiffies, jtimeout))
1231 return 0;
1232 }
1233
1234 mode = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
1235 AX_MEDIUM_RXFLOW_CTRLEN | AX_MEDIUM_ALWAYS_ONE;
1236
1237 ax88179_read_cmd(dev, AX_ACCESS_MAC, PHYSICAL_LINK_STATUS,
1238 1, 1, &link_sts);
1239
1240 ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1241 GMII_PHY_PHYSR, 2, &tmp16);
1242
1243 if (!(tmp16 & GMII_PHY_PHYSR_LINK)) {
1244 return 0;
1245 } else if (GMII_PHY_PHYSR_GIGA == (tmp16 & GMII_PHY_PHYSR_SMASK)) {
1246 mode |= AX_MEDIUM_GIGAMODE | AX_MEDIUM_EN_125MHZ;
1247 if (dev->net->mtu > 1500)
1248 mode |= AX_MEDIUM_JUMBO_EN;
1249
1250 if (link_sts & AX_USB_SS)
1251 memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
1252 else if (link_sts & AX_USB_HS)
1253 memcpy(tmp, &AX88179_BULKIN_SIZE[1], 5);
1254 else
1255 memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1256 } else if (GMII_PHY_PHYSR_100 == (tmp16 & GMII_PHY_PHYSR_SMASK)) {
1257 mode |= AX_MEDIUM_PS;
1258
1259 if (link_sts & (AX_USB_SS | AX_USB_HS))
1260 memcpy(tmp, &AX88179_BULKIN_SIZE[2], 5);
1261 else
1262 memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1263 } else {
1264 memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1265 }
1266
1267 /* RX bulk configuration */
1268 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
1269
1270 dev->rx_urb_size = (1024 * (tmp[3] + 2));
1271
1272 if (tmp16 & GMII_PHY_PHYSR_FULL)
1273 mode |= AX_MEDIUM_FULL_DUPLEX;
1274 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1275 2, 2, &mode);
1276
1277 netif_carrier_on(dev->net);
1278
1279 return 0;
1280}
1281
1282static int ax88179_reset(struct usbnet *dev)
1283{
1284 u8 buf[5];
1285 u16 *tmp16;
1286 u8 *tmp;
1287
1288 tmp16 = (u16 *)buf;
1289 tmp = (u8 *)buf;
1290
1291 /* Power up ethernet PHY */
1292 *tmp16 = 0;
1293 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
1294
1295 *tmp16 = AX_PHYPWR_RSTCTL_IPRL;
1296 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
1297 msleep(200);
1298
1299 *tmp = AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;
1300 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, tmp);
1301 msleep(100);
1302
1303 /* Ethernet PHY Auto Detach*/
1304 ax88179_auto_detach(dev, 0);
1305
1306 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN, ETH_ALEN,
1307 dev->net->dev_addr);
1308 memcpy(dev->net->perm_addr, dev->net->dev_addr, ETH_ALEN);
1309
1310 /* RX bulk configuration */
1311 memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
1312 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
1313
1314 dev->rx_urb_size = 1024 * 20;
1315
1316 *tmp = 0x34;
1317 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp);
1318
1319 *tmp = 0x52;
1320 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH,
1321 1, 1, tmp);
1322
1323 dev->net->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1324 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_TSO;
1325
1326 dev->net->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1327 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_TSO;
1328
1329 /* Enable checksum offload */
1330 *tmp = AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
1331 AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
1332 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, tmp);
1333
1334 *tmp = AX_TXCOE_IP | AX_TXCOE_TCP | AX_TXCOE_UDP |
1335 AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
1336 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, tmp);
1337
1338 /* Configure RX control register => start operation */
1339 *tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
1340 AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
1341 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16);
1342
1343 *tmp = AX_MONITOR_MODE_PMETYPE | AX_MONITOR_MODE_PMEPOL |
1344 AX_MONITOR_MODE_RWMP;
1345 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD, 1, 1, tmp);
1346
1347 /* Configure default medium type => giga */
1348 *tmp16 = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
1349 AX_MEDIUM_RXFLOW_CTRLEN | AX_MEDIUM_ALWAYS_ONE |
1350 AX_MEDIUM_FULL_DUPLEX | AX_MEDIUM_GIGAMODE;
1351 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1352 2, 2, tmp16);
1353
1354 ax88179_led_setting(dev);
1355
1356 /* Restart autoneg */
1357 mii_nway_restart(&dev->mii);
1358
1359 netif_carrier_off(dev->net);
1360
1361 return 0;
1362}
1363
1364static int ax88179_stop(struct usbnet *dev)
1365{
1366 u16 tmp16;
1367
1368 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1369 2, 2, &tmp16);
1370 tmp16 &= ~AX_MEDIUM_RECEIVE_EN;
1371 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1372 2, 2, &tmp16);
1373
1374 return 0;
1375}
1376
1377static const struct driver_info ax88179_info = {
1378 .description = "ASIX AX88179 USB 3.0 Gigibit Ethernet",
1379 .bind = ax88179_bind,
1380 .unbind = ax88179_unbind,
1381 .status = ax88179_status,
1382 .link_reset = ax88179_link_reset,
1383 .reset = ax88179_reset,
1384 .stop = ax88179_stop,
1385 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1386 .rx_fixup = ax88179_rx_fixup,
1387 .tx_fixup = ax88179_tx_fixup,
1388};
1389
1390static const struct driver_info ax88178a_info = {
1391 .description = "ASIX AX88178A USB 2.0 Gigibit Ethernet",
1392 .bind = ax88179_bind,
1393 .unbind = ax88179_unbind,
1394 .status = ax88179_status,
1395 .link_reset = ax88179_link_reset,
1396 .reset = ax88179_reset,
1397 .stop = ax88179_stop,
1398 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1399 .rx_fixup = ax88179_rx_fixup,
1400 .tx_fixup = ax88179_tx_fixup,
1401};
1402
1403static const struct driver_info sitecom_info = {
1404 .description = "Sitecom USB 3.0 to Gigabit Adapter",
1405 .bind = ax88179_bind,
1406 .unbind = ax88179_unbind,
1407 .status = ax88179_status,
1408 .link_reset = ax88179_link_reset,
1409 .reset = ax88179_reset,
1410 .stop = ax88179_stop,
1411 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1412 .rx_fixup = ax88179_rx_fixup,
1413 .tx_fixup = ax88179_tx_fixup,
1414};
1415
1416static const struct usb_device_id products[] = {
1417{
1418 /* ASIX AX88179 10/100/1000 */
1419 USB_DEVICE(0x0b95, 0x1790),
1420 .driver_info = (unsigned long)&ax88179_info,
1421}, {
1422 /* ASIX AX88178A 10/100/1000 */
1423 USB_DEVICE(0x0b95, 0x178a),
1424 .driver_info = (unsigned long)&ax88178a_info,
1425}, {
1426 /* Sitecom USB 3.0 to Gigabit Adapter */
1427 USB_DEVICE(0x0df6, 0x0072),
1428 .driver_info = (unsigned long) &sitecom_info,
1429},
1430 { },
1431};
1432MODULE_DEVICE_TABLE(usb, products);
1433
1434static struct usb_driver ax88179_178a_driver = {
1435 .name = "ax88179_178a",
1436 .id_table = products,
1437 .probe = usbnet_probe,
1438 .suspend = ax88179_suspend,
1439 .resume = ax88179_resume,
1440 .disconnect = usbnet_disconnect,
1441 .supports_autosuspend = 1,
1442 .disable_hub_initiated_lpm = 1,
1443};
1444
1445module_usb_driver(ax88179_178a_driver);
1446
1447MODULE_DESCRIPTION("ASIX AX88179/178A based USB 3.0/2.0 Gigabit Ethernet Devices");
1448MODULE_LICENSE("GPL");
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-16 06:27:35 -0400