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authorEmil Tantilov <emil.s.tantilov@intel.com>2011-08-27 03:18:47 -0400
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2011-10-05 05:53:54 -0400
commite1befd774a049bdc85cf0ed5b307f913b33e1691 (patch)
tree28b067150e39a7cd754702151db7f17c504ad663 /drivers/net
parent3fbaa3ac0d47e0cbad9bb65f0b71a5ce3ef1b76c (diff)
ixgbe: remove return code for functions that always return 0
Since ixgbe_raise_i2c_clk() can never return anything else than 0 this patch removes it's return value and all checks for it. Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c30
1 files changed, 9 insertions, 21 deletions
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c
index cf3c227f9643..9a56fd74e673 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c
@@ -39,7 +39,7 @@ static s32 ixgbe_clock_out_i2c_byte(struct ixgbe_hw *hw, u8 data);
39static s32 ixgbe_get_i2c_ack(struct ixgbe_hw *hw); 39static s32 ixgbe_get_i2c_ack(struct ixgbe_hw *hw);
40static s32 ixgbe_clock_in_i2c_bit(struct ixgbe_hw *hw, bool *data); 40static s32 ixgbe_clock_in_i2c_bit(struct ixgbe_hw *hw, bool *data);
41static s32 ixgbe_clock_out_i2c_bit(struct ixgbe_hw *hw, bool data); 41static s32 ixgbe_clock_out_i2c_bit(struct ixgbe_hw *hw, bool data);
42static s32 ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl); 42static void ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl);
43static void ixgbe_lower_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl); 43static void ixgbe_lower_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl);
44static s32 ixgbe_set_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl, bool data); 44static s32 ixgbe_set_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl, bool data);
45static bool ixgbe_get_i2c_data(u32 *i2cctl); 45static bool ixgbe_get_i2c_data(u32 *i2cctl);
@@ -1420,19 +1420,15 @@ static void ixgbe_i2c_stop(struct ixgbe_hw *hw)
1420 **/ 1420 **/
1421static s32 ixgbe_clock_in_i2c_byte(struct ixgbe_hw *hw, u8 *data) 1421static s32 ixgbe_clock_in_i2c_byte(struct ixgbe_hw *hw, u8 *data)
1422{ 1422{
1423 s32 status = 0;
1424 s32 i; 1423 s32 i;
1425 bool bit = 0; 1424 bool bit = 0;
1426 1425
1427 for (i = 7; i >= 0; i--) { 1426 for (i = 7; i >= 0; i--) {
1428 status = ixgbe_clock_in_i2c_bit(hw, &bit); 1427 ixgbe_clock_in_i2c_bit(hw, &bit);
1429 *data |= bit << i; 1428 *data |= bit << i;
1430
1431 if (status != 0)
1432 break;
1433 } 1429 }
1434 1430
1435 return status; 1431 return 0;
1436} 1432}
1437 1433
1438/** 1434/**
@@ -1473,16 +1469,14 @@ static s32 ixgbe_clock_out_i2c_byte(struct ixgbe_hw *hw, u8 data)
1473 **/ 1469 **/
1474static s32 ixgbe_get_i2c_ack(struct ixgbe_hw *hw) 1470static s32 ixgbe_get_i2c_ack(struct ixgbe_hw *hw)
1475{ 1471{
1476 s32 status; 1472 s32 status = 0;
1477 u32 i = 0; 1473 u32 i = 0;
1478 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL); 1474 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL);
1479 u32 timeout = 10; 1475 u32 timeout = 10;
1480 bool ack = 1; 1476 bool ack = 1;
1481 1477
1482 status = ixgbe_raise_i2c_clk(hw, &i2cctl); 1478 ixgbe_raise_i2c_clk(hw, &i2cctl);
1483 1479
1484 if (status != 0)
1485 goto out;
1486 1480
1487 /* Minimum high period of clock is 4us */ 1481 /* Minimum high period of clock is 4us */
1488 udelay(IXGBE_I2C_T_HIGH); 1482 udelay(IXGBE_I2C_T_HIGH);
@@ -1508,7 +1502,6 @@ static s32 ixgbe_get_i2c_ack(struct ixgbe_hw *hw)
1508 /* Minimum low period of clock is 4.7 us */ 1502 /* Minimum low period of clock is 4.7 us */
1509 udelay(IXGBE_I2C_T_LOW); 1503 udelay(IXGBE_I2C_T_LOW);
1510 1504
1511out:
1512 return status; 1505 return status;
1513} 1506}
1514 1507
@@ -1521,10 +1514,9 @@ out:
1521 **/ 1514 **/
1522static s32 ixgbe_clock_in_i2c_bit(struct ixgbe_hw *hw, bool *data) 1515static s32 ixgbe_clock_in_i2c_bit(struct ixgbe_hw *hw, bool *data)
1523{ 1516{
1524 s32 status;
1525 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL); 1517 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL);
1526 1518
1527 status = ixgbe_raise_i2c_clk(hw, &i2cctl); 1519 ixgbe_raise_i2c_clk(hw, &i2cctl);
1528 1520
1529 /* Minimum high period of clock is 4us */ 1521 /* Minimum high period of clock is 4us */
1530 udelay(IXGBE_I2C_T_HIGH); 1522 udelay(IXGBE_I2C_T_HIGH);
@@ -1537,7 +1529,7 @@ static s32 ixgbe_clock_in_i2c_bit(struct ixgbe_hw *hw, bool *data)
1537 /* Minimum low period of clock is 4.7 us */ 1529 /* Minimum low period of clock is 4.7 us */
1538 udelay(IXGBE_I2C_T_LOW); 1530 udelay(IXGBE_I2C_T_LOW);
1539 1531
1540 return status; 1532 return 0;
1541} 1533}
1542 1534
1543/** 1535/**
@@ -1554,7 +1546,7 @@ static s32 ixgbe_clock_out_i2c_bit(struct ixgbe_hw *hw, bool data)
1554 1546
1555 status = ixgbe_set_i2c_data(hw, &i2cctl, data); 1547 status = ixgbe_set_i2c_data(hw, &i2cctl, data);
1556 if (status == 0) { 1548 if (status == 0) {
1557 status = ixgbe_raise_i2c_clk(hw, &i2cctl); 1549 ixgbe_raise_i2c_clk(hw, &i2cctl);
1558 1550
1559 /* Minimum high period of clock is 4us */ 1551 /* Minimum high period of clock is 4us */
1560 udelay(IXGBE_I2C_T_HIGH); 1552 udelay(IXGBE_I2C_T_HIGH);
@@ -1579,10 +1571,8 @@ static s32 ixgbe_clock_out_i2c_bit(struct ixgbe_hw *hw, bool data)
1579 * 1571 *
1580 * Raises the I2C clock line '0'->'1' 1572 * Raises the I2C clock line '0'->'1'
1581 **/ 1573 **/
1582static s32 ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl) 1574static void ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl)
1583{ 1575{
1584 s32 status = 0;
1585
1586 *i2cctl |= IXGBE_I2C_CLK_OUT; 1576 *i2cctl |= IXGBE_I2C_CLK_OUT;
1587 1577
1588 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL, *i2cctl); 1578 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL, *i2cctl);
@@ -1590,8 +1580,6 @@ static s32 ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl)
1590 1580
1591 /* SCL rise time (1000ns) */ 1581 /* SCL rise time (1000ns) */
1592 udelay(IXGBE_I2C_T_RISE); 1582 udelay(IXGBE_I2C_T_RISE);
1593
1594 return status;
1595} 1583}
1596 1584
1597/** 1585/**