diff options
| author | Marc Kleine-Budde <mkl@pengutronix.de> | 2013-10-04 04:52:36 -0400 |
|---|---|---|
| committer | Marc Kleine-Budde <mkl@pengutronix.de> | 2013-10-09 17:01:35 -0400 |
| commit | d5a7b406c529e4595ce03dc8f6dcf7fa36f106fa (patch) | |
| tree | b53ac411845daaedd3e2d287974301eea1b36a01 /drivers/net | |
| parent | 87b0a0b5c46aea63cdc5c5d788fe2c91406e3161 (diff) | |
can: flexcan: flexcan_chip_start: fix regression, mark one MB for TX and abort pending TX
In patch
0d1862e can: flexcan: fix flexcan_chip_start() on imx6
the loop in flexcan_chip_start() that iterates over all mailboxes after the
soft reset of the CAN core was removed. This loop put all mailboxes (even the
ones marked as reserved 1...7) into EMPTY/INACTIVE mode. On mailboxes 8...63,
this aborts any pending TX messages.
After a cold boot there is random garbage in the mailboxes, which leads to
spontaneous transmit of CAN frames during first activation. Further if the
interface was disabled with a pending message (usually due to an error
condition on the CAN bus), this message is retransmitted after enabling the
interface again.
This patch fixes the regression by:
1) Limiting the maximum number of used mailboxes to 8, 0...7 are used by the RX
FIFO, 8 is used by TX.
2) Marking the TX mailbox as EMPTY/INACTIVE, so that any pending TX of that
mailbox is aborted.
Cc: linux-stable <stable@vger.kernel.org>
Cc: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Diffstat (limited to 'drivers/net')
| -rw-r--r-- | drivers/net/can/flexcan.c | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c index 3f21142138b7..f028c5d52e21 100644 --- a/drivers/net/can/flexcan.c +++ b/drivers/net/can/flexcan.c | |||
| @@ -62,7 +62,7 @@ | |||
| 62 | #define FLEXCAN_MCR_BCC BIT(16) | 62 | #define FLEXCAN_MCR_BCC BIT(16) |
| 63 | #define FLEXCAN_MCR_LPRIO_EN BIT(13) | 63 | #define FLEXCAN_MCR_LPRIO_EN BIT(13) |
| 64 | #define FLEXCAN_MCR_AEN BIT(12) | 64 | #define FLEXCAN_MCR_AEN BIT(12) |
| 65 | #define FLEXCAN_MCR_MAXMB(x) ((x) & 0xf) | 65 | #define FLEXCAN_MCR_MAXMB(x) ((x) & 0x1f) |
| 66 | #define FLEXCAN_MCR_IDAM_A (0 << 8) | 66 | #define FLEXCAN_MCR_IDAM_A (0 << 8) |
| 67 | #define FLEXCAN_MCR_IDAM_B (1 << 8) | 67 | #define FLEXCAN_MCR_IDAM_B (1 << 8) |
| 68 | #define FLEXCAN_MCR_IDAM_C (2 << 8) | 68 | #define FLEXCAN_MCR_IDAM_C (2 << 8) |
| @@ -735,9 +735,11 @@ static int flexcan_chip_start(struct net_device *dev) | |||
| 735 | * | 735 | * |
| 736 | */ | 736 | */ |
| 737 | reg_mcr = flexcan_read(®s->mcr); | 737 | reg_mcr = flexcan_read(®s->mcr); |
| 738 | reg_mcr &= ~FLEXCAN_MCR_MAXMB(0xff); | ||
| 738 | reg_mcr |= FLEXCAN_MCR_FRZ | FLEXCAN_MCR_FEN | FLEXCAN_MCR_HALT | | 739 | reg_mcr |= FLEXCAN_MCR_FRZ | FLEXCAN_MCR_FEN | FLEXCAN_MCR_HALT | |
| 739 | FLEXCAN_MCR_SUPV | FLEXCAN_MCR_WRN_EN | | 740 | FLEXCAN_MCR_SUPV | FLEXCAN_MCR_WRN_EN | |
| 740 | FLEXCAN_MCR_IDAM_C | FLEXCAN_MCR_SRX_DIS; | 741 | FLEXCAN_MCR_IDAM_C | FLEXCAN_MCR_SRX_DIS | |
| 742 | FLEXCAN_MCR_MAXMB(FLEXCAN_TX_BUF_ID); | ||
| 741 | netdev_dbg(dev, "%s: writing mcr=0x%08x", __func__, reg_mcr); | 743 | netdev_dbg(dev, "%s: writing mcr=0x%08x", __func__, reg_mcr); |
| 742 | flexcan_write(reg_mcr, ®s->mcr); | 744 | flexcan_write(reg_mcr, ®s->mcr); |
| 743 | 745 | ||
| @@ -771,6 +773,10 @@ static int flexcan_chip_start(struct net_device *dev) | |||
| 771 | netdev_dbg(dev, "%s: writing ctrl=0x%08x", __func__, reg_ctrl); | 773 | netdev_dbg(dev, "%s: writing ctrl=0x%08x", __func__, reg_ctrl); |
| 772 | flexcan_write(reg_ctrl, ®s->ctrl); | 774 | flexcan_write(reg_ctrl, ®s->ctrl); |
| 773 | 775 | ||
| 776 | /* Abort any pending TX, mark Mailbox as INACTIVE */ | ||
| 777 | flexcan_write(FLEXCAN_MB_CNT_CODE(0x4), | ||
| 778 | ®s->cantxfg[FLEXCAN_TX_BUF_ID].can_ctrl); | ||
| 779 | |||
| 774 | /* acceptance mask/acceptance code (accept everything) */ | 780 | /* acceptance mask/acceptance code (accept everything) */ |
| 775 | flexcan_write(0x0, ®s->rxgmask); | 781 | flexcan_write(0x0, ®s->rxgmask); |
| 776 | flexcan_write(0x0, ®s->rx14mask); | 782 | flexcan_write(0x0, ®s->rx14mask); |
