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authorLendacky, Thomas <Thomas.Lendacky@amd.com>2014-09-03 13:14:39 -0400
committerDavid S. Miller <davem@davemloft.net>2014-09-05 18:11:21 -0400
commitb73c798b1709e70c8a845228ef07d92c25bd8d6b (patch)
treec387c3506b26cfb55d450930ca6ba122c7d89daf /drivers/net
parenta2ea14d7724e5fc1e5ba187fb47f24dfb8c0f381 (diff)
amd-xgbe-phy: Checkpatch driver fixes
This patch contains fixes identified by checkpatch when run with the strict option. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/phy/amd-xgbe-phy.c4
1 files changed, 0 insertions, 4 deletions
diff --git a/drivers/net/phy/amd-xgbe-phy.c b/drivers/net/phy/amd-xgbe-phy.c
index da351d32b9f9..4e1f7f734d27 100644
--- a/drivers/net/phy/amd-xgbe-phy.c
+++ b/drivers/net/phy/amd-xgbe-phy.c
@@ -75,7 +75,6 @@
75#include <linux/of_device.h> 75#include <linux/of_device.h>
76#include <linux/uaccess.h> 76#include <linux/uaccess.h>
77 77
78
79MODULE_AUTHOR("Tom Lendacky <thomas.lendacky@amd.com>"); 78MODULE_AUTHOR("Tom Lendacky <thomas.lendacky@amd.com>");
80MODULE_LICENSE("Dual BSD/GPL"); 79MODULE_LICENSE("Dual BSD/GPL");
81MODULE_VERSION("1.0.0-a"); 80MODULE_VERSION("1.0.0-a");
@@ -172,7 +171,6 @@ MODULE_DESCRIPTION("AMD 10GbE (amd-xgbe) PHY driver");
172#define SPEED_1000_TXAMP 0xf 171#define SPEED_1000_TXAMP 0xf
173#define SPEED_1000_WORD 0x1 172#define SPEED_1000_WORD 0x1
174 173
175
176/* SerDes RxTx register offsets */ 174/* SerDes RxTx register offsets */
177#define RXTX_REG20 0x0050 175#define RXTX_REG20 0x0050
178#define RXTX_REG114 0x01c8 176#define RXTX_REG114 0x01c8
@@ -266,7 +264,6 @@ do { \
266 XSIR1_IOWRITE((_priv), _reg, reg_val); \ 264 XSIR1_IOWRITE((_priv), _reg, reg_val); \
267} while (0) 265} while (0)
268 266
269
270/* Macros for reading or writing SerDes RxTx registers 267/* Macros for reading or writing SerDes RxTx registers
271 * The ioread macros will get bit fields or full values using the 268 * The ioread macros will get bit fields or full values using the
272 * register definitions formed using the input names 269 * register definitions formed using the input names
@@ -294,7 +291,6 @@ do { \
294 XRXTX_IOWRITE((_priv), _reg, reg_val); \ 291 XRXTX_IOWRITE((_priv), _reg, reg_val); \
295} while (0) 292} while (0)
296 293
297
298enum amd_xgbe_phy_an { 294enum amd_xgbe_phy_an {
299 AMD_XGBE_AN_READY = 0, 295 AMD_XGBE_AN_READY = 0,
300 AMD_XGBE_AN_START, 296 AMD_XGBE_AN_START,