diff options
author | Larry Finger <Larry.Finger@lwfinger.net> | 2010-07-21 12:48:05 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2010-07-21 14:49:46 -0400 |
commit | acd82aa868c2133149370c18d85f8005fbf5611e (patch) | |
tree | 7fd8ca255ec20a4567f620c0a9741bc42b7ec0f5 /drivers/net | |
parent | 41950bdfb5c530ba9b67037cc4c836677e750b6e (diff) |
b43: silence phy_n sparse warnings
drivers/net/wireless/b43/phy_n.c:512:53: warning: cast truncates bits from constant value (ffff0fff becomes fff)
drivers/net/wireless/b43/phy_n.c:765:66: warning: cast truncates bits from constant value (ffff7fff becomes 7fff)
drivers/net/wireless/b43/phy_n.c:1012:38: warning: cast truncates bits from constant value (ffff00ff becomes ff)
drivers/net/wireless/b43/phy_n.c:1119:38: warning: cast truncates bits from constant value (ffff0fff becomes fff)
drivers/net/wireless/b43/phy_n.c:2458:56: warning: cast truncates bits from constant value (ffff7fff becomes 7fff)
drivers/net/wireless/b43/phy_n.c:2933:38: warning: cast truncates bits from constant value (ffff0fff becomes fff)
drivers/net/wireless/b43/phy_n.c:3294:57: warning: cast truncates bits from constant value (ffff3fff becomes 3fff)
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net')
-rw-r--r-- | drivers/net/wireless/b43/phy_n.c | 16 |
1 files changed, 9 insertions, 7 deletions
diff --git a/drivers/net/wireless/b43/phy_n.c b/drivers/net/wireless/b43/phy_n.c index 3d6b33775964..5a725703770c 100644 --- a/drivers/net/wireless/b43/phy_n.c +++ b/drivers/net/wireless/b43/phy_n.c | |||
@@ -509,7 +509,8 @@ static void b43_nphy_rx_cal_phy_setup(struct b43_wldev *dev, u8 core) | |||
509 | b43_phy_mask(dev, B43_NPHY_PAPD_EN0, ~0x0001); | 509 | b43_phy_mask(dev, B43_NPHY_PAPD_EN0, ~0x0001); |
510 | b43_phy_mask(dev, B43_NPHY_PAPD_EN1, ~0x0001); | 510 | b43_phy_mask(dev, B43_NPHY_PAPD_EN1, ~0x0001); |
511 | 511 | ||
512 | b43_phy_maskset(dev, B43_NPHY_RFSEQCA, (u16)~B43_NPHY_RFSEQCA_RXDIS, | 512 | b43_phy_maskset(dev, B43_NPHY_RFSEQCA, |
513 | ~B43_NPHY_RFSEQCA_RXDIS & 0xFFFF, | ||
513 | ((1 - core) << B43_NPHY_RFSEQCA_RXDIS_SHIFT)); | 514 | ((1 - core) << B43_NPHY_RFSEQCA_RXDIS_SHIFT)); |
514 | b43_phy_maskset(dev, B43_NPHY_RFSEQCA, ~B43_NPHY_RFSEQCA_TXEN, | 515 | b43_phy_maskset(dev, B43_NPHY_RFSEQCA, ~B43_NPHY_RFSEQCA_TXEN, |
515 | ((1 - core) << B43_NPHY_RFSEQCA_TXEN_SHIFT)); | 516 | ((1 - core) << B43_NPHY_RFSEQCA_TXEN_SHIFT)); |
@@ -762,7 +763,7 @@ static void b43_nphy_stop_playback(struct b43_wldev *dev) | |||
762 | if (tmp & 0x1) | 763 | if (tmp & 0x1) |
763 | b43_phy_set(dev, B43_NPHY_SAMP_CMD, B43_NPHY_SAMP_CMD_STOP); | 764 | b43_phy_set(dev, B43_NPHY_SAMP_CMD, B43_NPHY_SAMP_CMD_STOP); |
764 | else if (tmp & 0x2) | 765 | else if (tmp & 0x2) |
765 | b43_phy_mask(dev, B43_NPHY_IQLOCAL_CMDGCTL, (u16)~0x8000); | 766 | b43_phy_mask(dev, B43_NPHY_IQLOCAL_CMDGCTL, 0x7FFF); |
766 | 767 | ||
767 | b43_phy_mask(dev, B43_NPHY_SAMP_CMD, ~0x0004); | 768 | b43_phy_mask(dev, B43_NPHY_SAMP_CMD, ~0x0004); |
768 | 769 | ||
@@ -1009,7 +1010,7 @@ static void b43_nphy_gain_crtl_workarounds(struct b43_wldev *dev) | |||
1009 | b43_nphy_set_rf_sequence(dev, 5, | 1010 | b43_nphy_set_rf_sequence(dev, 5, |
1010 | rfseq_events, rfseq_delays, 3); | 1011 | rfseq_events, rfseq_delays, 3); |
1011 | b43_phy_maskset(dev, B43_NPHY_OVER_DGAIN1, | 1012 | b43_phy_maskset(dev, B43_NPHY_OVER_DGAIN1, |
1012 | (u16)~B43_NPHY_OVER_DGAIN_CCKDGECV, | 1013 | ~B43_NPHY_OVER_DGAIN_CCKDGECV & 0xFFFF, |
1013 | 0x5A << B43_NPHY_OVER_DGAIN_CCKDGECV_SHIFT); | 1014 | 0x5A << B43_NPHY_OVER_DGAIN_CCKDGECV_SHIFT); |
1014 | 1015 | ||
1015 | if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) | 1016 | if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) |
@@ -1116,7 +1117,7 @@ static void b43_nphy_workarounds(struct b43_wldev *dev) | |||
1116 | b43_phy_write(dev, B43_NPHY_PHASETR_B2, 0x20); | 1117 | b43_phy_write(dev, B43_NPHY_PHASETR_B2, 0x20); |
1117 | 1118 | ||
1118 | b43_phy_mask(dev, B43_NPHY_PIL_DW1, | 1119 | b43_phy_mask(dev, B43_NPHY_PIL_DW1, |
1119 | (u16)~B43_NPHY_PIL_DW_64QAM); | 1120 | ~B43_NPHY_PIL_DW_64QAM & 0xFFFF); |
1120 | b43_phy_write(dev, B43_NPHY_TXF_20CO_S2B1, 0xB5); | 1121 | b43_phy_write(dev, B43_NPHY_TXF_20CO_S2B1, 0xB5); |
1121 | b43_phy_write(dev, B43_NPHY_TXF_20CO_S2B2, 0xA4); | 1122 | b43_phy_write(dev, B43_NPHY_TXF_20CO_S2B2, 0xA4); |
1122 | b43_phy_write(dev, B43_NPHY_TXF_20CO_S2B3, 0x00); | 1123 | b43_phy_write(dev, B43_NPHY_TXF_20CO_S2B3, 0x00); |
@@ -2455,7 +2456,8 @@ static void b43_nphy_tx_cal_phy_setup(struct b43_wldev *dev) | |||
2455 | b43_phy_write(dev, B43_NPHY_AFECTL_OVER, tmp | 0x0600); | 2456 | b43_phy_write(dev, B43_NPHY_AFECTL_OVER, tmp | 0x0600); |
2456 | 2457 | ||
2457 | regs[4] = b43_phy_read(dev, B43_NPHY_BBCFG); | 2458 | regs[4] = b43_phy_read(dev, B43_NPHY_BBCFG); |
2458 | b43_phy_mask(dev, B43_NPHY_BBCFG, (u16)~B43_NPHY_BBCFG_RSTRX); | 2459 | b43_phy_mask(dev, B43_NPHY_BBCFG, |
2460 | ~B43_NPHY_BBCFG_RSTRX & 0xFFFF); | ||
2459 | 2461 | ||
2460 | tmp = b43_ntab_read(dev, B43_NTAB16(8, 3)); | 2462 | tmp = b43_ntab_read(dev, B43_NTAB16(8, 3)); |
2461 | regs[5] = tmp; | 2463 | regs[5] = tmp; |
@@ -2930,7 +2932,7 @@ static int b43_nphy_rev2_cal_rx_iq(struct b43_wldev *dev, | |||
2930 | tmp[5] = b43_phy_read(dev, rfctl[1]); | 2932 | tmp[5] = b43_phy_read(dev, rfctl[1]); |
2931 | 2933 | ||
2932 | b43_phy_maskset(dev, B43_NPHY_RFSEQCA, | 2934 | b43_phy_maskset(dev, B43_NPHY_RFSEQCA, |
2933 | (u16)~B43_NPHY_RFSEQCA_RXDIS, | 2935 | ~B43_NPHY_RFSEQCA_RXDIS & 0xFFFF, |
2934 | ((1 - i) << B43_NPHY_RFSEQCA_RXDIS_SHIFT)); | 2936 | ((1 - i) << B43_NPHY_RFSEQCA_RXDIS_SHIFT)); |
2935 | b43_phy_maskset(dev, B43_NPHY_RFSEQCA, ~B43_NPHY_RFSEQCA_TXEN, | 2937 | b43_phy_maskset(dev, B43_NPHY_RFSEQCA, ~B43_NPHY_RFSEQCA_TXEN, |
2936 | (1 - i)); | 2938 | (1 - i)); |
@@ -3291,7 +3293,7 @@ static void b43_nphy_chanspec_setup(struct b43_wldev *dev, | |||
3291 | b43_phy_mask(dev, B43_NPHY_BANDCTL, ~B43_NPHY_BANDCTL_5GHZ); | 3293 | b43_phy_mask(dev, B43_NPHY_BANDCTL, ~B43_NPHY_BANDCTL_5GHZ); |
3292 | tmp32 = b43_read32(dev, B43_MMIO_PSM_PHY_HDR); | 3294 | tmp32 = b43_read32(dev, B43_MMIO_PSM_PHY_HDR); |
3293 | b43_write32(dev, B43_MMIO_PSM_PHY_HDR, tmp32 | 4); | 3295 | b43_write32(dev, B43_MMIO_PSM_PHY_HDR, tmp32 | 4); |
3294 | b43_phy_mask(dev, B43_PHY_B_BBCFG, (u16)~0xC000); | 3296 | b43_phy_mask(dev, B43_PHY_B_BBCFG, 0x3FFF); |
3295 | b43_write32(dev, B43_MMIO_PSM_PHY_HDR, tmp32); | 3297 | b43_write32(dev, B43_MMIO_PSM_PHY_HDR, tmp32); |
3296 | } | 3298 | } |
3297 | 3299 | ||