Revert "sh_eth: Enable Rx descriptor word 0 shift for r8a7790"

This reverts commit fd9af07c3404ac9ecbd0d859563360f51ce1ffde.

The hardware manual states that the frame error and multicast bits are
copied to bits 9:0 of RD0, not bits 25:16.  I've tested that this is
true for RFS1 (CRC error), RFS3 (frame too short), RFS4 (frame too
long) and RFS8 (multicast).

Also adjust a comment to agree with this.

Signed-off-by: Ben Hutchings <ben.hutchings@codethink.co.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>

1 files changed, 2 insertions, 3 deletions

diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
index 3309494d12ad..3406cda57a45 100644
--- a/drivers/net/ethernet/renesas/sh_eth.c
+++ b/drivers/net/ethernet/renesas/sh_eth.c
@@ -508,7 +508,6 @@ static struct sh_eth_cpu_data r8a779x_data = {
         .tpauser        = 1,
         .hw_swap        = 1,
         .rmiimode       = 1,
-        .shift_rd0      = 1,
 };
 
 static void sh_eth_set_rate_sh7724(struct net_device *ndev)
@@ -1462,8 +1461,8 @@ static int sh_eth_rx(struct net_device *ndev, u32 intr_status, int *quota)
 
                 /* In case of almost all GETHER/ETHERs, the Receive Frame State
                  * (RFS) bits in the Receive Descriptor 0 are from bit 9 to
-                 * bit 0. However, in case of the R8A7740, R8A779x, and
-                 * R7S72100 the RFS bits are from bit 25 to bit 16. So, the
+                 * bit 0. However, in case of the R8A7740 and R7S72100
+                 * the RFS bits are from bit 25 to bit 16. So, the
                  * driver needs right shifting by 16.
                  */
                 if (mdp->cd->shift_rd0)