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authorKalle Valo <kvalo@qca.qualcomm.com>2013-09-01 03:02:07 -0400
committerKalle Valo <kvalo@qca.qualcomm.com>2013-09-03 02:49:08 -0400
commit3aebe54b1c2158bd20c361501de7785c51c65dbe (patch)
tree933569a7e7d5327d369c130900939ac1ff81b90c /drivers/net
parenta40d3e420d50156b7a43e66d5f5b40c444ebc5da (diff)
ath10k: convert ath10k_pci_wake() to return
We should not try to access hw if wakeup fails so add proper error checking for that. Also add the timeout lenght to the warning message. Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/wireless/ath/ath10k/ce.c43
-rw-r--r--drivers/net/wireless/ath/ath10k/pci.c11
-rw-r--r--drivers/net/wireless/ath/ath10k/pci.h8
3 files changed, 45 insertions, 17 deletions
diff --git a/drivers/net/wireless/ath/ath10k/ce.c b/drivers/net/wireless/ath/ath10k/ce.c
index 6a8014219423..19f23a22f854 100644
--- a/drivers/net/wireless/ath/ath10k/ce.c
+++ b/drivers/net/wireless/ath/ath10k/ce.c
@@ -277,7 +277,9 @@ static int ath10k_ce_send_nolock(struct ath10k_ce_pipe *ce_state,
277 ath10k_warn("%s: send more we can (nbytes: %d, max: %d)\n", 277 ath10k_warn("%s: send more we can (nbytes: %d, max: %d)\n",
278 __func__, nbytes, ce_state->src_sz_max); 278 __func__, nbytes, ce_state->src_sz_max);
279 279
280 ath10k_pci_wake(ar); 280 ret = ath10k_pci_wake(ar);
281 if (ret)
282 return ret;
281 283
282 if (unlikely(CE_RING_DELTA(nentries_mask, 284 if (unlikely(CE_RING_DELTA(nentries_mask,
283 write_index, sw_index - 1) <= 0)) { 285 write_index, sw_index - 1) <= 0)) {
@@ -419,7 +421,9 @@ int ath10k_ce_recv_buf_enqueue(struct ath10k_ce_pipe *ce_state,
419 write_index = dest_ring->write_index; 421 write_index = dest_ring->write_index;
420 sw_index = dest_ring->sw_index; 422 sw_index = dest_ring->sw_index;
421 423
422 ath10k_pci_wake(ar); 424 ret = ath10k_pci_wake(ar);
425 if (ret)
426 goto out;
423 427
424 if (CE_RING_DELTA(nentries_mask, write_index, sw_index - 1) > 0) { 428 if (CE_RING_DELTA(nentries_mask, write_index, sw_index - 1) > 0) {
425 struct ce_desc *base = dest_ring->base_addr_owner_space; 429 struct ce_desc *base = dest_ring->base_addr_owner_space;
@@ -441,6 +445,8 @@ int ath10k_ce_recv_buf_enqueue(struct ath10k_ce_pipe *ce_state,
441 ret = -EIO; 445 ret = -EIO;
442 } 446 }
443 ath10k_pci_sleep(ar); 447 ath10k_pci_sleep(ar);
448
449out:
444 spin_unlock_bh(&ar_pci->ce_lock); 450 spin_unlock_bh(&ar_pci->ce_lock);
445 451
446 return ret; 452 return ret;
@@ -596,6 +602,7 @@ static int ath10k_ce_completed_send_next_nolock(struct ath10k_ce_pipe *ce_state,
596 unsigned int sw_index = src_ring->sw_index; 602 unsigned int sw_index = src_ring->sw_index;
597 struct ce_desc *sdesc, *sbase; 603 struct ce_desc *sdesc, *sbase;
598 unsigned int read_index; 604 unsigned int read_index;
605 int ret;
599 606
600 if (src_ring->hw_index == sw_index) { 607 if (src_ring->hw_index == sw_index) {
601 /* 608 /*
@@ -605,10 +612,15 @@ static int ath10k_ce_completed_send_next_nolock(struct ath10k_ce_pipe *ce_state,
605 * the SW has really caught up to the HW, or if the cached 612 * the SW has really caught up to the HW, or if the cached
606 * value of the HW index has become stale. 613 * value of the HW index has become stale.
607 */ 614 */
608 ath10k_pci_wake(ar); 615
616 ret = ath10k_pci_wake(ar);
617 if (ret)
618 return ret;
619
609 src_ring->hw_index = 620 src_ring->hw_index =
610 ath10k_ce_src_ring_read_index_get(ar, ctrl_addr); 621 ath10k_ce_src_ring_read_index_get(ar, ctrl_addr);
611 src_ring->hw_index &= nentries_mask; 622 src_ring->hw_index &= nentries_mask;
623
612 ath10k_pci_sleep(ar); 624 ath10k_pci_sleep(ar);
613 } 625 }
614 626
@@ -735,8 +747,12 @@ void ath10k_ce_per_engine_service(struct ath10k *ar, unsigned int ce_id)
735 unsigned int nbytes; 747 unsigned int nbytes;
736 unsigned int id; 748 unsigned int id;
737 unsigned int flags; 749 unsigned int flags;
750 int ret;
751
752 ret = ath10k_pci_wake(ar);
753 if (ret)
754 return;
738 755
739 ath10k_pci_wake(ar);
740 spin_lock_bh(&ar_pci->ce_lock); 756 spin_lock_bh(&ar_pci->ce_lock);
741 757
742 /* Clear the copy-complete interrupts that will be handled here. */ 758 /* Clear the copy-complete interrupts that will be handled here. */
@@ -795,10 +811,13 @@ void ath10k_ce_per_engine_service(struct ath10k *ar, unsigned int ce_id)
795void ath10k_ce_per_engine_service_any(struct ath10k *ar) 811void ath10k_ce_per_engine_service_any(struct ath10k *ar)
796{ 812{
797 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); 813 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
798 int ce_id; 814 int ce_id, ret;
799 u32 intr_summary; 815 u32 intr_summary;
800 816
801 ath10k_pci_wake(ar); 817 ret = ath10k_pci_wake(ar);
818 if (ret)
819 return;
820
802 intr_summary = CE_INTERRUPT_SUMMARY(ar); 821 intr_summary = CE_INTERRUPT_SUMMARY(ar);
803 822
804 for (ce_id = 0; intr_summary && (ce_id < ar_pci->ce_count); ce_id++) { 823 for (ce_id = 0; intr_summary && (ce_id < ar_pci->ce_count); ce_id++) {
@@ -826,8 +845,11 @@ static void ath10k_ce_per_engine_handler_adjust(struct ath10k_ce_pipe *ce_state,
826{ 845{
827 u32 ctrl_addr = ce_state->ctrl_addr; 846 u32 ctrl_addr = ce_state->ctrl_addr;
828 struct ath10k *ar = ce_state->ar; 847 struct ath10k *ar = ce_state->ar;
848 int ret;
829 849
830 ath10k_pci_wake(ar); 850 ret = ath10k_pci_wake(ar);
851 if (ret)
852 return;
831 853
832 if ((!disable_copy_compl_intr) && 854 if ((!disable_copy_compl_intr) &&
833 (ce_state->send_cb || ce_state->recv_cb)) 855 (ce_state->send_cb || ce_state->recv_cb))
@@ -843,9 +865,12 @@ static void ath10k_ce_per_engine_handler_adjust(struct ath10k_ce_pipe *ce_state,
843void ath10k_ce_disable_interrupts(struct ath10k *ar) 865void ath10k_ce_disable_interrupts(struct ath10k *ar)
844{ 866{
845 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); 867 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
846 int ce_id; 868 int ce_id, ret;
869
870 ret = ath10k_pci_wake(ar);
871 if (ret)
872 return;
847 873
848 ath10k_pci_wake(ar);
849 for (ce_id = 0; ce_id < ar_pci->ce_count; ce_id++) { 874 for (ce_id = 0; ce_id < ar_pci->ce_count; ce_id++) {
850 struct ath10k_ce_pipe *ce_state = &ar_pci->ce_states[ce_id]; 875 struct ath10k_ce_pipe *ce_state = &ar_pci->ce_states[ce_id];
851 u32 ctrl_addr = ce_state->ctrl_addr; 876 u32 ctrl_addr = ce_state->ctrl_addr;
diff --git a/drivers/net/wireless/ath/ath10k/pci.c b/drivers/net/wireless/ath/ath10k/pci.c
index e0cf75f5a8a1..29ccd0479825 100644
--- a/drivers/net/wireless/ath/ath10k/pci.c
+++ b/drivers/net/wireless/ath/ath10k/pci.c
@@ -537,7 +537,7 @@ static void ath10k_pci_wait(struct ath10k *ar)
537 ath10k_warn("Unable to wakeup target\n"); 537 ath10k_warn("Unable to wakeup target\n");
538} 538}
539 539
540void ath10k_do_pci_wake(struct ath10k *ar) 540int ath10k_do_pci_wake(struct ath10k *ar)
541{ 541{
542 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); 542 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
543 void __iomem *pci_addr = ar_pci->mem; 543 void __iomem *pci_addr = ar_pci->mem;
@@ -553,18 +553,19 @@ void ath10k_do_pci_wake(struct ath10k *ar)
553 atomic_inc(&ar_pci->keep_awake_count); 553 atomic_inc(&ar_pci->keep_awake_count);
554 554
555 if (ar_pci->verified_awake) 555 if (ar_pci->verified_awake)
556 return; 556 return 0;
557 557
558 for (;;) { 558 for (;;) {
559 if (ath10k_pci_target_is_awake(ar)) { 559 if (ath10k_pci_target_is_awake(ar)) {
560 ar_pci->verified_awake = true; 560 ar_pci->verified_awake = true;
561 break; 561 return 0;
562 } 562 }
563 563
564 if (tot_delay > PCIE_WAKE_TIMEOUT) { 564 if (tot_delay > PCIE_WAKE_TIMEOUT) {
565 ath10k_warn("target takes too long to wake up (awake count %d)\n", 565 ath10k_warn("target took longer %d us to wake up (awake count %d)\n",
566 PCIE_WAKE_TIMEOUT,
566 atomic_read(&ar_pci->keep_awake_count)); 567 atomic_read(&ar_pci->keep_awake_count));
567 break; 568 return -ETIMEDOUT;
568 } 569 }
569 570
570 udelay(curr_delay); 571 udelay(curr_delay);
diff --git a/drivers/net/wireless/ath/ath10k/pci.h b/drivers/net/wireless/ath/ath10k/pci.h
index 395f61021829..7c49f6f96f70 100644
--- a/drivers/net/wireless/ath/ath10k/pci.h
+++ b/drivers/net/wireless/ath/ath10k/pci.h
@@ -321,15 +321,17 @@ static inline u32 ath10k_pci_read32(struct ath10k *ar, u32 offset)
321 return ioread32(ar_pci->mem + offset); 321 return ioread32(ar_pci->mem + offset);
322} 322}
323 323
324void ath10k_do_pci_wake(struct ath10k *ar); 324int ath10k_do_pci_wake(struct ath10k *ar);
325void ath10k_do_pci_sleep(struct ath10k *ar); 325void ath10k_do_pci_sleep(struct ath10k *ar);
326 326
327static inline void ath10k_pci_wake(struct ath10k *ar) 327static inline int ath10k_pci_wake(struct ath10k *ar)
328{ 328{
329 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); 329 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
330 330
331 if (test_bit(ATH10K_PCI_FEATURE_SOC_POWER_SAVE, ar_pci->features)) 331 if (test_bit(ATH10K_PCI_FEATURE_SOC_POWER_SAVE, ar_pci->features))
332 ath10k_do_pci_wake(ar); 332 return ath10k_do_pci_wake(ar);
333
334 return 0;
333} 335}
334 336
335static inline void ath10k_pci_sleep(struct ath10k *ar) 337static inline void ath10k_pci_sleep(struct ath10k *ar)