diff options
author | Sujith Manoharan <c_manoha@qca.qualcomm.com> | 2013-01-08 10:27:52 -0500 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2013-01-09 14:37:11 -0500 |
commit | 2d7caefbafc4ca00cc87ec675c7981e07fa7f37b (patch) | |
tree | 0b6938dbee9f2c3b7a394262860455a6c2dfdfe2 /drivers/net | |
parent | 3a6a62fbc99e1b49a5f7b9d926a7061cc623a1c2 (diff) |
ath9k_hw: Add TempCompensation feature for AR9550
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net')
-rw-r--r-- | drivers/net/wireless/ath/ath9k/ar9003_eeprom.c | 128 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/ar9003_phy.h | 2 |
2 files changed, 100 insertions, 30 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c index 562186ca9b52..881e989ea470 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c | |||
@@ -4586,14 +4586,14 @@ static int ar9003_hw_cal_pier_get(struct ath_hw *ah, | |||
4586 | return 0; | 4586 | return 0; |
4587 | } | 4587 | } |
4588 | 4588 | ||
4589 | static int ar9003_hw_power_control_override(struct ath_hw *ah, | 4589 | static void ar9003_hw_power_control_override(struct ath_hw *ah, |
4590 | int frequency, | 4590 | int frequency, |
4591 | int *correction, | 4591 | int *correction, |
4592 | int *voltage, int *temperature) | 4592 | int *voltage, int *temperature) |
4593 | { | 4593 | { |
4594 | int tempSlope = 0; | 4594 | int temp_slope = 0, temp_slope1 = 0, temp_slope2 = 0; |
4595 | struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep; | 4595 | struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep; |
4596 | int f[8], t[8], i; | 4596 | int f[8], t[8], t1[3], t2[3], i; |
4597 | 4597 | ||
4598 | REG_RMW(ah, AR_PHY_TPC_11_B0, | 4598 | REG_RMW(ah, AR_PHY_TPC_11_B0, |
4599 | (correction[0] << AR_PHY_TPC_OLPC_GAIN_DELTA_S), | 4599 | (correction[0] << AR_PHY_TPC_OLPC_GAIN_DELTA_S), |
@@ -4624,38 +4624,108 @@ static int ar9003_hw_power_control_override(struct ath_hw *ah, | |||
4624 | * enable temperature compensation | 4624 | * enable temperature compensation |
4625 | * Need to use register names | 4625 | * Need to use register names |
4626 | */ | 4626 | */ |
4627 | if (frequency < 4000) | 4627 | if (frequency < 4000) { |
4628 | tempSlope = eep->modalHeader2G.tempSlope; | 4628 | temp_slope = eep->modalHeader2G.tempSlope; |
4629 | else if ((eep->baseEepHeader.miscConfiguration & 0x20) != 0) { | 4629 | } else { |
4630 | for (i = 0; i < 8; i++) { | 4630 | if (AR_SREV_9550(ah)) { |
4631 | t[i] = eep->base_ext1.tempslopextension[i]; | 4631 | t[0] = eep->base_ext1.tempslopextension[2]; |
4632 | f[i] = FBIN2FREQ(eep->calFreqPier5G[i], 0); | 4632 | t1[0] = eep->base_ext1.tempslopextension[3]; |
4633 | t2[0] = eep->base_ext1.tempslopextension[4]; | ||
4634 | f[0] = 5180; | ||
4635 | |||
4636 | t[1] = eep->modalHeader5G.tempSlope; | ||
4637 | t1[1] = eep->base_ext1.tempslopextension[0]; | ||
4638 | t2[1] = eep->base_ext1.tempslopextension[1]; | ||
4639 | f[1] = 5500; | ||
4640 | |||
4641 | t[2] = eep->base_ext1.tempslopextension[5]; | ||
4642 | t1[2] = eep->base_ext1.tempslopextension[6]; | ||
4643 | t2[2] = eep->base_ext1.tempslopextension[7]; | ||
4644 | f[2] = 5785; | ||
4645 | |||
4646 | temp_slope = ar9003_hw_power_interpolate(frequency, | ||
4647 | f, t, 3); | ||
4648 | temp_slope1 = ar9003_hw_power_interpolate(frequency, | ||
4649 | f, t1, 3); | ||
4650 | temp_slope2 = ar9003_hw_power_interpolate(frequency, | ||
4651 | f, t2, 3); | ||
4652 | |||
4653 | goto tempslope; | ||
4633 | } | 4654 | } |
4634 | tempSlope = ar9003_hw_power_interpolate((s32) frequency, | ||
4635 | f, t, 8); | ||
4636 | } else if (eep->base_ext2.tempSlopeLow != 0) { | ||
4637 | t[0] = eep->base_ext2.tempSlopeLow; | ||
4638 | f[0] = 5180; | ||
4639 | t[1] = eep->modalHeader5G.tempSlope; | ||
4640 | f[1] = 5500; | ||
4641 | t[2] = eep->base_ext2.tempSlopeHigh; | ||
4642 | f[2] = 5785; | ||
4643 | tempSlope = ar9003_hw_power_interpolate((s32) frequency, | ||
4644 | f, t, 3); | ||
4645 | } else | ||
4646 | tempSlope = eep->modalHeader5G.tempSlope; | ||
4647 | 4655 | ||
4648 | REG_RMW_FIELD(ah, AR_PHY_TPC_19, AR_PHY_TPC_19_ALPHA_THERM, tempSlope); | 4656 | if ((eep->baseEepHeader.miscConfiguration & 0x20) != 0) { |
4657 | for (i = 0; i < 8; i++) { | ||
4658 | t[i] = eep->base_ext1.tempslopextension[i]; | ||
4659 | f[i] = FBIN2FREQ(eep->calFreqPier5G[i], 0); | ||
4660 | } | ||
4661 | temp_slope = ar9003_hw_power_interpolate((s32) frequency, | ||
4662 | f, t, 8); | ||
4663 | } else if (eep->base_ext2.tempSlopeLow != 0) { | ||
4664 | t[0] = eep->base_ext2.tempSlopeLow; | ||
4665 | f[0] = 5180; | ||
4666 | t[1] = eep->modalHeader5G.tempSlope; | ||
4667 | f[1] = 5500; | ||
4668 | t[2] = eep->base_ext2.tempSlopeHigh; | ||
4669 | f[2] = 5785; | ||
4670 | temp_slope = ar9003_hw_power_interpolate((s32) frequency, | ||
4671 | f, t, 3); | ||
4672 | } else { | ||
4673 | temp_slope = eep->modalHeader5G.tempSlope; | ||
4674 | } | ||
4675 | } | ||
4676 | |||
4677 | tempslope: | ||
4678 | if (AR_SREV_9550(ah)) { | ||
4679 | /* | ||
4680 | * AR955x has tempSlope register for each chain. | ||
4681 | * Check whether temp_compensation feature is enabled or not. | ||
4682 | */ | ||
4683 | if (eep->baseEepHeader.featureEnable & 0x1) { | ||
4684 | if (frequency < 4000) { | ||
4685 | REG_RMW_FIELD(ah, AR_PHY_TPC_19, | ||
4686 | AR_PHY_TPC_19_ALPHA_THERM, | ||
4687 | eep->base_ext2.tempSlopeLow); | ||
4688 | REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1, | ||
4689 | AR_PHY_TPC_19_ALPHA_THERM, | ||
4690 | temp_slope); | ||
4691 | REG_RMW_FIELD(ah, AR_PHY_TPC_19_B2, | ||
4692 | AR_PHY_TPC_19_ALPHA_THERM, | ||
4693 | eep->base_ext2.tempSlopeHigh); | ||
4694 | } else { | ||
4695 | REG_RMW_FIELD(ah, AR_PHY_TPC_19, | ||
4696 | AR_PHY_TPC_19_ALPHA_THERM, | ||
4697 | temp_slope); | ||
4698 | REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1, | ||
4699 | AR_PHY_TPC_19_ALPHA_THERM, | ||
4700 | temp_slope1); | ||
4701 | REG_RMW_FIELD(ah, AR_PHY_TPC_19_B2, | ||
4702 | AR_PHY_TPC_19_ALPHA_THERM, | ||
4703 | temp_slope2); | ||
4704 | } | ||
4705 | } else { | ||
4706 | /* | ||
4707 | * If temp compensation is not enabled, | ||
4708 | * set all registers to 0. | ||
4709 | */ | ||
4710 | REG_RMW_FIELD(ah, AR_PHY_TPC_19, | ||
4711 | AR_PHY_TPC_19_ALPHA_THERM, 0); | ||
4712 | REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1, | ||
4713 | AR_PHY_TPC_19_ALPHA_THERM, 0); | ||
4714 | REG_RMW_FIELD(ah, AR_PHY_TPC_19_B2, | ||
4715 | AR_PHY_TPC_19_ALPHA_THERM, 0); | ||
4716 | } | ||
4717 | } else { | ||
4718 | REG_RMW_FIELD(ah, AR_PHY_TPC_19, | ||
4719 | AR_PHY_TPC_19_ALPHA_THERM, temp_slope); | ||
4720 | } | ||
4649 | 4721 | ||
4650 | if (AR_SREV_9462_20(ah)) | 4722 | if (AR_SREV_9462_20(ah)) |
4651 | REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1, | 4723 | REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1, |
4652 | AR_PHY_TPC_19_B1_ALPHA_THERM, tempSlope); | 4724 | AR_PHY_TPC_19_B1_ALPHA_THERM, temp_slope); |
4653 | 4725 | ||
4654 | 4726 | ||
4655 | REG_RMW_FIELD(ah, AR_PHY_TPC_18, AR_PHY_TPC_18_THERM_CAL_VALUE, | 4727 | REG_RMW_FIELD(ah, AR_PHY_TPC_18, AR_PHY_TPC_18_THERM_CAL_VALUE, |
4656 | temperature[0]); | 4728 | temperature[0]); |
4657 | |||
4658 | return 0; | ||
4659 | } | 4729 | } |
4660 | 4730 | ||
4661 | /* Apply the recorded correction values. */ | 4731 | /* Apply the recorded correction values. */ |
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.h b/drivers/net/wireless/ath/ath9k/ar9003_phy.h index 107956298488..e71774196c01 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h | |||
@@ -1028,7 +1028,7 @@ | |||
1028 | #define AR_PHY_TPC_5_B2 (AR_SM2_BASE + 0x208) | 1028 | #define AR_PHY_TPC_5_B2 (AR_SM2_BASE + 0x208) |
1029 | #define AR_PHY_TPC_6_B2 (AR_SM2_BASE + 0x20c) | 1029 | #define AR_PHY_TPC_6_B2 (AR_SM2_BASE + 0x20c) |
1030 | #define AR_PHY_TPC_11_B2 (AR_SM2_BASE + 0x220) | 1030 | #define AR_PHY_TPC_11_B2 (AR_SM2_BASE + 0x220) |
1031 | #define AR_PHY_PDADC_TAB_2 (AR_SM2_BASE + 0x240) | 1031 | #define AR_PHY_TPC_19_B2 (AR_SM2_BASE + 0x240) |
1032 | #define AR_PHY_TX_IQCAL_STATUS_B2 (AR_SM2_BASE + 0x48c) | 1032 | #define AR_PHY_TX_IQCAL_STATUS_B2 (AR_SM2_BASE + 0x48c) |
1033 | #define AR_PHY_TX_IQCAL_CORR_COEFF_B2(_i) (AR_SM2_BASE + 0x450 + ((_i) << 2)) | 1033 | #define AR_PHY_TX_IQCAL_CORR_COEFF_B2(_i) (AR_SM2_BASE + 0x450 + ((_i) << 2)) |
1034 | 1034 | ||