diff options
author | Hante Meuleman <meuleman@broadcom.com> | 2014-07-30 07:20:05 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2014-07-31 13:45:27 -0400 |
commit | bd4f82e3b2899829c7f87dde0d20daeb780ad014 (patch) | |
tree | 07d6877e18db5f3ecb50878bbedc0a7e1c7e6a8f /drivers/net/wireless | |
parent | 9e37f045d5e7f33450515f237c2f6f6bfee137dd (diff) |
brcmfmac: Update pcie reset device routine.
When a pcie device gets reset then the low power modes l1 and l2
should be temporarily disabled.
Reviewed-by: Arend Van Spriel <arend@broadcom.com>
Reviewed-by: Franky (Zhenhui) Lin <frankyl@broadcom.com>
Reviewed-by: Pieter-Paul Giesberts <pieterpg@broadcom.com>
Reviewed-by: Daniel (Deognyoun) Kim <dekim@broadcom.com>
Signed-off-by: Hante Meuleman <meuleman@broadcom.com>
Signed-off-by: Arend van Spriel <arend@broadcom.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless')
-rw-r--r-- | drivers/net/wireless/brcm80211/brcmfmac/pcie.c | 49 |
1 files changed, 42 insertions, 7 deletions
diff --git a/drivers/net/wireless/brcm80211/brcmfmac/pcie.c b/drivers/net/wireless/brcm80211/brcmfmac/pcie.c index 89be96d3b6e9..bc972c0ba5f8 100644 --- a/drivers/net/wireless/brcm80211/brcmfmac/pcie.c +++ b/drivers/net/wireless/brcm80211/brcmfmac/pcie.c | |||
@@ -168,6 +168,20 @@ enum brcmf_pcie_state { | |||
168 | 168 | ||
169 | #define BRCMF_PCIE_MBDATA_TIMEOUT 2000 | 169 | #define BRCMF_PCIE_MBDATA_TIMEOUT 2000 |
170 | 170 | ||
171 | #define BRCMF_PCIE_CFGREG_STATUS_CMD 0x4 | ||
172 | #define BRCMF_PCIE_CFGREG_PM_CSR 0x4C | ||
173 | #define BRCMF_PCIE_CFGREG_MSI_CAP 0x58 | ||
174 | #define BRCMF_PCIE_CFGREG_MSI_ADDR_L 0x5C | ||
175 | #define BRCMF_PCIE_CFGREG_MSI_ADDR_H 0x60 | ||
176 | #define BRCMF_PCIE_CFGREG_MSI_DATA 0x64 | ||
177 | #define BRCMF_PCIE_CFGREG_LINK_STATUS_CTRL 0xBC | ||
178 | #define BRCMF_PCIE_CFGREG_LINK_STATUS_CTRL2 0xDC | ||
179 | #define BRCMF_PCIE_CFGREG_RBAR_CTRL 0x228 | ||
180 | #define BRCMF_PCIE_CFGREG_PML1_SUB_CTRL1 0x248 | ||
181 | #define BRCMF_PCIE_CFGREG_REG_BAR2_CONFIG 0x4E0 | ||
182 | #define BRCMF_PCIE_CFGREG_REG_BAR3_CONFIG 0x4F4 | ||
183 | #define BRCMF_PCIE_LINK_STATUS_CTRL_ASPM_ENAB 3 | ||
184 | |||
171 | 185 | ||
172 | MODULE_FIRMWARE(BRCMF_PCIE_43602_FW_NAME); | 186 | MODULE_FIRMWARE(BRCMF_PCIE_43602_FW_NAME); |
173 | MODULE_FIRMWARE(BRCMF_PCIE_43602_NVRAM_NAME); | 187 | MODULE_FIRMWARE(BRCMF_PCIE_43602_NVRAM_NAME); |
@@ -423,22 +437,43 @@ brcmf_pcie_select_core(struct brcmf_pciedev_info *devinfo, u16 coreid) | |||
423 | } | 437 | } |
424 | 438 | ||
425 | 439 | ||
426 | static void brcmf_pcie_detach(struct brcmf_pciedev_info *devinfo) | 440 | static void brcmf_pcie_reset_device(struct brcmf_pciedev_info *devinfo) |
427 | { | 441 | { |
428 | u16 cfg_offset[] = { 0x4, 0x4C, 0x58, 0x5C, 0x60, 0x64, 0xDC, 0x228, | 442 | u16 cfg_offset[] = { BRCMF_PCIE_CFGREG_STATUS_CMD, |
429 | 0x248, 0x4e0, 0x4f4 }; | 443 | BRCMF_PCIE_CFGREG_PM_CSR, |
444 | BRCMF_PCIE_CFGREG_MSI_CAP, | ||
445 | BRCMF_PCIE_CFGREG_MSI_ADDR_L, | ||
446 | BRCMF_PCIE_CFGREG_MSI_ADDR_H, | ||
447 | BRCMF_PCIE_CFGREG_MSI_DATA, | ||
448 | BRCMF_PCIE_CFGREG_LINK_STATUS_CTRL2, | ||
449 | BRCMF_PCIE_CFGREG_RBAR_CTRL, | ||
450 | BRCMF_PCIE_CFGREG_PML1_SUB_CTRL1, | ||
451 | BRCMF_PCIE_CFGREG_REG_BAR2_CONFIG, | ||
452 | BRCMF_PCIE_CFGREG_REG_BAR3_CONFIG }; | ||
430 | u32 i; | 453 | u32 i; |
431 | u32 val; | 454 | u32 val; |
455 | u32 lsc; | ||
432 | 456 | ||
433 | if (!devinfo->ci) | 457 | if (!devinfo->ci) |
434 | return; | 458 | return; |
435 | 459 | ||
436 | brcmf_pcie_select_core(devinfo, BCMA_CORE_CHIPCOMMON); | 460 | brcmf_pcie_select_core(devinfo, BCMA_CORE_PCIE2); |
437 | WRITECC32(devinfo, watchdog, 0x4e0); | 461 | brcmf_pcie_write_reg32(devinfo, BRCMF_PCIE_PCIE2REG_CONFIGADDR, |
462 | BRCMF_PCIE_CFGREG_LINK_STATUS_CTRL); | ||
463 | lsc = brcmf_pcie_read_reg32(devinfo, BRCMF_PCIE_PCIE2REG_CONFIGDATA); | ||
464 | val = lsc & (~BRCMF_PCIE_LINK_STATUS_CTRL_ASPM_ENAB); | ||
465 | brcmf_pcie_write_reg32(devinfo, BRCMF_PCIE_PCIE2REG_CONFIGDATA, val); | ||
438 | 466 | ||
467 | brcmf_pcie_select_core(devinfo, BCMA_CORE_CHIPCOMMON); | ||
468 | WRITECC32(devinfo, watchdog, 4); | ||
439 | msleep(100); | 469 | msleep(100); |
440 | 470 | ||
441 | brcmf_pcie_select_core(devinfo, BCMA_CORE_PCIE2); | 471 | brcmf_pcie_select_core(devinfo, BCMA_CORE_PCIE2); |
472 | brcmf_pcie_write_reg32(devinfo, BRCMF_PCIE_PCIE2REG_CONFIGADDR, | ||
473 | BRCMF_PCIE_CFGREG_LINK_STATUS_CTRL); | ||
474 | brcmf_pcie_write_reg32(devinfo, BRCMF_PCIE_PCIE2REG_CONFIGDATA, lsc); | ||
475 | |||
476 | brcmf_pcie_select_core(devinfo, BCMA_CORE_PCIE2); | ||
442 | for (i = 0; i < ARRAY_SIZE(cfg_offset); i++) { | 477 | for (i = 0; i < ARRAY_SIZE(cfg_offset); i++) { |
443 | brcmf_pcie_write_reg32(devinfo, BRCMF_PCIE_PCIE2REG_CONFIGADDR, | 478 | brcmf_pcie_write_reg32(devinfo, BRCMF_PCIE_PCIE2REG_CONFIGADDR, |
444 | cfg_offset[i]); | 479 | cfg_offset[i]); |
@@ -458,7 +493,7 @@ static void brcmf_pcie_attach(struct brcmf_pciedev_info *devinfo) | |||
458 | 493 | ||
459 | brcmf_pcie_select_core(devinfo, BCMA_CORE_PCIE2); | 494 | brcmf_pcie_select_core(devinfo, BCMA_CORE_PCIE2); |
460 | if (brcmf_pcie_read_reg32(devinfo, BRCMF_PCIE_PCIE2REG_INTMASK) != 0) | 495 | if (brcmf_pcie_read_reg32(devinfo, BRCMF_PCIE_PCIE2REG_INTMASK) != 0) |
461 | brcmf_pcie_detach(devinfo); | 496 | brcmf_pcie_reset_device(devinfo); |
462 | /* BAR1 window may not be sized properly */ | 497 | /* BAR1 window may not be sized properly */ |
463 | brcmf_pcie_select_core(devinfo, BCMA_CORE_PCIE2); | 498 | brcmf_pcie_select_core(devinfo, BCMA_CORE_PCIE2); |
464 | brcmf_pcie_write_reg32(devinfo, BRCMF_PCIE_PCIE2REG_CONFIGADDR, 0x4e0); | 499 | brcmf_pcie_write_reg32(devinfo, BRCMF_PCIE_PCIE2REG_CONFIGADDR, 0x4e0); |
@@ -1686,7 +1721,7 @@ brcmf_pcie_remove(struct pci_dev *pdev) | |||
1686 | brcmf_pcie_release_irq(devinfo); | 1721 | brcmf_pcie_release_irq(devinfo); |
1687 | brcmf_pcie_release_scratchbuffers(devinfo); | 1722 | brcmf_pcie_release_scratchbuffers(devinfo); |
1688 | brcmf_pcie_release_ringbuffers(devinfo); | 1723 | brcmf_pcie_release_ringbuffers(devinfo); |
1689 | brcmf_pcie_detach(devinfo); | 1724 | brcmf_pcie_reset_device(devinfo); |
1690 | brcmf_pcie_release_resource(devinfo); | 1725 | brcmf_pcie_release_resource(devinfo); |
1691 | 1726 | ||
1692 | if (devinfo->ci) | 1727 | if (devinfo->ci) |