diff options
author | Sujith Manoharan <c_manoha@qca.qualcomm.com> | 2015-01-30 08:35:32 -0500 |
---|---|---|
committer | Kalle Valo <kvalo@codeaurora.org> | 2015-02-03 08:31:09 -0500 |
commit | 41fe8837215a82ea3469267d6fac57e830f9e59a (patch) | |
tree | 2d8c4694f4f9bb8a501c639045e75e27062d1cd1 /drivers/net/wireless | |
parent | 34d102c921100a70d8262adc1afc09f492782778 (diff) |
ath9k: Add a HW structure for WOW
This can be used to hold the WOW state in
ath9k_hw.
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Diffstat (limited to 'drivers/net/wireless')
-rw-r--r-- | drivers/net/wireless/ath/ath9k/ar9003_wow.c | 10 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/hw.h | 6 |
2 files changed, 10 insertions, 6 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_wow.c b/drivers/net/wireless/ath/ath9k/ar9003_wow.c index 3abc9073f4ac..bb6141765020 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_wow.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_wow.c | |||
@@ -137,7 +137,7 @@ void ath9k_hw_wow_apply_pattern(struct ath_hw *ah, u8 *user_pattern, | |||
137 | * other fields | 137 | * other fields |
138 | */ | 138 | */ |
139 | 139 | ||
140 | ah->wow_event_mask |= BIT(pattern_count + AR_WOW_PAT_FOUND_SHIFT); | 140 | ah->wow.wow_event_mask |= BIT(pattern_count + AR_WOW_PAT_FOUND_SHIFT); |
141 | 141 | ||
142 | if (pattern_count < 4) { | 142 | if (pattern_count < 4) { |
143 | /* Pattern 0-3 uses AR_WOW_LENGTH1 register */ | 143 | /* Pattern 0-3 uses AR_WOW_LENGTH1 register */ |
@@ -174,7 +174,7 @@ u32 ath9k_hw_wow_wakeup(struct ath_hw *ah) | |||
174 | * register. This mask will clean it up. | 174 | * register. This mask will clean it up. |
175 | */ | 175 | */ |
176 | 176 | ||
177 | val &= ah->wow_event_mask; | 177 | val &= ah->wow.wow_event_mask; |
178 | 178 | ||
179 | if (val) { | 179 | if (val) { |
180 | if (val & AR_WOW_MAGIC_PAT_FOUND) | 180 | if (val & AR_WOW_MAGIC_PAT_FOUND) |
@@ -218,7 +218,7 @@ u32 ath9k_hw_wow_wakeup(struct ath_hw *ah) | |||
218 | if (ah->is_pciexpress) | 218 | if (ah->is_pciexpress) |
219 | ath9k_hw_configpcipowersave(ah, false); | 219 | ath9k_hw_configpcipowersave(ah, false); |
220 | 220 | ||
221 | ah->wow_event_mask = 0; | 221 | ah->wow.wow_event_mask = 0; |
222 | 222 | ||
223 | return wow_status; | 223 | return wow_status; |
224 | } | 224 | } |
@@ -235,7 +235,7 @@ void ath9k_hw_wow_enable(struct ath_hw *ah, u32 pattern_enable) | |||
235 | * are from the 'pattern_enable' in this function and | 235 | * are from the 'pattern_enable' in this function and |
236 | * 'pattern_count' of ath9k_hw_wow_apply_pattern() | 236 | * 'pattern_count' of ath9k_hw_wow_apply_pattern() |
237 | */ | 237 | */ |
238 | wow_event_mask = ah->wow_event_mask; | 238 | wow_event_mask = ah->wow.wow_event_mask; |
239 | 239 | ||
240 | /* | 240 | /* |
241 | * Untie Power-on-Reset from the PCI-E-Reset. When we are in | 241 | * Untie Power-on-Reset from the PCI-E-Reset. When we are in |
@@ -402,6 +402,6 @@ void ath9k_hw_wow_enable(struct ath_hw *ah, u32 pattern_enable) | |||
402 | REG_CLR_BIT(ah, AR_PCU_MISC_MODE3, clr); | 402 | REG_CLR_BIT(ah, AR_PCU_MISC_MODE3, clr); |
403 | 403 | ||
404 | ath9k_hw_set_powermode_wow_sleep(ah); | 404 | ath9k_hw_set_powermode_wow_sleep(ah); |
405 | ah->wow_event_mask = wow_event_mask; | 405 | ah->wow.wow_event_mask = wow_event_mask; |
406 | } | 406 | } |
407 | EXPORT_SYMBOL(ath9k_hw_wow_enable); | 407 | EXPORT_SYMBOL(ath9k_hw_wow_enable); |
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h index 22b04222a1bd..d36210ae880e 100644 --- a/drivers/net/wireless/ath/ath9k/hw.h +++ b/drivers/net/wireless/ath/ath9k/hw.h | |||
@@ -270,6 +270,10 @@ enum ath9k_hw_caps { | |||
270 | * of those types. | 270 | * of those types. |
271 | */ | 271 | */ |
272 | 272 | ||
273 | struct ath9k_hw_wow { | ||
274 | u32 wow_event_mask; | ||
275 | }; | ||
276 | |||
273 | struct ath9k_hw_capabilities { | 277 | struct ath9k_hw_capabilities { |
274 | u32 hw_caps; /* ATH9K_HW_CAP_* from ath9k_hw_caps */ | 278 | u32 hw_caps; /* ATH9K_HW_CAP_* from ath9k_hw_caps */ |
275 | u16 rts_aggr_limit; | 279 | u16 rts_aggr_limit; |
@@ -928,7 +932,7 @@ struct ath_hw { | |||
928 | u32 ent_mode; | 932 | u32 ent_mode; |
929 | 933 | ||
930 | #ifdef CONFIG_ATH9K_WOW | 934 | #ifdef CONFIG_ATH9K_WOW |
931 | u32 wow_event_mask; | 935 | struct ath9k_hw_wow wow; |
932 | #endif | 936 | #endif |
933 | bool is_clk_25mhz; | 937 | bool is_clk_25mhz; |
934 | int (*get_mac_revision)(void); | 938 | int (*get_mac_revision)(void); |