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authorPavel Roskin <proski@gnu.org>2011-07-23 09:29:09 -0400
committerJohn W. Linville <linville@tuxdriver.com>2011-08-08 16:03:59 -0400
commit32c254645f90a5a5486788c0deb30531fdb609c2 (patch)
treeaea42daf095801158bc1177d4c9f8f3694d2e135 /drivers/net/wireless
parent8d44a823c847c3d20e33c4c714ab48b700f41f14 (diff)
ath5k: eliminate CHANNEL_* macros, use AR5K_MODE_* in channel->hw_value
When checking for the band, use channel->band. Change ath5k_hw_nic_wakeup() and ath5k_channel_ok() to take ieee80211_channel. Change ath5k_hw_radio_revision() to take ieee80211_band. Signed-off-by: Pavel Roskin <proski@gnu.org> Tested-by: Sedat Dilek <sedat.dilek@gmail.com> Acked-by: Nick Kossifidis <mickflemm@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless')
-rw-r--r--drivers/net/wireless/ath/ath5k/ath5k.h32
-rw-r--r--drivers/net/wireless/ath/ath5k/attach.c10
-rw-r--r--drivers/net/wireless/ath/ath5k/base.c23
-rw-r--r--drivers/net/wireless/ath/ath5k/eeprom.c8
-rw-r--r--drivers/net/wireless/ath/ath5k/pcu.c4
-rw-r--r--drivers/net/wireless/ath/ath5k/phy.c87
-rw-r--r--drivers/net/wireless/ath/ath5k/qcu.c2
-rw-r--r--drivers/net/wireless/ath/ath5k/reset.c70
8 files changed, 102 insertions, 134 deletions
diff --git a/drivers/net/wireless/ath/ath5k/ath5k.h b/drivers/net/wireless/ath/ath5k/ath5k.h
index a8a7db437a28..0d413be3b7e1 100644
--- a/drivers/net/wireless/ath/ath5k/ath5k.h
+++ b/drivers/net/wireless/ath/ath5k/ath5k.h
@@ -685,30 +685,6 @@ struct ath5k_gain {
685#define AR5K_SLOT_TIME_20 880 685#define AR5K_SLOT_TIME_20 880
686#define AR5K_SLOT_TIME_MAX 0xffff 686#define AR5K_SLOT_TIME_MAX 0xffff
687 687
688/* channel_flags */
689#define CHANNEL_CW_INT 0x0008 /* Contention Window interference detected */
690#define CHANNEL_CCK 0x0020 /* CCK channel */
691#define CHANNEL_OFDM 0x0040 /* OFDM channel */
692#define CHANNEL_2GHZ 0x0080 /* 2GHz channel. */
693#define CHANNEL_5GHZ 0x0100 /* 5GHz channel */
694#define CHANNEL_PASSIVE 0x0200 /* Only passive scan allowed */
695#define CHANNEL_DYN 0x0400 /* Dynamic CCK-OFDM channel (for g operation) */
696
697#define CHANNEL_A (CHANNEL_5GHZ | CHANNEL_OFDM)
698#define CHANNEL_B (CHANNEL_2GHZ | CHANNEL_CCK)
699#define CHANNEL_G (CHANNEL_2GHZ | CHANNEL_OFDM)
700
701#define CHANNEL_ALL (CHANNEL_OFDM | CHANNEL_CCK | \
702 CHANNEL_2GHZ | CHANNEL_5GHZ)
703
704#define CHANNEL_MODES CHANNEL_ALL
705
706/*
707 * Used internally for ath5k_hw_reset_tx_queue().
708 * Also see struct struct ieee80211_channel.
709 */
710#define IS_CHAN_B(_c) ((_c->hw_value & CHANNEL_B) != 0)
711
712/* 688/*
713 * The following structure is used to map 2GHz channels to 689 * The following structure is used to map 2GHz channels to
714 * 5GHz Atheros channels. 690 * 5GHz Atheros channels.
@@ -965,7 +941,7 @@ enum ath5k_power_mode {
965struct ath5k_capabilities { 941struct ath5k_capabilities {
966 /* 942 /*
967 * Supported PHY modes 943 * Supported PHY modes
968 * (ie. CHANNEL_A, CHANNEL_B, ...) 944 * (ie. AR5K_MODE_11A, AR5K_MODE_11B, ...)
969 */ 945 */
970 DECLARE_BITMAP(cap_mode, AR5K_MODE_MAX); 946 DECLARE_BITMAP(cap_mode, AR5K_MODE_MAX);
971 947
@@ -1335,7 +1311,7 @@ void ath5k_unregister_leds(struct ath5k_hw *ah);
1335 1311
1336 1312
1337/* Reset Functions */ 1313/* Reset Functions */
1338int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial); 1314int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, struct ieee80211_channel *channel);
1339int ath5k_hw_on_hold(struct ath5k_hw *ah); 1315int ath5k_hw_on_hold(struct ath5k_hw *ah);
1340int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode, 1316int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
1341 struct ieee80211_channel *channel, bool fast, bool skip_pcu); 1317 struct ieee80211_channel *channel, bool fast, bool skip_pcu);
@@ -1455,13 +1431,13 @@ int ath5k_hw_write_initvals(struct ath5k_hw *ah, u8 mode, bool change_channel);
1455 1431
1456/* PHY functions */ 1432/* PHY functions */
1457/* Misc PHY functions */ 1433/* Misc PHY functions */
1458u16 ath5k_hw_radio_revision(struct ath5k_hw *ah, unsigned int chan); 1434u16 ath5k_hw_radio_revision(struct ath5k_hw *ah, enum ieee80211_band band);
1459int ath5k_hw_phy_disable(struct ath5k_hw *ah); 1435int ath5k_hw_phy_disable(struct ath5k_hw *ah);
1460/* Gain_F optimization */ 1436/* Gain_F optimization */
1461enum ath5k_rfgain ath5k_hw_gainf_calibrate(struct ath5k_hw *ah); 1437enum ath5k_rfgain ath5k_hw_gainf_calibrate(struct ath5k_hw *ah);
1462int ath5k_hw_rfgain_opt_init(struct ath5k_hw *ah); 1438int ath5k_hw_rfgain_opt_init(struct ath5k_hw *ah);
1463/* PHY/RF channel functions */ 1439/* PHY/RF channel functions */
1464bool ath5k_channel_ok(struct ath5k_hw *ah, u16 freq, unsigned int flags); 1440bool ath5k_channel_ok(struct ath5k_hw *ah, struct ieee80211_channel *channel);
1465/* PHY calibration */ 1441/* PHY calibration */
1466void ath5k_hw_init_nfcal_hist(struct ath5k_hw *ah); 1442void ath5k_hw_init_nfcal_hist(struct ath5k_hw *ah);
1467int ath5k_hw_phy_calibrate(struct ath5k_hw *ah, 1443int ath5k_hw_phy_calibrate(struct ath5k_hw *ah,
diff --git a/drivers/net/wireless/ath/ath5k/attach.c b/drivers/net/wireless/ath/ath5k/attach.c
index b0df2f6fbf4b..56062594ff7a 100644
--- a/drivers/net/wireless/ath/ath5k/attach.c
+++ b/drivers/net/wireless/ath/ath5k/attach.c
@@ -145,7 +145,7 @@ int ath5k_hw_init(struct ath5k_hw *ah)
145 goto err; 145 goto err;
146 146
147 /* Bring device out of sleep and reset its units */ 147 /* Bring device out of sleep and reset its units */
148 ret = ath5k_hw_nic_wakeup(ah, 0, true); 148 ret = ath5k_hw_nic_wakeup(ah, NULL);
149 if (ret) 149 if (ret)
150 goto err; 150 goto err;
151 151
@@ -153,7 +153,7 @@ int ath5k_hw_init(struct ath5k_hw *ah)
153 ah->ah_phy_revision = ath5k_hw_reg_read(ah, AR5K_PHY_CHIP_ID) & 153 ah->ah_phy_revision = ath5k_hw_reg_read(ah, AR5K_PHY_CHIP_ID) &
154 0xffffffff; 154 0xffffffff;
155 ah->ah_radio_5ghz_revision = ath5k_hw_radio_revision(ah, 155 ah->ah_radio_5ghz_revision = ath5k_hw_radio_revision(ah,
156 CHANNEL_5GHZ); 156 IEEE80211_BAND_5GHZ);
157 157
158 /* Try to identify radio chip based on its srev */ 158 /* Try to identify radio chip based on its srev */
159 switch (ah->ah_radio_5ghz_revision & 0xf0) { 159 switch (ah->ah_radio_5ghz_revision & 0xf0) {
@@ -161,14 +161,14 @@ int ath5k_hw_init(struct ath5k_hw *ah)
161 ah->ah_radio = AR5K_RF5111; 161 ah->ah_radio = AR5K_RF5111;
162 ah->ah_single_chip = false; 162 ah->ah_single_chip = false;
163 ah->ah_radio_2ghz_revision = ath5k_hw_radio_revision(ah, 163 ah->ah_radio_2ghz_revision = ath5k_hw_radio_revision(ah,
164 CHANNEL_2GHZ); 164 IEEE80211_BAND_2GHZ);
165 break; 165 break;
166 case AR5K_SREV_RAD_5112: 166 case AR5K_SREV_RAD_5112:
167 case AR5K_SREV_RAD_2112: 167 case AR5K_SREV_RAD_2112:
168 ah->ah_radio = AR5K_RF5112; 168 ah->ah_radio = AR5K_RF5112;
169 ah->ah_single_chip = false; 169 ah->ah_single_chip = false;
170 ah->ah_radio_2ghz_revision = ath5k_hw_radio_revision(ah, 170 ah->ah_radio_2ghz_revision = ath5k_hw_radio_revision(ah,
171 CHANNEL_2GHZ); 171 IEEE80211_BAND_2GHZ);
172 break; 172 break;
173 case AR5K_SREV_RAD_2413: 173 case AR5K_SREV_RAD_2413:
174 ah->ah_radio = AR5K_RF2413; 174 ah->ah_radio = AR5K_RF2413;
@@ -205,7 +205,7 @@ int ath5k_hw_init(struct ath5k_hw *ah)
205 ah->ah_radio = AR5K_RF5111; 205 ah->ah_radio = AR5K_RF5111;
206 ah->ah_single_chip = false; 206 ah->ah_single_chip = false;
207 ah->ah_radio_2ghz_revision = ath5k_hw_radio_revision(ah, 207 ah->ah_radio_2ghz_revision = ath5k_hw_radio_revision(ah,
208 CHANNEL_2GHZ); 208 IEEE80211_BAND_2GHZ);
209 } else if (ah->ah_mac_version == (AR5K_SREV_AR2425 >> 4) || 209 } else if (ah->ah_mac_version == (AR5K_SREV_AR2425 >> 4) ||
210 ah->ah_mac_version == (AR5K_SREV_AR2417 >> 4) || 210 ah->ah_mac_version == (AR5K_SREV_AR2417 >> 4) ||
211 ah->ah_phy_revision == AR5K_SREV_PHY_2425) { 211 ah->ah_phy_revision == AR5K_SREV_PHY_2425) {
diff --git a/drivers/net/wireless/ath/ath5k/base.c b/drivers/net/wireless/ath/ath5k/base.c
index ef911da7268e..7021c9f2c0f7 100644
--- a/drivers/net/wireless/ath/ath5k/base.c
+++ b/drivers/net/wireless/ath/ath5k/base.c
@@ -272,20 +272,18 @@ static unsigned int
272ath5k_setup_channels(struct ath5k_hw *ah, struct ieee80211_channel *channels, 272ath5k_setup_channels(struct ath5k_hw *ah, struct ieee80211_channel *channels,
273 unsigned int mode, unsigned int max) 273 unsigned int mode, unsigned int max)
274{ 274{
275 unsigned int count, size, chfreq, freq, ch; 275 unsigned int count, size, freq, ch;
276 enum ieee80211_band band; 276 enum ieee80211_band band;
277 277
278 switch (mode) { 278 switch (mode) {
279 case AR5K_MODE_11A: 279 case AR5K_MODE_11A:
280 /* 1..220, but 2GHz frequencies are filtered by check_channel */ 280 /* 1..220, but 2GHz frequencies are filtered by check_channel */
281 size = 220; 281 size = 220;
282 chfreq = CHANNEL_5GHZ;
283 band = IEEE80211_BAND_5GHZ; 282 band = IEEE80211_BAND_5GHZ;
284 break; 283 break;
285 case AR5K_MODE_11B: 284 case AR5K_MODE_11B:
286 case AR5K_MODE_11G: 285 case AR5K_MODE_11G:
287 size = 26; 286 size = 26;
288 chfreq = CHANNEL_2GHZ;
289 band = IEEE80211_BAND_2GHZ; 287 band = IEEE80211_BAND_2GHZ;
290 break; 288 break;
291 default: 289 default:
@@ -300,26 +298,19 @@ ath5k_setup_channels(struct ath5k_hw *ah, struct ieee80211_channel *channels,
300 if (freq == 0) /* mapping failed - not a standard channel */ 298 if (freq == 0) /* mapping failed - not a standard channel */
301 continue; 299 continue;
302 300
301 /* Write channel info, needed for ath5k_channel_ok() */
302 channels[count].center_freq = freq;
303 channels[count].band = band;
304 channels[count].hw_value = mode;
305
303 /* Check if channel is supported by the chipset */ 306 /* Check if channel is supported by the chipset */
304 if (!ath5k_channel_ok(ah, freq, chfreq)) 307 if (!ath5k_channel_ok(ah, &channels[count]))
305 continue; 308 continue;
306 309
307 if (!modparam_all_channels && 310 if (!modparam_all_channels &&
308 !ath5k_is_standard_channel(ch, band)) 311 !ath5k_is_standard_channel(ch, band))
309 continue; 312 continue;
310 313
311 /* Write channel info and increment counter */
312 channels[count].center_freq = freq;
313 channels[count].band = band;
314 switch (mode) {
315 case AR5K_MODE_11A:
316 case AR5K_MODE_11G:
317 channels[count].hw_value = chfreq | CHANNEL_OFDM;
318 break;
319 case AR5K_MODE_11B:
320 channels[count].hw_value = CHANNEL_B;
321 }
322
323 count++; 314 count++;
324 } 315 }
325 316
diff --git a/drivers/net/wireless/ath/ath5k/eeprom.c b/drivers/net/wireless/ath/ath5k/eeprom.c
index 56cb9d42db17..7c9c2ab7d935 100644
--- a/drivers/net/wireless/ath/ath5k/eeprom.c
+++ b/drivers/net/wireless/ath/ath5k/eeprom.c
@@ -1780,12 +1780,12 @@ ath5k_eeprom_detach(struct ath5k_hw *ah)
1780int 1780int
1781ath5k_eeprom_mode_from_channel(struct ieee80211_channel *channel) 1781ath5k_eeprom_mode_from_channel(struct ieee80211_channel *channel)
1782{ 1782{
1783 switch (channel->hw_value & CHANNEL_MODES) { 1783 switch (channel->hw_value) {
1784 case CHANNEL_A: 1784 case AR5K_MODE_11A:
1785 return AR5K_EEPROM_MODE_11A; 1785 return AR5K_EEPROM_MODE_11A;
1786 case CHANNEL_G: 1786 case AR5K_MODE_11G:
1787 return AR5K_EEPROM_MODE_11G; 1787 return AR5K_EEPROM_MODE_11G;
1788 case CHANNEL_B: 1788 case AR5K_MODE_11B:
1789 return AR5K_EEPROM_MODE_11B; 1789 return AR5K_EEPROM_MODE_11B;
1790 default: 1790 default:
1791 return -1; 1791 return -1;
diff --git a/drivers/net/wireless/ath/ath5k/pcu.c b/drivers/net/wireless/ath/ath5k/pcu.c
index 067313845060..733d46c18841 100644
--- a/drivers/net/wireless/ath/ath5k/pcu.c
+++ b/drivers/net/wireless/ath/ath5k/pcu.c
@@ -152,7 +152,7 @@ unsigned int ath5k_hw_get_default_slottime(struct ath5k_hw *ah)
152 case AR5K_BWMODE_DEFAULT: 152 case AR5K_BWMODE_DEFAULT:
153 default: 153 default:
154 slot_time = AR5K_INIT_SLOT_TIME_DEFAULT; 154 slot_time = AR5K_INIT_SLOT_TIME_DEFAULT;
155 if ((channel->hw_value & CHANNEL_CCK) && !ah->ah_short_slot) 155 if ((channel->hw_value == AR5K_MODE_11B) && !ah->ah_short_slot)
156 slot_time = AR5K_INIT_SLOT_TIME_B; 156 slot_time = AR5K_INIT_SLOT_TIME_B;
157 break; 157 break;
158 } 158 }
@@ -183,7 +183,7 @@ unsigned int ath5k_hw_get_default_sifs(struct ath5k_hw *ah)
183 case AR5K_BWMODE_DEFAULT: 183 case AR5K_BWMODE_DEFAULT:
184 sifs = AR5K_INIT_SIFS_DEFAULT_BG; 184 sifs = AR5K_INIT_SIFS_DEFAULT_BG;
185 default: 185 default:
186 if (channel->hw_value & CHANNEL_5GHZ) 186 if (channel->band == IEEE80211_BAND_5GHZ)
187 sifs = AR5K_INIT_SIFS_DEFAULT_A; 187 sifs = AR5K_INIT_SIFS_DEFAULT_A;
188 break; 188 break;
189 } 189 }
diff --git a/drivers/net/wireless/ath/ath5k/phy.c b/drivers/net/wireless/ath/ath5k/phy.c
index b9ada88d4ca6..227c914fa79d 100644
--- a/drivers/net/wireless/ath/ath5k/phy.c
+++ b/drivers/net/wireless/ath/ath5k/phy.c
@@ -38,7 +38,7 @@
38/* 38/*
39 * Get the PHY Chip revision 39 * Get the PHY Chip revision
40 */ 40 */
41u16 ath5k_hw_radio_revision(struct ath5k_hw *ah, unsigned int chan) 41u16 ath5k_hw_radio_revision(struct ath5k_hw *ah, enum ieee80211_band band)
42{ 42{
43 unsigned int i; 43 unsigned int i;
44 u32 srev; 44 u32 srev;
@@ -47,11 +47,11 @@ u16 ath5k_hw_radio_revision(struct ath5k_hw *ah, unsigned int chan)
47 /* 47 /*
48 * Set the radio chip access register 48 * Set the radio chip access register
49 */ 49 */
50 switch (chan) { 50 switch (band) {
51 case CHANNEL_2GHZ: 51 case IEEE80211_BAND_2GHZ:
52 ath5k_hw_reg_write(ah, AR5K_PHY_SHIFT_2GHZ, AR5K_PHY(0)); 52 ath5k_hw_reg_write(ah, AR5K_PHY_SHIFT_2GHZ, AR5K_PHY(0));
53 break; 53 break;
54 case CHANNEL_5GHZ: 54 case IEEE80211_BAND_5GHZ:
55 ath5k_hw_reg_write(ah, AR5K_PHY_SHIFT_5GHZ, AR5K_PHY(0)); 55 ath5k_hw_reg_write(ah, AR5K_PHY_SHIFT_5GHZ, AR5K_PHY(0));
56 break; 56 break;
57 default: 57 default:
@@ -84,14 +84,16 @@ u16 ath5k_hw_radio_revision(struct ath5k_hw *ah, unsigned int chan)
84/* 84/*
85 * Check if a channel is supported 85 * Check if a channel is supported
86 */ 86 */
87bool ath5k_channel_ok(struct ath5k_hw *ah, u16 freq, unsigned int flags) 87bool ath5k_channel_ok(struct ath5k_hw *ah, struct ieee80211_channel *channel)
88{ 88{
89 u16 freq = channel->center_freq;
90
89 /* Check if the channel is in our supported range */ 91 /* Check if the channel is in our supported range */
90 if (flags & CHANNEL_2GHZ) { 92 if (channel->band == IEEE80211_BAND_2GHZ) {
91 if ((freq >= ah->ah_capabilities.cap_range.range_2ghz_min) && 93 if ((freq >= ah->ah_capabilities.cap_range.range_2ghz_min) &&
92 (freq <= ah->ah_capabilities.cap_range.range_2ghz_max)) 94 (freq <= ah->ah_capabilities.cap_range.range_2ghz_max))
93 return true; 95 return true;
94 } else if (flags & CHANNEL_5GHZ) 96 } else if (channel->band == IEEE80211_BAND_5GHZ)
95 if ((freq >= ah->ah_capabilities.cap_range.range_5ghz_min) && 97 if ((freq >= ah->ah_capabilities.cap_range.range_5ghz_min) &&
96 (freq <= ah->ah_capabilities.cap_range.range_5ghz_max)) 98 (freq <= ah->ah_capabilities.cap_range.range_5ghz_max))
97 return true; 99 return true;
@@ -224,7 +226,7 @@ static inline int ath5k_hw_write_ofdm_timings(struct ath5k_hw *ah,
224 ds_coef_exp, ds_coef_man, clock; 226 ds_coef_exp, ds_coef_man, clock;
225 227
226 BUG_ON(!(ah->ah_version == AR5K_AR5212) || 228 BUG_ON(!(ah->ah_version == AR5K_AR5212) ||
227 !(channel->hw_value & CHANNEL_OFDM)); 229 (channel->hw_value == AR5K_MODE_11B));
228 230
229 /* Get coefficient 231 /* Get coefficient
230 * ALGO: coef = (5 * clock / carrier_freq) / 2 232 * ALGO: coef = (5 * clock / carrier_freq) / 2
@@ -298,7 +300,7 @@ static void ath5k_hw_wait_for_synth(struct ath5k_hw *ah,
298 u32 delay; 300 u32 delay;
299 delay = ath5k_hw_reg_read(ah, AR5K_PHY_RX_DELAY) & 301 delay = ath5k_hw_reg_read(ah, AR5K_PHY_RX_DELAY) &
300 AR5K_PHY_RX_DELAY_M; 302 AR5K_PHY_RX_DELAY_M;
301 delay = (channel->hw_value & CHANNEL_CCK) ? 303 delay = (channel->hw_value == AR5K_MODE_11B) ?
302 ((delay << 2) / 22) : (delay / 10); 304 ((delay << 2) / 22) : (delay / 10);
303 if (ah->ah_bwmode == AR5K_BWMODE_10MHZ) 305 if (ah->ah_bwmode == AR5K_BWMODE_10MHZ)
304 delay = delay << 1; 306 delay = delay << 1;
@@ -798,9 +800,9 @@ static int ath5k_hw_rfregs_init(struct ath5k_hw *ah,
798 } 800 }
799 801
800 /* Set Output and Driver bias current (OB/DB) */ 802 /* Set Output and Driver bias current (OB/DB) */
801 if (channel->hw_value & CHANNEL_2GHZ) { 803 if (channel->band == IEEE80211_BAND_2GHZ) {
802 804
803 if (channel->hw_value & CHANNEL_CCK) 805 if (channel->hw_value == AR5K_MODE_11B)
804 ee_mode = AR5K_EEPROM_MODE_11B; 806 ee_mode = AR5K_EEPROM_MODE_11B;
805 else 807 else
806 ee_mode = AR5K_EEPROM_MODE_11G; 808 ee_mode = AR5K_EEPROM_MODE_11G;
@@ -825,7 +827,7 @@ static int ath5k_hw_rfregs_init(struct ath5k_hw *ah,
825 AR5K_RF_DB_2GHZ, true); 827 AR5K_RF_DB_2GHZ, true);
826 828
827 /* RF5111 always needs OB/DB for 5GHz, even if we use 2GHz */ 829 /* RF5111 always needs OB/DB for 5GHz, even if we use 2GHz */
828 } else if ((channel->hw_value & CHANNEL_5GHZ) || 830 } else if ((channel->band == IEEE80211_BAND_5GHZ) ||
829 (ah->ah_radio == AR5K_RF5111)) { 831 (ah->ah_radio == AR5K_RF5111)) {
830 832
831 /* For 11a, Turbo and XR we need to choose 833 /* For 11a, Turbo and XR we need to choose
@@ -857,7 +859,7 @@ static int ath5k_hw_rfregs_init(struct ath5k_hw *ah,
857 if (ah->ah_radio == AR5K_RF5111) { 859 if (ah->ah_radio == AR5K_RF5111) {
858 860
859 /* Set gain_F settings according to current step */ 861 /* Set gain_F settings according to current step */
860 if (channel->hw_value & CHANNEL_OFDM) { 862 if (channel->hw_value != AR5K_MODE_11B) {
861 863
862 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_FRAME_CTL, 864 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_FRAME_CTL,
863 AR5K_PHY_FRAME_CTL_TX_CLIP, 865 AR5K_PHY_FRAME_CTL_TX_CLIP,
@@ -914,7 +916,7 @@ static int ath5k_hw_rfregs_init(struct ath5k_hw *ah,
914 if (ah->ah_radio == AR5K_RF5112) { 916 if (ah->ah_radio == AR5K_RF5112) {
915 917
916 /* Set gain_F settings according to current step */ 918 /* Set gain_F settings according to current step */
917 if (channel->hw_value & CHANNEL_OFDM) { 919 if (channel->hw_value != AR5K_MODE_11B) {
918 920
919 ath5k_hw_rfb_op(ah, rf_regs, g_step->gos_param[0], 921 ath5k_hw_rfb_op(ah, rf_regs, g_step->gos_param[0],
920 AR5K_RF_MIXGAIN_OVR, true); 922 AR5K_RF_MIXGAIN_OVR, true);
@@ -1026,7 +1028,7 @@ static int ath5k_hw_rfregs_init(struct ath5k_hw *ah,
1026 } 1028 }
1027 1029
1028 if (ah->ah_radio == AR5K_RF5413 && 1030 if (ah->ah_radio == AR5K_RF5413 &&
1029 channel->hw_value & CHANNEL_2GHZ) { 1031 channel->band == IEEE80211_BAND_2GHZ) {
1030 1032
1031 ath5k_hw_rfb_op(ah, rf_regs, 1, AR5K_RF_DERBY_CHAN_SEL_MODE, 1033 ath5k_hw_rfb_op(ah, rf_regs, 1, AR5K_RF_DERBY_CHAN_SEL_MODE,
1032 true); 1034 true);
@@ -1138,7 +1140,7 @@ static int ath5k_hw_rf5111_channel(struct ath5k_hw *ah,
1138 */ 1140 */
1139 data0 = data1 = 0; 1141 data0 = data1 = 0;
1140 1142
1141 if (channel->hw_value & CHANNEL_2GHZ) { 1143 if (channel->band == IEEE80211_BAND_2GHZ) {
1142 /* Map 2GHz channel to 5GHz Atheros channel ID */ 1144 /* Map 2GHz channel to 5GHz Atheros channel ID */
1143 ret = ath5k_hw_rf5111_chan2athchan( 1145 ret = ath5k_hw_rf5111_chan2athchan(
1144 ieee80211_frequency_to_channel(channel->center_freq), 1146 ieee80211_frequency_to_channel(channel->center_freq),
@@ -1265,10 +1267,9 @@ static int ath5k_hw_channel(struct ath5k_hw *ah,
1265 int ret; 1267 int ret;
1266 /* 1268 /*
1267 * Check bounds supported by the PHY (we don't care about regulatory 1269 * Check bounds supported by the PHY (we don't care about regulatory
1268 * restrictions at this point). Note: hw_value already has the band 1270 * restrictions at this point).
1269 * (CHANNEL_2GHZ, or CHANNEL_5GHZ) so we inform ath5k_channel_ok() 1271 */
1270 * of the band by that */ 1272 if (!ath5k_channel_ok(ah, channel)) {
1271 if (!ath5k_channel_ok(ah, channel->center_freq, channel->hw_value)) {
1272 ATH5K_ERR(ah, 1273 ATH5K_ERR(ah,
1273 "channel frequency (%u MHz) out of supported " 1274 "channel frequency (%u MHz) out of supported "
1274 "band range\n", 1275 "band range\n",
@@ -1614,7 +1615,7 @@ int ath5k_hw_phy_calibrate(struct ath5k_hw *ah,
1614 ret = ath5k_hw_rf511x_iq_calibrate(ah); 1615 ret = ath5k_hw_rf511x_iq_calibrate(ah);
1615 1616
1616 if ((ah->ah_radio == AR5K_RF5111 || ah->ah_radio == AR5K_RF5112) && 1617 if ((ah->ah_radio == AR5K_RF5111 || ah->ah_radio == AR5K_RF5112) &&
1617 (channel->hw_value & CHANNEL_OFDM)) 1618 (channel->hw_value != AR5K_MODE_11B))
1618 ath5k_hw_request_rfgain_probe(ah); 1619 ath5k_hw_request_rfgain_probe(ah);
1619 1620
1620 return ret; 1621 return ret;
@@ -1641,7 +1642,7 @@ ath5k_hw_set_spur_mitigation_filter(struct ath5k_hw *ah,
1641 /* Convert current frequency to fbin value (the same way channels 1642 /* Convert current frequency to fbin value (the same way channels
1642 * are stored on EEPROM, check out ath5k_eeprom_bin2freq) and scale 1643 * are stored on EEPROM, check out ath5k_eeprom_bin2freq) and scale
1643 * up by 2 so we can compare it later */ 1644 * up by 2 so we can compare it later */
1644 if (channel->hw_value & CHANNEL_2GHZ) { 1645 if (channel->band == IEEE80211_BAND_2GHZ) {
1645 chan_fbin = (channel->center_freq - 2300) * 10; 1646 chan_fbin = (channel->center_freq - 2300) * 10;
1646 freq_band = AR5K_EEPROM_BAND_2GHZ; 1647 freq_band = AR5K_EEPROM_BAND_2GHZ;
1647 } else { 1648 } else {
@@ -1703,7 +1704,7 @@ ath5k_hw_set_spur_mitigation_filter(struct ath5k_hw *ah,
1703 spur_freq_sigma_delta = (spur_delta_phase >> 10); 1704 spur_freq_sigma_delta = (spur_delta_phase >> 10);
1704 symbol_width = AR5K_SPUR_SYMBOL_WIDTH_BASE_100Hz / 4; 1705 symbol_width = AR5K_SPUR_SYMBOL_WIDTH_BASE_100Hz / 4;
1705 default: 1706 default:
1706 if (channel->hw_value == CHANNEL_A) { 1707 if (channel->band == IEEE80211_BAND_5GHZ) {
1707 /* Both sample_freq and chip_freq are 40MHz */ 1708 /* Both sample_freq and chip_freq are 40MHz */
1708 spur_delta_phase = (spur_offset << 17) / 25; 1709 spur_delta_phase = (spur_offset << 17) / 25;
1709 spur_freq_sigma_delta = 1710 spur_freq_sigma_delta =
@@ -2226,15 +2227,20 @@ ath5k_get_chan_pcal_surrounding_piers(struct ath5k_hw *ah,
2226 idx_l = 0; 2227 idx_l = 0;
2227 idx_r = 0; 2228 idx_r = 0;
2228 2229
2229 if (!(channel->hw_value & CHANNEL_OFDM)) { 2230 switch (channel->hw_value) {
2231 case AR5K_EEPROM_MODE_11A:
2232 pcinfo = ee->ee_pwr_cal_a;
2233 mode = AR5K_EEPROM_MODE_11A;
2234 break;
2235 case AR5K_EEPROM_MODE_11B:
2230 pcinfo = ee->ee_pwr_cal_b; 2236 pcinfo = ee->ee_pwr_cal_b;
2231 mode = AR5K_EEPROM_MODE_11B; 2237 mode = AR5K_EEPROM_MODE_11B;
2232 } else if (channel->hw_value & CHANNEL_2GHZ) { 2238 break;
2239 case AR5K_EEPROM_MODE_11G:
2240 default:
2233 pcinfo = ee->ee_pwr_cal_g; 2241 pcinfo = ee->ee_pwr_cal_g;
2234 mode = AR5K_EEPROM_MODE_11G; 2242 mode = AR5K_EEPROM_MODE_11G;
2235 } else { 2243 break;
2236 pcinfo = ee->ee_pwr_cal_a;
2237 mode = AR5K_EEPROM_MODE_11A;
2238 } 2244 }
2239 max = ee->ee_n_piers[mode] - 1; 2245 max = ee->ee_n_piers[mode] - 1;
2240 2246
@@ -2303,15 +2309,20 @@ ath5k_get_rate_pcal_data(struct ath5k_hw *ah,
2303 idx_l = 0; 2309 idx_l = 0;
2304 idx_r = 0; 2310 idx_r = 0;
2305 2311
2306 if (!(channel->hw_value & CHANNEL_OFDM)) { 2312 switch (channel->hw_value) {
2313 case AR5K_MODE_11A:
2314 rpinfo = ee->ee_rate_tpwr_a;
2315 mode = AR5K_EEPROM_MODE_11A;
2316 break;
2317 case AR5K_MODE_11B:
2307 rpinfo = ee->ee_rate_tpwr_b; 2318 rpinfo = ee->ee_rate_tpwr_b;
2308 mode = AR5K_EEPROM_MODE_11B; 2319 mode = AR5K_EEPROM_MODE_11B;
2309 } else if (channel->hw_value & CHANNEL_2GHZ) { 2320 break;
2321 case AR5K_MODE_11G:
2322 default:
2310 rpinfo = ee->ee_rate_tpwr_g; 2323 rpinfo = ee->ee_rate_tpwr_g;
2311 mode = AR5K_EEPROM_MODE_11G; 2324 mode = AR5K_EEPROM_MODE_11G;
2312 } else { 2325 break;
2313 rpinfo = ee->ee_rate_tpwr_a;
2314 mode = AR5K_EEPROM_MODE_11A;
2315 } 2326 }
2316 max = ee->ee_rate_target_pwr_num[mode] - 1; 2327 max = ee->ee_rate_target_pwr_num[mode] - 1;
2317 2328
@@ -2392,20 +2403,20 @@ ath5k_get_max_ctl_power(struct ath5k_hw *ah,
2392 2403
2393 ctl_mode = ath_regd_get_band_ctl(regulatory, channel->band); 2404 ctl_mode = ath_regd_get_band_ctl(regulatory, channel->band);
2394 2405
2395 switch (channel->hw_value & CHANNEL_MODES) { 2406 switch (channel->hw_value) {
2396 case CHANNEL_A: 2407 case AR5K_MODE_11A:
2397 if (ah->ah_bwmode == AR5K_BWMODE_40MHZ) 2408 if (ah->ah_bwmode == AR5K_BWMODE_40MHZ)
2398 ctl_mode |= AR5K_CTL_TURBO; 2409 ctl_mode |= AR5K_CTL_TURBO;
2399 else 2410 else
2400 ctl_mode |= AR5K_CTL_11A; 2411 ctl_mode |= AR5K_CTL_11A;
2401 break; 2412 break;
2402 case CHANNEL_G: 2413 case AR5K_MODE_11G:
2403 if (ah->ah_bwmode == AR5K_BWMODE_40MHZ) 2414 if (ah->ah_bwmode == AR5K_BWMODE_40MHZ)
2404 ctl_mode |= AR5K_CTL_TURBOG; 2415 ctl_mode |= AR5K_CTL_TURBOG;
2405 else 2416 else
2406 ctl_mode |= AR5K_CTL_11G; 2417 ctl_mode |= AR5K_CTL_11G;
2407 break; 2418 break;
2408 case CHANNEL_B: 2419 case AR5K_MODE_11B:
2409 ctl_mode |= AR5K_CTL_11B; 2420 ctl_mode |= AR5K_CTL_11B;
2410 break; 2421 break;
2411 default: 2422 default:
@@ -3290,7 +3301,7 @@ int ath5k_hw_phy_init(struct ath5k_hw *ah, struct ieee80211_channel *channel,
3290 3301
3291 /* Write OFDM timings on 5212*/ 3302 /* Write OFDM timings on 5212*/
3292 if (ah->ah_version == AR5K_AR5212 && 3303 if (ah->ah_version == AR5K_AR5212 &&
3293 channel->hw_value & CHANNEL_OFDM) { 3304 channel->hw_value != AR5K_MODE_11B) {
3294 3305
3295 ret = ath5k_hw_write_ofdm_timings(ah, channel); 3306 ret = ath5k_hw_write_ofdm_timings(ah, channel);
3296 if (ret) 3307 if (ret)
diff --git a/drivers/net/wireless/ath/ath5k/qcu.c b/drivers/net/wireless/ath/ath5k/qcu.c
index 1d376755e8bc..a8b8ffa7811d 100644
--- a/drivers/net/wireless/ath/ath5k/qcu.c
+++ b/drivers/net/wireless/ath/ath5k/qcu.c
@@ -537,7 +537,7 @@ int ath5k_hw_set_ifs_intervals(struct ath5k_hw *ah, unsigned int slot_time)
537 * 537 *
538 * Also we have different lowest rate for 802.11a 538 * Also we have different lowest rate for 802.11a
539 */ 539 */
540 if (channel->hw_value & CHANNEL_5GHZ) 540 if (channel->band == IEEE80211_BAND_5GHZ)
541 rate = &ah->sbands[IEEE80211_BAND_5GHZ].bitrates[0]; 541 rate = &ah->sbands[IEEE80211_BAND_5GHZ].bitrates[0];
542 else 542 else
543 rate = &ah->sbands[IEEE80211_BAND_2GHZ].bitrates[0]; 543 rate = &ah->sbands[IEEE80211_BAND_2GHZ].bitrates[0];
diff --git a/drivers/net/wireless/ath/ath5k/reset.c b/drivers/net/wireless/ath/ath5k/reset.c
index 5d6d3bd67d63..8bc57e457615 100644
--- a/drivers/net/wireless/ath/ath5k/reset.c
+++ b/drivers/net/wireless/ath/ath5k/reset.c
@@ -102,12 +102,18 @@ static void ath5k_hw_init_core_clock(struct ath5k_hw *ah)
102 /* 102 /*
103 * Set core clock frequency 103 * Set core clock frequency
104 */ 104 */
105 if (channel->hw_value & CHANNEL_5GHZ) 105 switch (channel->hw_value) {
106 clock = 40; /* 802.11a */ 106 case AR5K_MODE_11A:
107 else if (channel->hw_value & CHANNEL_CCK) 107 clock = 40;
108 clock = 22; /* 802.11b */ 108 break;
109 else 109 case AR5K_MODE_11B:
110 clock = 44; /* 802.11g */ 110 clock = 22;
111 break;
112 case AR5K_MODE_11G:
113 default:
114 clock = 44;
115 break;
116 }
111 117
112 /* Use clock multiplier for non-default 118 /* Use clock multiplier for non-default
113 * bwmode */ 119 * bwmode */
@@ -581,8 +587,9 @@ int ath5k_hw_on_hold(struct ath5k_hw *ah)
581 587
582/* 588/*
583 * Bring up MAC + PHY Chips and program PLL 589 * Bring up MAC + PHY Chips and program PLL
590 * Channel is NULL for the initial wakeup.
584 */ 591 */
585int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial) 592int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, struct ieee80211_channel *channel)
586{ 593{
587 struct pci_dev *pdev = ah->pdev; 594 struct pci_dev *pdev = ah->pdev;
588 u32 turbo, mode, clock, bus_flags; 595 u32 turbo, mode, clock, bus_flags;
@@ -592,7 +599,7 @@ int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial)
592 mode = 0; 599 mode = 0;
593 clock = 0; 600 clock = 0;
594 601
595 if ((ath5k_get_bus_type(ah) != ATH_AHB) || !initial) { 602 if ((ath5k_get_bus_type(ah) != ATH_AHB) || channel) {
596 /* Wakeup the device */ 603 /* Wakeup the device */
597 ret = ath5k_hw_set_power(ah, AR5K_PM_AWAKE, true, 0); 604 ret = ath5k_hw_set_power(ah, AR5K_PM_AWAKE, true, 0);
598 if (ret) { 605 if (ret) {
@@ -652,7 +659,7 @@ int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial)
652 659
653 /* On initialization skip PLL programming since we don't have 660 /* On initialization skip PLL programming since we don't have
654 * a channel / mode set yet */ 661 * a channel / mode set yet */
655 if (initial) 662 if (!channel)
656 return 0; 663 return 0;
657 664
658 if (ah->ah_version != AR5K_AR5210) { 665 if (ah->ah_version != AR5K_AR5210) {
@@ -668,13 +675,13 @@ int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial)
668 clock = AR5K_PHY_PLL_RF5111; /*Zero*/ 675 clock = AR5K_PHY_PLL_RF5111; /*Zero*/
669 } 676 }
670 677
671 if (flags & CHANNEL_2GHZ) { 678 if (channel->band == IEEE80211_BAND_2GHZ) {
672 mode |= AR5K_PHY_MODE_FREQ_2GHZ; 679 mode |= AR5K_PHY_MODE_FREQ_2GHZ;
673 clock |= AR5K_PHY_PLL_44MHZ; 680 clock |= AR5K_PHY_PLL_44MHZ;
674 681
675 if (flags & CHANNEL_CCK) { 682 if (channel->hw_value == AR5K_MODE_11B) {
676 mode |= AR5K_PHY_MODE_MOD_CCK; 683 mode |= AR5K_PHY_MODE_MOD_CCK;
677 } else if (flags & CHANNEL_OFDM) { 684 } else {
678 /* XXX Dynamic OFDM/CCK is not supported by the 685 /* XXX Dynamic OFDM/CCK is not supported by the
679 * AR5211 so we set MOD_OFDM for plain g (no 686 * AR5211 so we set MOD_OFDM for plain g (no
680 * CCK headers) operation. We need to test 687 * CCK headers) operation. We need to test
@@ -686,27 +693,16 @@ int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial)
686 mode |= AR5K_PHY_MODE_MOD_OFDM; 693 mode |= AR5K_PHY_MODE_MOD_OFDM;
687 else 694 else
688 mode |= AR5K_PHY_MODE_MOD_DYN; 695 mode |= AR5K_PHY_MODE_MOD_DYN;
689 } else {
690 ATH5K_ERR(ah,
691 "invalid radio modulation mode\n");
692 return -EINVAL;
693 } 696 }
694 } else if (flags & CHANNEL_5GHZ) { 697 } else if (channel->band == IEEE80211_BAND_5GHZ) {
695 mode |= AR5K_PHY_MODE_FREQ_5GHZ; 698 mode |= (AR5K_PHY_MODE_FREQ_5GHZ |
699 AR5K_PHY_MODE_MOD_OFDM);
696 700
697 /* Different PLL setting for 5413 */ 701 /* Different PLL setting for 5413 */
698 if (ah->ah_radio == AR5K_RF5413) 702 if (ah->ah_radio == AR5K_RF5413)
699 clock = AR5K_PHY_PLL_40MHZ_5413; 703 clock = AR5K_PHY_PLL_40MHZ_5413;
700 else 704 else
701 clock |= AR5K_PHY_PLL_40MHZ; 705 clock |= AR5K_PHY_PLL_40MHZ;
702
703 if (flags & CHANNEL_OFDM)
704 mode |= AR5K_PHY_MODE_MOD_OFDM;
705 else {
706 ATH5K_ERR(ah,
707 "invalid radio modulation mode\n");
708 return -EINVAL;
709 }
710 } else { 706 } else {
711 ATH5K_ERR(ah, "invalid radio frequency mode\n"); 707 ATH5K_ERR(ah, "invalid radio frequency mode\n");
712 return -EINVAL; 708 return -EINVAL;
@@ -822,7 +818,7 @@ static void ath5k_hw_tweak_initval_settings(struct ath5k_hw *ah,
822 u32 data; 818 u32 data;
823 ath5k_hw_reg_write(ah, AR5K_PHY_CCKTXCTL_WORLD, 819 ath5k_hw_reg_write(ah, AR5K_PHY_CCKTXCTL_WORLD,
824 AR5K_PHY_CCKTXCTL); 820 AR5K_PHY_CCKTXCTL);
825 if (channel->hw_value & CHANNEL_5GHZ) 821 if (channel->band == IEEE80211_BAND_5GHZ)
826 data = 0xffb81020; 822 data = 0xffb81020;
827 else 823 else
828 data = 0xffb80d20; 824 data = 0xffb80d20;
@@ -905,7 +901,7 @@ static void ath5k_hw_commit_eeprom_settings(struct ath5k_hw *ah,
905 /* Set CCK to OFDM power delta on tx power 901 /* Set CCK to OFDM power delta on tx power
906 * adjustment register */ 902 * adjustment register */
907 if (ah->ah_phy_revision >= AR5K_SREV_PHY_5212A) { 903 if (ah->ah_phy_revision >= AR5K_SREV_PHY_5212A) {
908 if (channel->hw_value == CHANNEL_G) 904 if (channel->hw_value == AR5K_MODE_11G)
909 ath5k_hw_reg_write(ah, 905 ath5k_hw_reg_write(ah,
910 AR5K_REG_SM((ee->ee_cck_ofdm_gain_delta * -1), 906 AR5K_REG_SM((ee->ee_cck_ofdm_gain_delta * -1),
911 AR5K_PHY_TX_PWR_ADJ_CCK_GAIN_DELTA) | 907 AR5K_PHY_TX_PWR_ADJ_CCK_GAIN_DELTA) |
@@ -1084,29 +1080,23 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
1084 ret = 0; 1080 ret = 0;
1085 } 1081 }
1086 1082
1087 switch (channel->hw_value & CHANNEL_MODES) { 1083 mode = channel->hw_value;
1088 case CHANNEL_A: 1084 switch (mode) {
1089 mode = AR5K_MODE_11A; 1085 case AR5K_MODE_11A:
1090 break; 1086 break;
1091 case CHANNEL_G: 1087 case AR5K_MODE_11G:
1092
1093 if (ah->ah_version <= AR5K_AR5211) { 1088 if (ah->ah_version <= AR5K_AR5211) {
1094 ATH5K_ERR(ah, 1089 ATH5K_ERR(ah,
1095 "G mode not available on 5210/5211"); 1090 "G mode not available on 5210/5211");
1096 return -EINVAL; 1091 return -EINVAL;
1097 } 1092 }
1098
1099 mode = AR5K_MODE_11G;
1100 break; 1093 break;
1101 case CHANNEL_B: 1094 case AR5K_MODE_11B:
1102
1103 if (ah->ah_version < AR5K_AR5211) { 1095 if (ah->ah_version < AR5K_AR5211) {
1104 ATH5K_ERR(ah, 1096 ATH5K_ERR(ah,
1105 "B mode not available on 5210"); 1097 "B mode not available on 5210");
1106 return -EINVAL; 1098 return -EINVAL;
1107 } 1099 }
1108
1109 mode = AR5K_MODE_11B;
1110 break; 1100 break;
1111 default: 1101 default:
1112 ATH5K_ERR(ah, 1102 ATH5K_ERR(ah,
@@ -1192,7 +1182,7 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
1192 } 1182 }
1193 1183
1194 /* Wakeup the device */ 1184 /* Wakeup the device */
1195 ret = ath5k_hw_nic_wakeup(ah, channel->hw_value, false); 1185 ret = ath5k_hw_nic_wakeup(ah, channel);
1196 if (ret) 1186 if (ret)
1197 return ret; 1187 return ret;
1198 1188