aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net/wireless/zd1211rw
diff options
context:
space:
mode:
authorJussi Kivilinna <jussi.kivilinna@mbnet.fi>2011-04-02 04:25:54 -0400
committerJohn W. Linville <linville@tuxdriver.com>2011-04-07 15:34:13 -0400
commitfbd5d17b8e2b418b495599c554f9c4754b7f93c9 (patch)
tree9338404d673b004c0bb22cc76e3721995ea5db34 /drivers/net/wireless/zd1211rw
parent26cd322bacd3d65fffef6f8418c2fdad5b42e4b5 (diff)
zd1211rw: rename CR* macros to ZD_CR*
With compat-wireless CR* macros in zd_usb.h conflict with CR macros in include/asm-generic/termbits.h. So rename CR* macros to ZD_CR*. Conversion was done with using sed and then 'over 80 character line' checkpatch.pl warnings and comment indents were fixed. Reported-by: Walter Goldens <goldenstranger@yahoo.com> Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/zd1211rw')
-rw-r--r--drivers/net/wireless/zd1211rw/zd_chip.c262
-rw-r--r--drivers/net/wireless/zd1211rw/zd_chip.h533
-rw-r--r--drivers/net/wireless/zd1211rw/zd_rf.h2
-rw-r--r--drivers/net/wireless/zd1211rw/zd_rf_al2230.c198
-rw-r--r--drivers/net/wireless/zd1211rw/zd_rf_al7230b.c240
-rw-r--r--drivers/net/wireless/zd1211rw/zd_rf_rf2959.c78
-rw-r--r--drivers/net/wireless/zd1211rw/zd_rf_uw2453.c86
-rw-r--r--drivers/net/wireless/zd1211rw/zd_usb.c4
-rw-r--r--drivers/net/wireless/zd1211rw/zd_usb.h2
9 files changed, 710 insertions, 695 deletions
diff --git a/drivers/net/wireless/zd1211rw/zd_chip.c b/drivers/net/wireless/zd1211rw/zd_chip.c
index a73a305d3cba..ff306d763e37 100644
--- a/drivers/net/wireless/zd1211rw/zd_chip.c
+++ b/drivers/net/wireless/zd1211rw/zd_chip.c
@@ -557,7 +557,7 @@ int zd_chip_unlock_phy_regs(struct zd_chip *chip)
557 return r; 557 return r;
558} 558}
559 559
560/* CR157 can be optionally patched by the EEPROM for original ZD1211 */ 560/* ZD_CR157 can be optionally patched by the EEPROM for original ZD1211 */
561static int patch_cr157(struct zd_chip *chip) 561static int patch_cr157(struct zd_chip *chip)
562{ 562{
563 int r; 563 int r;
@@ -571,7 +571,7 @@ static int patch_cr157(struct zd_chip *chip)
571 return r; 571 return r;
572 572
573 dev_dbg_f(zd_chip_dev(chip), "patching value %x\n", value >> 8); 573 dev_dbg_f(zd_chip_dev(chip), "patching value %x\n", value >> 8);
574 return zd_iowrite32_locked(chip, value >> 8, CR157); 574 return zd_iowrite32_locked(chip, value >> 8, ZD_CR157);
575} 575}
576 576
577/* 577/*
@@ -593,8 +593,8 @@ static int patch_6m_band_edge(struct zd_chip *chip, u8 channel)
593int zd_chip_generic_patch_6m_band(struct zd_chip *chip, int channel) 593int zd_chip_generic_patch_6m_band(struct zd_chip *chip, int channel)
594{ 594{
595 struct zd_ioreq16 ioreqs[] = { 595 struct zd_ioreq16 ioreqs[] = {
596 { CR128, 0x14 }, { CR129, 0x12 }, { CR130, 0x10 }, 596 { ZD_CR128, 0x14 }, { ZD_CR129, 0x12 }, { ZD_CR130, 0x10 },
597 { CR47, 0x1e }, 597 { ZD_CR47, 0x1e },
598 }; 598 };
599 599
600 /* FIXME: Channel 11 is not the edge for all regulatory domains. */ 600 /* FIXME: Channel 11 is not the edge for all regulatory domains. */
@@ -608,69 +608,69 @@ int zd_chip_generic_patch_6m_band(struct zd_chip *chip, int channel)
608static int zd1211_hw_reset_phy(struct zd_chip *chip) 608static int zd1211_hw_reset_phy(struct zd_chip *chip)
609{ 609{
610 static const struct zd_ioreq16 ioreqs[] = { 610 static const struct zd_ioreq16 ioreqs[] = {
611 { CR0, 0x0a }, { CR1, 0x06 }, { CR2, 0x26 }, 611 { ZD_CR0, 0x0a }, { ZD_CR1, 0x06 }, { ZD_CR2, 0x26 },
612 { CR3, 0x38 }, { CR4, 0x80 }, { CR9, 0xa0 }, 612 { ZD_CR3, 0x38 }, { ZD_CR4, 0x80 }, { ZD_CR9, 0xa0 },
613 { CR10, 0x81 }, { CR11, 0x00 }, { CR12, 0x7f }, 613 { ZD_CR10, 0x81 }, { ZD_CR11, 0x00 }, { ZD_CR12, 0x7f },
614 { CR13, 0x8c }, { CR14, 0x80 }, { CR15, 0x3d }, 614 { ZD_CR13, 0x8c }, { ZD_CR14, 0x80 }, { ZD_CR15, 0x3d },
615 { CR16, 0x20 }, { CR17, 0x1e }, { CR18, 0x0a }, 615 { ZD_CR16, 0x20 }, { ZD_CR17, 0x1e }, { ZD_CR18, 0x0a },
616 { CR19, 0x48 }, { CR20, 0x0c }, { CR21, 0x0c }, 616 { ZD_CR19, 0x48 }, { ZD_CR20, 0x0c }, { ZD_CR21, 0x0c },
617 { CR22, 0x23 }, { CR23, 0x90 }, { CR24, 0x14 }, 617 { ZD_CR22, 0x23 }, { ZD_CR23, 0x90 }, { ZD_CR24, 0x14 },
618 { CR25, 0x40 }, { CR26, 0x10 }, { CR27, 0x19 }, 618 { ZD_CR25, 0x40 }, { ZD_CR26, 0x10 }, { ZD_CR27, 0x19 },
619 { CR28, 0x7f }, { CR29, 0x80 }, { CR30, 0x4b }, 619 { ZD_CR28, 0x7f }, { ZD_CR29, 0x80 }, { ZD_CR30, 0x4b },
620 { CR31, 0x60 }, { CR32, 0x43 }, { CR33, 0x08 }, 620 { ZD_CR31, 0x60 }, { ZD_CR32, 0x43 }, { ZD_CR33, 0x08 },
621 { CR34, 0x06 }, { CR35, 0x0a }, { CR36, 0x00 }, 621 { ZD_CR34, 0x06 }, { ZD_CR35, 0x0a }, { ZD_CR36, 0x00 },
622 { CR37, 0x00 }, { CR38, 0x38 }, { CR39, 0x0c }, 622 { ZD_CR37, 0x00 }, { ZD_CR38, 0x38 }, { ZD_CR39, 0x0c },
623 { CR40, 0x84 }, { CR41, 0x2a }, { CR42, 0x80 }, 623 { ZD_CR40, 0x84 }, { ZD_CR41, 0x2a }, { ZD_CR42, 0x80 },
624 { CR43, 0x10 }, { CR44, 0x12 }, { CR46, 0xff }, 624 { ZD_CR43, 0x10 }, { ZD_CR44, 0x12 }, { ZD_CR46, 0xff },
625 { CR47, 0x1E }, { CR48, 0x26 }, { CR49, 0x5b }, 625 { ZD_CR47, 0x1E }, { ZD_CR48, 0x26 }, { ZD_CR49, 0x5b },
626 { CR64, 0xd0 }, { CR65, 0x04 }, { CR66, 0x58 }, 626 { ZD_CR64, 0xd0 }, { ZD_CR65, 0x04 }, { ZD_CR66, 0x58 },
627 { CR67, 0xc9 }, { CR68, 0x88 }, { CR69, 0x41 }, 627 { ZD_CR67, 0xc9 }, { ZD_CR68, 0x88 }, { ZD_CR69, 0x41 },
628 { CR70, 0x23 }, { CR71, 0x10 }, { CR72, 0xff }, 628 { ZD_CR70, 0x23 }, { ZD_CR71, 0x10 }, { ZD_CR72, 0xff },
629 { CR73, 0x32 }, { CR74, 0x30 }, { CR75, 0x65 }, 629 { ZD_CR73, 0x32 }, { ZD_CR74, 0x30 }, { ZD_CR75, 0x65 },
630 { CR76, 0x41 }, { CR77, 0x1b }, { CR78, 0x30 }, 630 { ZD_CR76, 0x41 }, { ZD_CR77, 0x1b }, { ZD_CR78, 0x30 },
631 { CR79, 0x68 }, { CR80, 0x64 }, { CR81, 0x64 }, 631 { ZD_CR79, 0x68 }, { ZD_CR80, 0x64 }, { ZD_CR81, 0x64 },
632 { CR82, 0x00 }, { CR83, 0x00 }, { CR84, 0x00 }, 632 { ZD_CR82, 0x00 }, { ZD_CR83, 0x00 }, { ZD_CR84, 0x00 },
633 { CR85, 0x02 }, { CR86, 0x00 }, { CR87, 0x00 }, 633 { ZD_CR85, 0x02 }, { ZD_CR86, 0x00 }, { ZD_CR87, 0x00 },
634 { CR88, 0xff }, { CR89, 0xfc }, { CR90, 0x00 }, 634 { ZD_CR88, 0xff }, { ZD_CR89, 0xfc }, { ZD_CR90, 0x00 },
635 { CR91, 0x00 }, { CR92, 0x00 }, { CR93, 0x08 }, 635 { ZD_CR91, 0x00 }, { ZD_CR92, 0x00 }, { ZD_CR93, 0x08 },
636 { CR94, 0x00 }, { CR95, 0x00 }, { CR96, 0xff }, 636 { ZD_CR94, 0x00 }, { ZD_CR95, 0x00 }, { ZD_CR96, 0xff },
637 { CR97, 0xe7 }, { CR98, 0x00 }, { CR99, 0x00 }, 637 { ZD_CR97, 0xe7 }, { ZD_CR98, 0x00 }, { ZD_CR99, 0x00 },
638 { CR100, 0x00 }, { CR101, 0xae }, { CR102, 0x02 }, 638 { ZD_CR100, 0x00 }, { ZD_CR101, 0xae }, { ZD_CR102, 0x02 },
639 { CR103, 0x00 }, { CR104, 0x03 }, { CR105, 0x65 }, 639 { ZD_CR103, 0x00 }, { ZD_CR104, 0x03 }, { ZD_CR105, 0x65 },
640 { CR106, 0x04 }, { CR107, 0x00 }, { CR108, 0x0a }, 640 { ZD_CR106, 0x04 }, { ZD_CR107, 0x00 }, { ZD_CR108, 0x0a },
641 { CR109, 0xaa }, { CR110, 0xaa }, { CR111, 0x25 }, 641 { ZD_CR109, 0xaa }, { ZD_CR110, 0xaa }, { ZD_CR111, 0x25 },
642 { CR112, 0x25 }, { CR113, 0x00 }, { CR119, 0x1e }, 642 { ZD_CR112, 0x25 }, { ZD_CR113, 0x00 }, { ZD_CR119, 0x1e },
643 { CR125, 0x90 }, { CR126, 0x00 }, { CR127, 0x00 }, 643 { ZD_CR125, 0x90 }, { ZD_CR126, 0x00 }, { ZD_CR127, 0x00 },
644 { }, 644 { },
645 { CR5, 0x00 }, { CR6, 0x00 }, { CR7, 0x00 }, 645 { ZD_CR5, 0x00 }, { ZD_CR6, 0x00 }, { ZD_CR7, 0x00 },
646 { CR8, 0x00 }, { CR9, 0x20 }, { CR12, 0xf0 }, 646 { ZD_CR8, 0x00 }, { ZD_CR9, 0x20 }, { ZD_CR12, 0xf0 },
647 { CR20, 0x0e }, { CR21, 0x0e }, { CR27, 0x10 }, 647 { ZD_CR20, 0x0e }, { ZD_CR21, 0x0e }, { ZD_CR27, 0x10 },
648 { CR44, 0x33 }, { CR47, 0x1E }, { CR83, 0x24 }, 648 { ZD_CR44, 0x33 }, { ZD_CR47, 0x1E }, { ZD_CR83, 0x24 },
649 { CR84, 0x04 }, { CR85, 0x00 }, { CR86, 0x0C }, 649 { ZD_CR84, 0x04 }, { ZD_CR85, 0x00 }, { ZD_CR86, 0x0C },
650 { CR87, 0x12 }, { CR88, 0x0C }, { CR89, 0x00 }, 650 { ZD_CR87, 0x12 }, { ZD_CR88, 0x0C }, { ZD_CR89, 0x00 },
651 { CR90, 0x10 }, { CR91, 0x08 }, { CR93, 0x00 }, 651 { ZD_CR90, 0x10 }, { ZD_CR91, 0x08 }, { ZD_CR93, 0x00 },
652 { CR94, 0x01 }, { CR95, 0x00 }, { CR96, 0x50 }, 652 { ZD_CR94, 0x01 }, { ZD_CR95, 0x00 }, { ZD_CR96, 0x50 },
653 { CR97, 0x37 }, { CR98, 0x35 }, { CR101, 0x13 }, 653 { ZD_CR97, 0x37 }, { ZD_CR98, 0x35 }, { ZD_CR101, 0x13 },
654 { CR102, 0x27 }, { CR103, 0x27 }, { CR104, 0x18 }, 654 { ZD_CR102, 0x27 }, { ZD_CR103, 0x27 }, { ZD_CR104, 0x18 },
655 { CR105, 0x12 }, { CR109, 0x27 }, { CR110, 0x27 }, 655 { ZD_CR105, 0x12 }, { ZD_CR109, 0x27 }, { ZD_CR110, 0x27 },
656 { CR111, 0x27 }, { CR112, 0x27 }, { CR113, 0x27 }, 656 { ZD_CR111, 0x27 }, { ZD_CR112, 0x27 }, { ZD_CR113, 0x27 },
657 { CR114, 0x27 }, { CR115, 0x26 }, { CR116, 0x24 }, 657 { ZD_CR114, 0x27 }, { ZD_CR115, 0x26 }, { ZD_CR116, 0x24 },
658 { CR117, 0xfc }, { CR118, 0xfa }, { CR120, 0x4f }, 658 { ZD_CR117, 0xfc }, { ZD_CR118, 0xfa }, { ZD_CR120, 0x4f },
659 { CR125, 0xaa }, { CR127, 0x03 }, { CR128, 0x14 }, 659 { ZD_CR125, 0xaa }, { ZD_CR127, 0x03 }, { ZD_CR128, 0x14 },
660 { CR129, 0x12 }, { CR130, 0x10 }, { CR131, 0x0C }, 660 { ZD_CR129, 0x12 }, { ZD_CR130, 0x10 }, { ZD_CR131, 0x0C },
661 { CR136, 0xdf }, { CR137, 0x40 }, { CR138, 0xa0 }, 661 { ZD_CR136, 0xdf }, { ZD_CR137, 0x40 }, { ZD_CR138, 0xa0 },
662 { CR139, 0xb0 }, { CR140, 0x99 }, { CR141, 0x82 }, 662 { ZD_CR139, 0xb0 }, { ZD_CR140, 0x99 }, { ZD_CR141, 0x82 },
663 { CR142, 0x54 }, { CR143, 0x1c }, { CR144, 0x6c }, 663 { ZD_CR142, 0x54 }, { ZD_CR143, 0x1c }, { ZD_CR144, 0x6c },
664 { CR147, 0x07 }, { CR148, 0x4c }, { CR149, 0x50 }, 664 { ZD_CR147, 0x07 }, { ZD_CR148, 0x4c }, { ZD_CR149, 0x50 },
665 { CR150, 0x0e }, { CR151, 0x18 }, { CR160, 0xfe }, 665 { ZD_CR150, 0x0e }, { ZD_CR151, 0x18 }, { ZD_CR160, 0xfe },
666 { CR161, 0xee }, { CR162, 0xaa }, { CR163, 0xfa }, 666 { ZD_CR161, 0xee }, { ZD_CR162, 0xaa }, { ZD_CR163, 0xfa },
667 { CR164, 0xfa }, { CR165, 0xea }, { CR166, 0xbe }, 667 { ZD_CR164, 0xfa }, { ZD_CR165, 0xea }, { ZD_CR166, 0xbe },
668 { CR167, 0xbe }, { CR168, 0x6a }, { CR169, 0xba }, 668 { ZD_CR167, 0xbe }, { ZD_CR168, 0x6a }, { ZD_CR169, 0xba },
669 { CR170, 0xba }, { CR171, 0xba }, 669 { ZD_CR170, 0xba }, { ZD_CR171, 0xba },
670 /* Note: CR204 must lead the CR203 */ 670 /* Note: ZD_CR204 must lead the ZD_CR203 */
671 { CR204, 0x7d }, 671 { ZD_CR204, 0x7d },
672 { }, 672 { },
673 { CR203, 0x30 }, 673 { ZD_CR203, 0x30 },
674 }; 674 };
675 675
676 int r, t; 676 int r, t;
@@ -697,62 +697,62 @@ out:
697static int zd1211b_hw_reset_phy(struct zd_chip *chip) 697static int zd1211b_hw_reset_phy(struct zd_chip *chip)
698{ 698{
699 static const struct zd_ioreq16 ioreqs[] = { 699 static const struct zd_ioreq16 ioreqs[] = {
700 { CR0, 0x14 }, { CR1, 0x06 }, { CR2, 0x26 }, 700 { ZD_CR0, 0x14 }, { ZD_CR1, 0x06 }, { ZD_CR2, 0x26 },
701 { CR3, 0x38 }, { CR4, 0x80 }, { CR9, 0xe0 }, 701 { ZD_CR3, 0x38 }, { ZD_CR4, 0x80 }, { ZD_CR9, 0xe0 },
702 { CR10, 0x81 }, 702 { ZD_CR10, 0x81 },
703 /* power control { { CR11, 1 << 6 }, */ 703 /* power control { { ZD_CR11, 1 << 6 }, */
704 { CR11, 0x00 }, 704 { ZD_CR11, 0x00 },
705 { CR12, 0xf0 }, { CR13, 0x8c }, { CR14, 0x80 }, 705 { ZD_CR12, 0xf0 }, { ZD_CR13, 0x8c }, { ZD_CR14, 0x80 },
706 { CR15, 0x3d }, { CR16, 0x20 }, { CR17, 0x1e }, 706 { ZD_CR15, 0x3d }, { ZD_CR16, 0x20 }, { ZD_CR17, 0x1e },
707 { CR18, 0x0a }, { CR19, 0x48 }, 707 { ZD_CR18, 0x0a }, { ZD_CR19, 0x48 },
708 { CR20, 0x10 }, /* Org:0x0E, ComTrend:RalLink AP */ 708 { ZD_CR20, 0x10 }, /* Org:0x0E, ComTrend:RalLink AP */
709 { CR21, 0x0e }, { CR22, 0x23 }, { CR23, 0x90 }, 709 { ZD_CR21, 0x0e }, { ZD_CR22, 0x23 }, { ZD_CR23, 0x90 },
710 { CR24, 0x14 }, { CR25, 0x40 }, { CR26, 0x10 }, 710 { ZD_CR24, 0x14 }, { ZD_CR25, 0x40 }, { ZD_CR26, 0x10 },
711 { CR27, 0x10 }, { CR28, 0x7f }, { CR29, 0x80 }, 711 { ZD_CR27, 0x10 }, { ZD_CR28, 0x7f }, { ZD_CR29, 0x80 },
712 { CR30, 0x4b }, /* ASIC/FWT, no jointly decoder */ 712 { ZD_CR30, 0x4b }, /* ASIC/FWT, no jointly decoder */
713 { CR31, 0x60 }, { CR32, 0x43 }, { CR33, 0x08 }, 713 { ZD_CR31, 0x60 }, { ZD_CR32, 0x43 }, { ZD_CR33, 0x08 },
714 { CR34, 0x06 }, { CR35, 0x0a }, { CR36, 0x00 }, 714 { ZD_CR34, 0x06 }, { ZD_CR35, 0x0a }, { ZD_CR36, 0x00 },
715 { CR37, 0x00 }, { CR38, 0x38 }, { CR39, 0x0c }, 715 { ZD_CR37, 0x00 }, { ZD_CR38, 0x38 }, { ZD_CR39, 0x0c },
716 { CR40, 0x84 }, { CR41, 0x2a }, { CR42, 0x80 }, 716 { ZD_CR40, 0x84 }, { ZD_CR41, 0x2a }, { ZD_CR42, 0x80 },
717 { CR43, 0x10 }, { CR44, 0x33 }, { CR46, 0xff }, 717 { ZD_CR43, 0x10 }, { ZD_CR44, 0x33 }, { ZD_CR46, 0xff },
718 { CR47, 0x1E }, { CR48, 0x26 }, { CR49, 0x5b }, 718 { ZD_CR47, 0x1E }, { ZD_CR48, 0x26 }, { ZD_CR49, 0x5b },
719 { CR64, 0xd0 }, { CR65, 0x04 }, { CR66, 0x58 }, 719 { ZD_CR64, 0xd0 }, { ZD_CR65, 0x04 }, { ZD_CR66, 0x58 },
720 { CR67, 0xc9 }, { CR68, 0x88 }, { CR69, 0x41 }, 720 { ZD_CR67, 0xc9 }, { ZD_CR68, 0x88 }, { ZD_CR69, 0x41 },
721 { CR70, 0x23 }, { CR71, 0x10 }, { CR72, 0xff }, 721 { ZD_CR70, 0x23 }, { ZD_CR71, 0x10 }, { ZD_CR72, 0xff },
722 { CR73, 0x32 }, { CR74, 0x30 }, { CR75, 0x65 }, 722 { ZD_CR73, 0x32 }, { ZD_CR74, 0x30 }, { ZD_CR75, 0x65 },
723 { CR76, 0x41 }, { CR77, 0x1b }, { CR78, 0x30 }, 723 { ZD_CR76, 0x41 }, { ZD_CR77, 0x1b }, { ZD_CR78, 0x30 },
724 { CR79, 0xf0 }, { CR80, 0x64 }, { CR81, 0x64 }, 724 { ZD_CR79, 0xf0 }, { ZD_CR80, 0x64 }, { ZD_CR81, 0x64 },
725 { CR82, 0x00 }, { CR83, 0x24 }, { CR84, 0x04 }, 725 { ZD_CR82, 0x00 }, { ZD_CR83, 0x24 }, { ZD_CR84, 0x04 },
726 { CR85, 0x00 }, { CR86, 0x0c }, { CR87, 0x12 }, 726 { ZD_CR85, 0x00 }, { ZD_CR86, 0x0c }, { ZD_CR87, 0x12 },
727 { CR88, 0x0c }, { CR89, 0x00 }, { CR90, 0x58 }, 727 { ZD_CR88, 0x0c }, { ZD_CR89, 0x00 }, { ZD_CR90, 0x58 },
728 { CR91, 0x04 }, { CR92, 0x00 }, { CR93, 0x00 }, 728 { ZD_CR91, 0x04 }, { ZD_CR92, 0x00 }, { ZD_CR93, 0x00 },
729 { CR94, 0x01 }, 729 { ZD_CR94, 0x01 },
730 { CR95, 0x20 }, /* ZD1211B */ 730 { ZD_CR95, 0x20 }, /* ZD1211B */
731 { CR96, 0x50 }, { CR97, 0x37 }, { CR98, 0x35 }, 731 { ZD_CR96, 0x50 }, { ZD_CR97, 0x37 }, { ZD_CR98, 0x35 },
732 { CR99, 0x00 }, { CR100, 0x01 }, { CR101, 0x13 }, 732 { ZD_CR99, 0x00 }, { ZD_CR100, 0x01 }, { ZD_CR101, 0x13 },
733 { CR102, 0x27 }, { CR103, 0x27 }, { CR104, 0x18 }, 733 { ZD_CR102, 0x27 }, { ZD_CR103, 0x27 }, { ZD_CR104, 0x18 },
734 { CR105, 0x12 }, { CR106, 0x04 }, { CR107, 0x00 }, 734 { ZD_CR105, 0x12 }, { ZD_CR106, 0x04 }, { ZD_CR107, 0x00 },
735 { CR108, 0x0a }, { CR109, 0x27 }, { CR110, 0x27 }, 735 { ZD_CR108, 0x0a }, { ZD_CR109, 0x27 }, { ZD_CR110, 0x27 },
736 { CR111, 0x27 }, { CR112, 0x27 }, { CR113, 0x27 }, 736 { ZD_CR111, 0x27 }, { ZD_CR112, 0x27 }, { ZD_CR113, 0x27 },
737 { CR114, 0x27 }, { CR115, 0x26 }, { CR116, 0x24 }, 737 { ZD_CR114, 0x27 }, { ZD_CR115, 0x26 }, { ZD_CR116, 0x24 },
738 { CR117, 0xfc }, { CR118, 0xfa }, { CR119, 0x1e }, 738 { ZD_CR117, 0xfc }, { ZD_CR118, 0xfa }, { ZD_CR119, 0x1e },
739 { CR125, 0x90 }, { CR126, 0x00 }, { CR127, 0x00 }, 739 { ZD_CR125, 0x90 }, { ZD_CR126, 0x00 }, { ZD_CR127, 0x00 },
740 { CR128, 0x14 }, { CR129, 0x12 }, { CR130, 0x10 }, 740 { ZD_CR128, 0x14 }, { ZD_CR129, 0x12 }, { ZD_CR130, 0x10 },
741 { CR131, 0x0c }, { CR136, 0xdf }, { CR137, 0xa0 }, 741 { ZD_CR131, 0x0c }, { ZD_CR136, 0xdf }, { ZD_CR137, 0xa0 },
742 { CR138, 0xa8 }, { CR139, 0xb4 }, { CR140, 0x98 }, 742 { ZD_CR138, 0xa8 }, { ZD_CR139, 0xb4 }, { ZD_CR140, 0x98 },
743 { CR141, 0x82 }, { CR142, 0x53 }, { CR143, 0x1c }, 743 { ZD_CR141, 0x82 }, { ZD_CR142, 0x53 }, { ZD_CR143, 0x1c },
744 { CR144, 0x6c }, { CR147, 0x07 }, { CR148, 0x40 }, 744 { ZD_CR144, 0x6c }, { ZD_CR147, 0x07 }, { ZD_CR148, 0x40 },
745 { CR149, 0x40 }, /* Org:0x50 ComTrend:RalLink AP */ 745 { ZD_CR149, 0x40 }, /* Org:0x50 ComTrend:RalLink AP */
746 { CR150, 0x14 }, /* Org:0x0E ComTrend:RalLink AP */ 746 { ZD_CR150, 0x14 }, /* Org:0x0E ComTrend:RalLink AP */
747 { CR151, 0x18 }, { CR159, 0x70 }, { CR160, 0xfe }, 747 { ZD_CR151, 0x18 }, { ZD_CR159, 0x70 }, { ZD_CR160, 0xfe },
748 { CR161, 0xee }, { CR162, 0xaa }, { CR163, 0xfa }, 748 { ZD_CR161, 0xee }, { ZD_CR162, 0xaa }, { ZD_CR163, 0xfa },
749 { CR164, 0xfa }, { CR165, 0xea }, { CR166, 0xbe }, 749 { ZD_CR164, 0xfa }, { ZD_CR165, 0xea }, { ZD_CR166, 0xbe },
750 { CR167, 0xbe }, { CR168, 0x6a }, { CR169, 0xba }, 750 { ZD_CR167, 0xbe }, { ZD_CR168, 0x6a }, { ZD_CR169, 0xba },
751 { CR170, 0xba }, { CR171, 0xba }, 751 { ZD_CR170, 0xba }, { ZD_CR171, 0xba },
752 /* Note: CR204 must lead the CR203 */ 752 /* Note: ZD_CR204 must lead the ZD_CR203 */
753 { CR204, 0x7d }, 753 { ZD_CR204, 0x7d },
754 {}, 754 {},
755 { CR203, 0x30 }, 755 { ZD_CR203, 0x30 },
756 }; 756 };
757 757
758 int r, t; 758 int r, t;
@@ -1200,24 +1200,24 @@ out:
1200static int update_pwr_int(struct zd_chip *chip, u8 channel) 1200static int update_pwr_int(struct zd_chip *chip, u8 channel)
1201{ 1201{
1202 u8 value = chip->pwr_int_values[channel - 1]; 1202 u8 value = chip->pwr_int_values[channel - 1];
1203 return zd_iowrite16_locked(chip, value, CR31); 1203 return zd_iowrite16_locked(chip, value, ZD_CR31);
1204} 1204}
1205 1205
1206static int update_pwr_cal(struct zd_chip *chip, u8 channel) 1206static int update_pwr_cal(struct zd_chip *chip, u8 channel)
1207{ 1207{
1208 u8 value = chip->pwr_cal_values[channel-1]; 1208 u8 value = chip->pwr_cal_values[channel-1];
1209 return zd_iowrite16_locked(chip, value, CR68); 1209 return zd_iowrite16_locked(chip, value, ZD_CR68);
1210} 1210}
1211 1211
1212static int update_ofdm_cal(struct zd_chip *chip, u8 channel) 1212static int update_ofdm_cal(struct zd_chip *chip, u8 channel)
1213{ 1213{
1214 struct zd_ioreq16 ioreqs[3]; 1214 struct zd_ioreq16 ioreqs[3];
1215 1215
1216 ioreqs[0].addr = CR67; 1216 ioreqs[0].addr = ZD_CR67;
1217 ioreqs[0].value = chip->ofdm_cal_values[OFDM_36M_INDEX][channel-1]; 1217 ioreqs[0].value = chip->ofdm_cal_values[OFDM_36M_INDEX][channel-1];
1218 ioreqs[1].addr = CR66; 1218 ioreqs[1].addr = ZD_CR66;
1219 ioreqs[1].value = chip->ofdm_cal_values[OFDM_48M_INDEX][channel-1]; 1219 ioreqs[1].value = chip->ofdm_cal_values[OFDM_48M_INDEX][channel-1];
1220 ioreqs[2].addr = CR65; 1220 ioreqs[2].addr = ZD_CR65;
1221 ioreqs[2].value = chip->ofdm_cal_values[OFDM_54M_INDEX][channel-1]; 1221 ioreqs[2].value = chip->ofdm_cal_values[OFDM_54M_INDEX][channel-1];
1222 1222
1223 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); 1223 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
@@ -1236,9 +1236,9 @@ static int update_channel_integration_and_calibration(struct zd_chip *chip,
1236 return r; 1236 return r;
1237 if (zd_chip_is_zd1211b(chip)) { 1237 if (zd_chip_is_zd1211b(chip)) {
1238 static const struct zd_ioreq16 ioreqs[] = { 1238 static const struct zd_ioreq16 ioreqs[] = {
1239 { CR69, 0x28 }, 1239 { ZD_CR69, 0x28 },
1240 {}, 1240 {},
1241 { CR69, 0x2a }, 1241 { ZD_CR69, 0x2a },
1242 }; 1242 };
1243 1243
1244 r = update_ofdm_cal(chip, channel); 1244 r = update_ofdm_cal(chip, channel);
@@ -1269,7 +1269,7 @@ static int patch_cck_gain(struct zd_chip *chip)
1269 if (r) 1269 if (r)
1270 return r; 1270 return r;
1271 dev_dbg_f(zd_chip_dev(chip), "patching value %x\n", value & 0xff); 1271 dev_dbg_f(zd_chip_dev(chip), "patching value %x\n", value & 0xff);
1272 return zd_iowrite16_locked(chip, value & 0xff, CR47); 1272 return zd_iowrite16_locked(chip, value & 0xff, ZD_CR47);
1273} 1273}
1274 1274
1275int zd_chip_set_channel(struct zd_chip *chip, u8 channel) 1275int zd_chip_set_channel(struct zd_chip *chip, u8 channel)
@@ -1505,9 +1505,9 @@ int zd_rfwritev_locked(struct zd_chip *chip,
1505int zd_rfwrite_cr_locked(struct zd_chip *chip, u32 value) 1505int zd_rfwrite_cr_locked(struct zd_chip *chip, u32 value)
1506{ 1506{
1507 const struct zd_ioreq16 ioreqs[] = { 1507 const struct zd_ioreq16 ioreqs[] = {
1508 { CR244, (value >> 16) & 0xff }, 1508 { ZD_CR244, (value >> 16) & 0xff },
1509 { CR243, (value >> 8) & 0xff }, 1509 { ZD_CR243, (value >> 8) & 0xff },
1510 { CR242, value & 0xff }, 1510 { ZD_CR242, value & 0xff },
1511 }; 1511 };
1512 ZD_ASSERT(mutex_is_locked(&chip->mutex)); 1512 ZD_ASSERT(mutex_is_locked(&chip->mutex));
1513 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); 1513 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
diff --git a/drivers/net/wireless/zd1211rw/zd_chip.h b/drivers/net/wireless/zd1211rw/zd_chip.h
index 14e4402a6111..4be7c3b5b265 100644
--- a/drivers/net/wireless/zd1211rw/zd_chip.h
+++ b/drivers/net/wireless/zd1211rw/zd_chip.h
@@ -61,277 +61,288 @@ enum {
61#define FWRAW_DATA(offset) ((zd_addr_t)(FW_START + (offset))) 61#define FWRAW_DATA(offset) ((zd_addr_t)(FW_START + (offset)))
62 62
63/* 8-bit hardware registers */ 63/* 8-bit hardware registers */
64#define CR0 CTL_REG(0x0000) 64#define ZD_CR0 CTL_REG(0x0000)
65#define CR1 CTL_REG(0x0004) 65#define ZD_CR1 CTL_REG(0x0004)
66#define CR2 CTL_REG(0x0008) 66#define ZD_CR2 CTL_REG(0x0008)
67#define CR3 CTL_REG(0x000C) 67#define ZD_CR3 CTL_REG(0x000C)
68 68
69#define CR5 CTL_REG(0x0010) 69#define ZD_CR5 CTL_REG(0x0010)
70/* bit 5: if set short preamble used 70/* bit 5: if set short preamble used
71 * bit 6: filter band - Japan channel 14 on, else off 71 * bit 6: filter band - Japan channel 14 on, else off
72 */ 72 */
73#define CR6 CTL_REG(0x0014) 73#define ZD_CR6 CTL_REG(0x0014)
74#define CR7 CTL_REG(0x0018) 74#define ZD_CR7 CTL_REG(0x0018)
75#define CR8 CTL_REG(0x001C) 75#define ZD_CR8 CTL_REG(0x001C)
76 76
77#define CR4 CTL_REG(0x0020) 77#define ZD_CR4 CTL_REG(0x0020)
78 78
79#define CR9 CTL_REG(0x0024) 79#define ZD_CR9 CTL_REG(0x0024)
80/* bit 2: antenna switch (together with CR10) */ 80/* bit 2: antenna switch (together with ZD_CR10) */
81#define CR10 CTL_REG(0x0028) 81#define ZD_CR10 CTL_REG(0x0028)
82/* bit 1: antenna switch (together with CR9) 82/* bit 1: antenna switch (together with ZD_CR9)
83 * RF2959 controls with CR11 radion on and off 83 * RF2959 controls with ZD_CR11 radion on and off
84 */ 84 */
85#define CR11 CTL_REG(0x002C) 85#define ZD_CR11 CTL_REG(0x002C)
86/* bit 6: TX power control for OFDM 86/* bit 6: TX power control for OFDM
87 * RF2959 controls with CR10 radio on and off 87 * RF2959 controls with ZD_CR10 radio on and off
88 */ 88 */
89#define CR12 CTL_REG(0x0030) 89#define ZD_CR12 CTL_REG(0x0030)
90#define CR13 CTL_REG(0x0034) 90#define ZD_CR13 CTL_REG(0x0034)
91#define CR14 CTL_REG(0x0038) 91#define ZD_CR14 CTL_REG(0x0038)
92#define CR15 CTL_REG(0x003C) 92#define ZD_CR15 CTL_REG(0x003C)
93#define CR16 CTL_REG(0x0040) 93#define ZD_CR16 CTL_REG(0x0040)
94#define CR17 CTL_REG(0x0044) 94#define ZD_CR17 CTL_REG(0x0044)
95#define CR18 CTL_REG(0x0048) 95#define ZD_CR18 CTL_REG(0x0048)
96#define CR19 CTL_REG(0x004C) 96#define ZD_CR19 CTL_REG(0x004C)
97#define CR20 CTL_REG(0x0050) 97#define ZD_CR20 CTL_REG(0x0050)
98#define CR21 CTL_REG(0x0054) 98#define ZD_CR21 CTL_REG(0x0054)
99#define CR22 CTL_REG(0x0058) 99#define ZD_CR22 CTL_REG(0x0058)
100#define CR23 CTL_REG(0x005C) 100#define ZD_CR23 CTL_REG(0x005C)
101#define CR24 CTL_REG(0x0060) /* CCA threshold */ 101#define ZD_CR24 CTL_REG(0x0060) /* CCA threshold */
102#define CR25 CTL_REG(0x0064) 102#define ZD_CR25 CTL_REG(0x0064)
103#define CR26 CTL_REG(0x0068) 103#define ZD_CR26 CTL_REG(0x0068)
104#define CR27 CTL_REG(0x006C) 104#define ZD_CR27 CTL_REG(0x006C)
105#define CR28 CTL_REG(0x0070) 105#define ZD_CR28 CTL_REG(0x0070)
106#define CR29 CTL_REG(0x0074) 106#define ZD_CR29 CTL_REG(0x0074)
107#define CR30 CTL_REG(0x0078) 107#define ZD_CR30 CTL_REG(0x0078)
108#define CR31 CTL_REG(0x007C) /* TX power control for RF in CCK mode */ 108#define ZD_CR31 CTL_REG(0x007C) /* TX power control for RF in
109#define CR32 CTL_REG(0x0080) 109 * CCK mode
110#define CR33 CTL_REG(0x0084) 110 */
111#define CR34 CTL_REG(0x0088) 111#define ZD_CR32 CTL_REG(0x0080)
112#define CR35 CTL_REG(0x008C) 112#define ZD_CR33 CTL_REG(0x0084)
113#define CR36 CTL_REG(0x0090) 113#define ZD_CR34 CTL_REG(0x0088)
114#define CR37 CTL_REG(0x0094) 114#define ZD_CR35 CTL_REG(0x008C)
115#define CR38 CTL_REG(0x0098) 115#define ZD_CR36 CTL_REG(0x0090)
116#define CR39 CTL_REG(0x009C) 116#define ZD_CR37 CTL_REG(0x0094)
117#define CR40 CTL_REG(0x00A0) 117#define ZD_CR38 CTL_REG(0x0098)
118#define CR41 CTL_REG(0x00A4) 118#define ZD_CR39 CTL_REG(0x009C)
119#define CR42 CTL_REG(0x00A8) 119#define ZD_CR40 CTL_REG(0x00A0)
120#define CR43 CTL_REG(0x00AC) 120#define ZD_CR41 CTL_REG(0x00A4)
121#define CR44 CTL_REG(0x00B0) 121#define ZD_CR42 CTL_REG(0x00A8)
122#define CR45 CTL_REG(0x00B4) 122#define ZD_CR43 CTL_REG(0x00AC)
123#define CR46 CTL_REG(0x00B8) 123#define ZD_CR44 CTL_REG(0x00B0)
124#define CR47 CTL_REG(0x00BC) /* CCK baseband gain 124#define ZD_CR45 CTL_REG(0x00B4)
125 * (patch value might be in EEPROM) 125#define ZD_CR46 CTL_REG(0x00B8)
126 */ 126#define ZD_CR47 CTL_REG(0x00BC) /* CCK baseband gain
127#define CR48 CTL_REG(0x00C0) 127 * (patch value might be in EEPROM)
128#define CR49 CTL_REG(0x00C4) 128 */
129#define CR50 CTL_REG(0x00C8) 129#define ZD_CR48 CTL_REG(0x00C0)
130#define CR51 CTL_REG(0x00CC) /* TX power control for RF in 6-36M modes */ 130#define ZD_CR49 CTL_REG(0x00C4)
131#define CR52 CTL_REG(0x00D0) /* TX power control for RF in 48M mode */ 131#define ZD_CR50 CTL_REG(0x00C8)
132#define CR53 CTL_REG(0x00D4) /* TX power control for RF in 54M mode */ 132#define ZD_CR51 CTL_REG(0x00CC) /* TX power control for RF in
133#define CR54 CTL_REG(0x00D8) 133 * 6-36M modes
134#define CR55 CTL_REG(0x00DC) 134 */
135#define CR56 CTL_REG(0x00E0) 135#define ZD_CR52 CTL_REG(0x00D0) /* TX power control for RF in
136#define CR57 CTL_REG(0x00E4) 136 * 48M mode
137#define CR58 CTL_REG(0x00E8) 137 */
138#define CR59 CTL_REG(0x00EC) 138#define ZD_CR53 CTL_REG(0x00D4) /* TX power control for RF in
139#define CR60 CTL_REG(0x00F0) 139 * 54M mode
140#define CR61 CTL_REG(0x00F4) 140 */
141#define CR62 CTL_REG(0x00F8) 141#define ZD_CR54 CTL_REG(0x00D8)
142#define CR63 CTL_REG(0x00FC) 142#define ZD_CR55 CTL_REG(0x00DC)
143#define CR64 CTL_REG(0x0100) 143#define ZD_CR56 CTL_REG(0x00E0)
144#define CR65 CTL_REG(0x0104) /* OFDM 54M calibration */ 144#define ZD_CR57 CTL_REG(0x00E4)
145#define CR66 CTL_REG(0x0108) /* OFDM 48M calibration */ 145#define ZD_CR58 CTL_REG(0x00E8)
146#define CR67 CTL_REG(0x010C) /* OFDM 36M calibration */ 146#define ZD_CR59 CTL_REG(0x00EC)
147#define CR68 CTL_REG(0x0110) /* CCK calibration */ 147#define ZD_CR60 CTL_REG(0x00F0)
148#define CR69 CTL_REG(0x0114) 148#define ZD_CR61 CTL_REG(0x00F4)
149#define CR70 CTL_REG(0x0118) 149#define ZD_CR62 CTL_REG(0x00F8)
150#define CR71 CTL_REG(0x011C) 150#define ZD_CR63 CTL_REG(0x00FC)
151#define CR72 CTL_REG(0x0120) 151#define ZD_CR64 CTL_REG(0x0100)
152#define CR73 CTL_REG(0x0124) 152#define ZD_CR65 CTL_REG(0x0104) /* OFDM 54M calibration */
153#define CR74 CTL_REG(0x0128) 153#define ZD_CR66 CTL_REG(0x0108) /* OFDM 48M calibration */
154#define CR75 CTL_REG(0x012C) 154#define ZD_CR67 CTL_REG(0x010C) /* OFDM 36M calibration */
155#define CR76 CTL_REG(0x0130) 155#define ZD_CR68 CTL_REG(0x0110) /* CCK calibration */
156#define CR77 CTL_REG(0x0134) 156#define ZD_CR69 CTL_REG(0x0114)
157#define CR78 CTL_REG(0x0138) 157#define ZD_CR70 CTL_REG(0x0118)
158#define CR79 CTL_REG(0x013C) 158#define ZD_CR71 CTL_REG(0x011C)
159#define CR80 CTL_REG(0x0140) 159#define ZD_CR72 CTL_REG(0x0120)
160#define CR81 CTL_REG(0x0144) 160#define ZD_CR73 CTL_REG(0x0124)
161#define CR82 CTL_REG(0x0148) 161#define ZD_CR74 CTL_REG(0x0128)
162#define CR83 CTL_REG(0x014C) 162#define ZD_CR75 CTL_REG(0x012C)
163#define CR84 CTL_REG(0x0150) 163#define ZD_CR76 CTL_REG(0x0130)
164#define CR85 CTL_REG(0x0154) 164#define ZD_CR77 CTL_REG(0x0134)
165#define CR86 CTL_REG(0x0158) 165#define ZD_CR78 CTL_REG(0x0138)
166#define CR87 CTL_REG(0x015C) 166#define ZD_CR79 CTL_REG(0x013C)
167#define CR88 CTL_REG(0x0160) 167#define ZD_CR80 CTL_REG(0x0140)
168#define CR89 CTL_REG(0x0164) 168#define ZD_CR81 CTL_REG(0x0144)
169#define CR90 CTL_REG(0x0168) 169#define ZD_CR82 CTL_REG(0x0148)
170#define CR91 CTL_REG(0x016C) 170#define ZD_CR83 CTL_REG(0x014C)
171#define CR92 CTL_REG(0x0170) 171#define ZD_CR84 CTL_REG(0x0150)
172#define CR93 CTL_REG(0x0174) 172#define ZD_CR85 CTL_REG(0x0154)
173#define CR94 CTL_REG(0x0178) 173#define ZD_CR86 CTL_REG(0x0158)
174#define CR95 CTL_REG(0x017C) 174#define ZD_CR87 CTL_REG(0x015C)
175#define CR96 CTL_REG(0x0180) 175#define ZD_CR88 CTL_REG(0x0160)
176#define CR97 CTL_REG(0x0184) 176#define ZD_CR89 CTL_REG(0x0164)
177#define CR98 CTL_REG(0x0188) 177#define ZD_CR90 CTL_REG(0x0168)
178#define CR99 CTL_REG(0x018C) 178#define ZD_CR91 CTL_REG(0x016C)
179#define CR100 CTL_REG(0x0190) 179#define ZD_CR92 CTL_REG(0x0170)
180#define CR101 CTL_REG(0x0194) 180#define ZD_CR93 CTL_REG(0x0174)
181#define CR102 CTL_REG(0x0198) 181#define ZD_CR94 CTL_REG(0x0178)
182#define CR103 CTL_REG(0x019C) 182#define ZD_CR95 CTL_REG(0x017C)
183#define CR104 CTL_REG(0x01A0) 183#define ZD_CR96 CTL_REG(0x0180)
184#define CR105 CTL_REG(0x01A4) 184#define ZD_CR97 CTL_REG(0x0184)
185#define CR106 CTL_REG(0x01A8) 185#define ZD_CR98 CTL_REG(0x0188)
186#define CR107 CTL_REG(0x01AC) 186#define ZD_CR99 CTL_REG(0x018C)
187#define CR108 CTL_REG(0x01B0) 187#define ZD_CR100 CTL_REG(0x0190)
188#define CR109 CTL_REG(0x01B4) 188#define ZD_CR101 CTL_REG(0x0194)
189#define CR110 CTL_REG(0x01B8) 189#define ZD_CR102 CTL_REG(0x0198)
190#define CR111 CTL_REG(0x01BC) 190#define ZD_CR103 CTL_REG(0x019C)
191#define CR112 CTL_REG(0x01C0) 191#define ZD_CR104 CTL_REG(0x01A0)
192#define CR113 CTL_REG(0x01C4) 192#define ZD_CR105 CTL_REG(0x01A4)
193#define CR114 CTL_REG(0x01C8) 193#define ZD_CR106 CTL_REG(0x01A8)
194#define CR115 CTL_REG(0x01CC) 194#define ZD_CR107 CTL_REG(0x01AC)
195#define CR116 CTL_REG(0x01D0) 195#define ZD_CR108 CTL_REG(0x01B0)
196#define CR117 CTL_REG(0x01D4) 196#define ZD_CR109 CTL_REG(0x01B4)
197#define CR118 CTL_REG(0x01D8) 197#define ZD_CR110 CTL_REG(0x01B8)
198#define CR119 CTL_REG(0x01DC) 198#define ZD_CR111 CTL_REG(0x01BC)
199#define CR120 CTL_REG(0x01E0) 199#define ZD_CR112 CTL_REG(0x01C0)
200#define CR121 CTL_REG(0x01E4) 200#define ZD_CR113 CTL_REG(0x01C4)
201#define CR122 CTL_REG(0x01E8) 201#define ZD_CR114 CTL_REG(0x01C8)
202#define CR123 CTL_REG(0x01EC) 202#define ZD_CR115 CTL_REG(0x01CC)
203#define CR124 CTL_REG(0x01F0) 203#define ZD_CR116 CTL_REG(0x01D0)
204#define CR125 CTL_REG(0x01F4) 204#define ZD_CR117 CTL_REG(0x01D4)
205#define CR126 CTL_REG(0x01F8) 205#define ZD_CR118 CTL_REG(0x01D8)
206#define CR127 CTL_REG(0x01FC) 206#define ZD_CR119 CTL_REG(0x01DC)
207#define CR128 CTL_REG(0x0200) 207#define ZD_CR120 CTL_REG(0x01E0)
208#define CR129 CTL_REG(0x0204) 208#define ZD_CR121 CTL_REG(0x01E4)
209#define CR130 CTL_REG(0x0208) 209#define ZD_CR122 CTL_REG(0x01E8)
210#define CR131 CTL_REG(0x020C) 210#define ZD_CR123 CTL_REG(0x01EC)
211#define CR132 CTL_REG(0x0210) 211#define ZD_CR124 CTL_REG(0x01F0)
212#define CR133 CTL_REG(0x0214) 212#define ZD_CR125 CTL_REG(0x01F4)
213#define CR134 CTL_REG(0x0218) 213#define ZD_CR126 CTL_REG(0x01F8)
214#define CR135 CTL_REG(0x021C) 214#define ZD_CR127 CTL_REG(0x01FC)
215#define CR136 CTL_REG(0x0220) 215#define ZD_CR128 CTL_REG(0x0200)
216#define CR137 CTL_REG(0x0224) 216#define ZD_CR129 CTL_REG(0x0204)
217#define CR138 CTL_REG(0x0228) 217#define ZD_CR130 CTL_REG(0x0208)
218#define CR139 CTL_REG(0x022C) 218#define ZD_CR131 CTL_REG(0x020C)
219#define CR140 CTL_REG(0x0230) 219#define ZD_CR132 CTL_REG(0x0210)
220#define CR141 CTL_REG(0x0234) 220#define ZD_CR133 CTL_REG(0x0214)
221#define CR142 CTL_REG(0x0238) 221#define ZD_CR134 CTL_REG(0x0218)
222#define CR143 CTL_REG(0x023C) 222#define ZD_CR135 CTL_REG(0x021C)
223#define CR144 CTL_REG(0x0240) 223#define ZD_CR136 CTL_REG(0x0220)
224#define CR145 CTL_REG(0x0244) 224#define ZD_CR137 CTL_REG(0x0224)
225#define CR146 CTL_REG(0x0248) 225#define ZD_CR138 CTL_REG(0x0228)
226#define CR147 CTL_REG(0x024C) 226#define ZD_CR139 CTL_REG(0x022C)
227#define CR148 CTL_REG(0x0250) 227#define ZD_CR140 CTL_REG(0x0230)
228#define CR149 CTL_REG(0x0254) 228#define ZD_CR141 CTL_REG(0x0234)
229#define CR150 CTL_REG(0x0258) 229#define ZD_CR142 CTL_REG(0x0238)
230#define CR151 CTL_REG(0x025C) 230#define ZD_CR143 CTL_REG(0x023C)
231#define CR152 CTL_REG(0x0260) 231#define ZD_CR144 CTL_REG(0x0240)
232#define CR153 CTL_REG(0x0264) 232#define ZD_CR145 CTL_REG(0x0244)
233#define CR154 CTL_REG(0x0268) 233#define ZD_CR146 CTL_REG(0x0248)
234#define CR155 CTL_REG(0x026C) 234#define ZD_CR147 CTL_REG(0x024C)
235#define CR156 CTL_REG(0x0270) 235#define ZD_CR148 CTL_REG(0x0250)
236#define CR157 CTL_REG(0x0274) 236#define ZD_CR149 CTL_REG(0x0254)
237#define CR158 CTL_REG(0x0278) 237#define ZD_CR150 CTL_REG(0x0258)
238#define CR159 CTL_REG(0x027C) 238#define ZD_CR151 CTL_REG(0x025C)
239#define CR160 CTL_REG(0x0280) 239#define ZD_CR152 CTL_REG(0x0260)
240#define CR161 CTL_REG(0x0284) 240#define ZD_CR153 CTL_REG(0x0264)
241#define CR162 CTL_REG(0x0288) 241#define ZD_CR154 CTL_REG(0x0268)
242#define CR163 CTL_REG(0x028C) 242#define ZD_CR155 CTL_REG(0x026C)
243#define CR164 CTL_REG(0x0290) 243#define ZD_CR156 CTL_REG(0x0270)
244#define CR165 CTL_REG(0x0294) 244#define ZD_CR157 CTL_REG(0x0274)
245#define CR166 CTL_REG(0x0298) 245#define ZD_CR158 CTL_REG(0x0278)
246#define CR167 CTL_REG(0x029C) 246#define ZD_CR159 CTL_REG(0x027C)
247#define CR168 CTL_REG(0x02A0) 247#define ZD_CR160 CTL_REG(0x0280)
248#define CR169 CTL_REG(0x02A4) 248#define ZD_CR161 CTL_REG(0x0284)
249#define CR170 CTL_REG(0x02A8) 249#define ZD_CR162 CTL_REG(0x0288)
250#define CR171 CTL_REG(0x02AC) 250#define ZD_CR163 CTL_REG(0x028C)
251#define CR172 CTL_REG(0x02B0) 251#define ZD_CR164 CTL_REG(0x0290)
252#define CR173 CTL_REG(0x02B4) 252#define ZD_CR165 CTL_REG(0x0294)
253#define CR174 CTL_REG(0x02B8) 253#define ZD_CR166 CTL_REG(0x0298)
254#define CR175 CTL_REG(0x02BC) 254#define ZD_CR167 CTL_REG(0x029C)
255#define CR176 CTL_REG(0x02C0) 255#define ZD_CR168 CTL_REG(0x02A0)
256#define CR177 CTL_REG(0x02C4) 256#define ZD_CR169 CTL_REG(0x02A4)
257#define CR178 CTL_REG(0x02C8) 257#define ZD_CR170 CTL_REG(0x02A8)
258#define CR179 CTL_REG(0x02CC) 258#define ZD_CR171 CTL_REG(0x02AC)
259#define CR180 CTL_REG(0x02D0) 259#define ZD_CR172 CTL_REG(0x02B0)
260#define CR181 CTL_REG(0x02D4) 260#define ZD_CR173 CTL_REG(0x02B4)
261#define CR182 CTL_REG(0x02D8) 261#define ZD_CR174 CTL_REG(0x02B8)
262#define CR183 CTL_REG(0x02DC) 262#define ZD_CR175 CTL_REG(0x02BC)
263#define CR184 CTL_REG(0x02E0) 263#define ZD_CR176 CTL_REG(0x02C0)
264#define CR185 CTL_REG(0x02E4) 264#define ZD_CR177 CTL_REG(0x02C4)
265#define CR186 CTL_REG(0x02E8) 265#define ZD_CR178 CTL_REG(0x02C8)
266#define CR187 CTL_REG(0x02EC) 266#define ZD_CR179 CTL_REG(0x02CC)
267#define CR188 CTL_REG(0x02F0) 267#define ZD_CR180 CTL_REG(0x02D0)
268#define CR189 CTL_REG(0x02F4) 268#define ZD_CR181 CTL_REG(0x02D4)
269#define CR190 CTL_REG(0x02F8) 269#define ZD_CR182 CTL_REG(0x02D8)
270#define CR191 CTL_REG(0x02FC) 270#define ZD_CR183 CTL_REG(0x02DC)
271#define CR192 CTL_REG(0x0300) 271#define ZD_CR184 CTL_REG(0x02E0)
272#define CR193 CTL_REG(0x0304) 272#define ZD_CR185 CTL_REG(0x02E4)
273#define CR194 CTL_REG(0x0308) 273#define ZD_CR186 CTL_REG(0x02E8)
274#define CR195 CTL_REG(0x030C) 274#define ZD_CR187 CTL_REG(0x02EC)
275#define CR196 CTL_REG(0x0310) 275#define ZD_CR188 CTL_REG(0x02F0)
276#define CR197 CTL_REG(0x0314) 276#define ZD_CR189 CTL_REG(0x02F4)
277#define CR198 CTL_REG(0x0318) 277#define ZD_CR190 CTL_REG(0x02F8)
278#define CR199 CTL_REG(0x031C) 278#define ZD_CR191 CTL_REG(0x02FC)
279#define CR200 CTL_REG(0x0320) 279#define ZD_CR192 CTL_REG(0x0300)
280#define CR201 CTL_REG(0x0324) 280#define ZD_CR193 CTL_REG(0x0304)
281#define CR202 CTL_REG(0x0328) 281#define ZD_CR194 CTL_REG(0x0308)
282#define CR203 CTL_REG(0x032C) /* I2C bus template value & flash control */ 282#define ZD_CR195 CTL_REG(0x030C)
283#define CR204 CTL_REG(0x0330) 283#define ZD_CR196 CTL_REG(0x0310)
284#define CR205 CTL_REG(0x0334) 284#define ZD_CR197 CTL_REG(0x0314)
285#define CR206 CTL_REG(0x0338) 285#define ZD_CR198 CTL_REG(0x0318)
286#define CR207 CTL_REG(0x033C) 286#define ZD_CR199 CTL_REG(0x031C)
287#define CR208 CTL_REG(0x0340) 287#define ZD_CR200 CTL_REG(0x0320)
288#define CR209 CTL_REG(0x0344) 288#define ZD_CR201 CTL_REG(0x0324)
289#define CR210 CTL_REG(0x0348) 289#define ZD_CR202 CTL_REG(0x0328)
290#define CR211 CTL_REG(0x034C) 290#define ZD_CR203 CTL_REG(0x032C) /* I2C bus template value & flash
291#define CR212 CTL_REG(0x0350) 291 * control
292#define CR213 CTL_REG(0x0354) 292 */
293#define CR214 CTL_REG(0x0358) 293#define ZD_CR204 CTL_REG(0x0330)
294#define CR215 CTL_REG(0x035C) 294#define ZD_CR205 CTL_REG(0x0334)
295#define CR216 CTL_REG(0x0360) 295#define ZD_CR206 CTL_REG(0x0338)
296#define CR217 CTL_REG(0x0364) 296#define ZD_CR207 CTL_REG(0x033C)
297#define CR218 CTL_REG(0x0368) 297#define ZD_CR208 CTL_REG(0x0340)
298#define CR219 CTL_REG(0x036C) 298#define ZD_CR209 CTL_REG(0x0344)
299#define CR220 CTL_REG(0x0370) 299#define ZD_CR210 CTL_REG(0x0348)
300#define CR221 CTL_REG(0x0374) 300#define ZD_CR211 CTL_REG(0x034C)
301#define CR222 CTL_REG(0x0378) 301#define ZD_CR212 CTL_REG(0x0350)
302#define CR223 CTL_REG(0x037C) 302#define ZD_CR213 CTL_REG(0x0354)
303#define CR224 CTL_REG(0x0380) 303#define ZD_CR214 CTL_REG(0x0358)
304#define CR225 CTL_REG(0x0384) 304#define ZD_CR215 CTL_REG(0x035C)
305#define CR226 CTL_REG(0x0388) 305#define ZD_CR216 CTL_REG(0x0360)
306#define CR227 CTL_REG(0x038C) 306#define ZD_CR217 CTL_REG(0x0364)
307#define CR228 CTL_REG(0x0390) 307#define ZD_CR218 CTL_REG(0x0368)
308#define CR229 CTL_REG(0x0394) 308#define ZD_CR219 CTL_REG(0x036C)
309#define CR230 CTL_REG(0x0398) 309#define ZD_CR220 CTL_REG(0x0370)
310#define CR231 CTL_REG(0x039C) 310#define ZD_CR221 CTL_REG(0x0374)
311#define CR232 CTL_REG(0x03A0) 311#define ZD_CR222 CTL_REG(0x0378)
312#define CR233 CTL_REG(0x03A4) 312#define ZD_CR223 CTL_REG(0x037C)
313#define CR234 CTL_REG(0x03A8) 313#define ZD_CR224 CTL_REG(0x0380)
314#define CR235 CTL_REG(0x03AC) 314#define ZD_CR225 CTL_REG(0x0384)
315#define CR236 CTL_REG(0x03B0) 315#define ZD_CR226 CTL_REG(0x0388)
316 316#define ZD_CR227 CTL_REG(0x038C)
317#define CR240 CTL_REG(0x03C0) 317#define ZD_CR228 CTL_REG(0x0390)
318/* bit 7: host-controlled RF register writes 318#define ZD_CR229 CTL_REG(0x0394)
319 * CR241-CR245: for hardware controlled writing of RF bits, not needed for 319#define ZD_CR230 CTL_REG(0x0398)
320 * USB 320#define ZD_CR231 CTL_REG(0x039C)
321#define ZD_CR232 CTL_REG(0x03A0)
322#define ZD_CR233 CTL_REG(0x03A4)
323#define ZD_CR234 CTL_REG(0x03A8)
324#define ZD_CR235 CTL_REG(0x03AC)
325#define ZD_CR236 CTL_REG(0x03B0)
326
327#define ZD_CR240 CTL_REG(0x03C0)
328/* bit 7: host-controlled RF register writes
329 * ZD_CR241-ZD_CR245: for hardware controlled writing of RF bits, not needed for
330 * USB
321 */ 331 */
322#define CR241 CTL_REG(0x03C4) 332#define ZD_CR241 CTL_REG(0x03C4)
323#define CR242 CTL_REG(0x03C8) 333#define ZD_CR242 CTL_REG(0x03C8)
324#define CR243 CTL_REG(0x03CC) 334#define ZD_CR243 CTL_REG(0x03CC)
325#define CR244 CTL_REG(0x03D0) 335#define ZD_CR244 CTL_REG(0x03D0)
326#define CR245 CTL_REG(0x03D4) 336#define ZD_CR245 CTL_REG(0x03D4)
327 337
328#define CR251 CTL_REG(0x03EC) /* only used for activation and deactivation of 338#define ZD_CR251 CTL_REG(0x03EC) /* only used for activation and
329 * Airoha RFs AL2230 and AL7230B 339 * deactivation of Airoha RFs AL2230
330 */ 340 * and AL7230B
331#define CR252 CTL_REG(0x03F0) 341 */
332#define CR253 CTL_REG(0x03F4) 342#define ZD_CR252 CTL_REG(0x03F0)
333#define CR254 CTL_REG(0x03F8) 343#define ZD_CR253 CTL_REG(0x03F4)
334#define CR255 CTL_REG(0x03FC) 344#define ZD_CR254 CTL_REG(0x03F8)
345#define ZD_CR255 CTL_REG(0x03FC)
335 346
336#define CR_MAX_PHY_REG 255 347#define CR_MAX_PHY_REG 255
337 348
diff --git a/drivers/net/wireless/zd1211rw/zd_rf.h b/drivers/net/wireless/zd1211rw/zd_rf.h
index 79dc1035592d..725b7c99b23d 100644
--- a/drivers/net/wireless/zd1211rw/zd_rf.h
+++ b/drivers/net/wireless/zd1211rw/zd_rf.h
@@ -55,7 +55,7 @@ struct zd_rf {
55 * defaults to 1 (yes) */ 55 * defaults to 1 (yes) */
56 u8 update_channel_int:1; 56 u8 update_channel_int:1;
57 57
58 /* whether CR47 should be patched from the EEPROM, if the appropriate 58 /* whether ZD_CR47 should be patched from the EEPROM, if the appropriate
59 * flag is set in the POD. The vendor driver suggests that this should 59 * flag is set in the POD. The vendor driver suggests that this should
60 * be done for all RF's, but a bug in their code prevents but their 60 * be done for all RF's, but a bug in their code prevents but their
61 * HW_OverWritePhyRegFromE2P() routine from ever taking effect. */ 61 * HW_OverWritePhyRegFromE2P() routine from ever taking effect. */
diff --git a/drivers/net/wireless/zd1211rw/zd_rf_al2230.c b/drivers/net/wireless/zd1211rw/zd_rf_al2230.c
index 74a8f7a55591..12babcb633c3 100644
--- a/drivers/net/wireless/zd1211rw/zd_rf_al2230.c
+++ b/drivers/net/wireless/zd1211rw/zd_rf_al2230.c
@@ -61,31 +61,31 @@ static const u32 zd1211b_al2230_table[][3] = {
61}; 61};
62 62
63static const struct zd_ioreq16 zd1211b_ioreqs_shared_1[] = { 63static const struct zd_ioreq16 zd1211b_ioreqs_shared_1[] = {
64 { CR240, 0x57 }, { CR9, 0xe0 }, 64 { ZD_CR240, 0x57 }, { ZD_CR9, 0xe0 },
65}; 65};
66 66
67static const struct zd_ioreq16 ioreqs_init_al2230s[] = { 67static const struct zd_ioreq16 ioreqs_init_al2230s[] = {
68 { CR47, 0x1e }, /* MARK_002 */ 68 { ZD_CR47, 0x1e }, /* MARK_002 */
69 { CR106, 0x22 }, 69 { ZD_CR106, 0x22 },
70 { CR107, 0x2a }, /* MARK_002 */ 70 { ZD_CR107, 0x2a }, /* MARK_002 */
71 { CR109, 0x13 }, /* MARK_002 */ 71 { ZD_CR109, 0x13 }, /* MARK_002 */
72 { CR118, 0xf8 }, /* MARK_002 */ 72 { ZD_CR118, 0xf8 }, /* MARK_002 */
73 { CR119, 0x12 }, { CR122, 0xe0 }, 73 { ZD_CR119, 0x12 }, { ZD_CR122, 0xe0 },
74 { CR128, 0x10 }, /* MARK_001 from 0xe->0x10 */ 74 { ZD_CR128, 0x10 }, /* MARK_001 from 0xe->0x10 */
75 { CR129, 0x0e }, /* MARK_001 from 0xd->0x0e */ 75 { ZD_CR129, 0x0e }, /* MARK_001 from 0xd->0x0e */
76 { CR130, 0x10 }, /* MARK_001 from 0xb->0x0d */ 76 { ZD_CR130, 0x10 }, /* MARK_001 from 0xb->0x0d */
77}; 77};
78 78
79static int zd1211b_al2230_finalize_rf(struct zd_chip *chip) 79static int zd1211b_al2230_finalize_rf(struct zd_chip *chip)
80{ 80{
81 int r; 81 int r;
82 static const struct zd_ioreq16 ioreqs[] = { 82 static const struct zd_ioreq16 ioreqs[] = {
83 { CR80, 0x30 }, { CR81, 0x30 }, { CR79, 0x58 }, 83 { ZD_CR80, 0x30 }, { ZD_CR81, 0x30 }, { ZD_CR79, 0x58 },
84 { CR12, 0xf0 }, { CR77, 0x1b }, { CR78, 0x58 }, 84 { ZD_CR12, 0xf0 }, { ZD_CR77, 0x1b }, { ZD_CR78, 0x58 },
85 { CR203, 0x06 }, 85 { ZD_CR203, 0x06 },
86 { }, 86 { },
87 87
88 { CR240, 0x80 }, 88 { ZD_CR240, 0x80 },
89 }; 89 };
90 90
91 r = zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); 91 r = zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
@@ -94,12 +94,12 @@ static int zd1211b_al2230_finalize_rf(struct zd_chip *chip)
94 94
95 /* related to antenna selection? */ 95 /* related to antenna selection? */
96 if (chip->new_phy_layout) { 96 if (chip->new_phy_layout) {
97 r = zd_iowrite16_locked(chip, 0xe1, CR9); 97 r = zd_iowrite16_locked(chip, 0xe1, ZD_CR9);
98 if (r) 98 if (r)
99 return r; 99 return r;
100 } 100 }
101 101
102 return zd_iowrite16_locked(chip, 0x06, CR203); 102 return zd_iowrite16_locked(chip, 0x06, ZD_CR203);
103} 103}
104 104
105static int zd1211_al2230_init_hw(struct zd_rf *rf) 105static int zd1211_al2230_init_hw(struct zd_rf *rf)
@@ -108,40 +108,40 @@ static int zd1211_al2230_init_hw(struct zd_rf *rf)
108 struct zd_chip *chip = zd_rf_to_chip(rf); 108 struct zd_chip *chip = zd_rf_to_chip(rf);
109 109
110 static const struct zd_ioreq16 ioreqs_init[] = { 110 static const struct zd_ioreq16 ioreqs_init[] = {
111 { CR15, 0x20 }, { CR23, 0x40 }, { CR24, 0x20 }, 111 { ZD_CR15, 0x20 }, { ZD_CR23, 0x40 }, { ZD_CR24, 0x20 },
112 { CR26, 0x11 }, { CR28, 0x3e }, { CR29, 0x00 }, 112 { ZD_CR26, 0x11 }, { ZD_CR28, 0x3e }, { ZD_CR29, 0x00 },
113 { CR44, 0x33 }, { CR106, 0x2a }, { CR107, 0x1a }, 113 { ZD_CR44, 0x33 }, { ZD_CR106, 0x2a }, { ZD_CR107, 0x1a },
114 { CR109, 0x09 }, { CR110, 0x27 }, { CR111, 0x2b }, 114 { ZD_CR109, 0x09 }, { ZD_CR110, 0x27 }, { ZD_CR111, 0x2b },
115 { CR112, 0x2b }, { CR119, 0x0a }, { CR10, 0x89 }, 115 { ZD_CR112, 0x2b }, { ZD_CR119, 0x0a }, { ZD_CR10, 0x89 },
116 /* for newest (3rd cut) AL2300 */ 116 /* for newest (3rd cut) AL2300 */
117 { CR17, 0x28 }, 117 { ZD_CR17, 0x28 },
118 { CR26, 0x93 }, { CR34, 0x30 }, 118 { ZD_CR26, 0x93 }, { ZD_CR34, 0x30 },
119 /* for newest (3rd cut) AL2300 */ 119 /* for newest (3rd cut) AL2300 */
120 { CR35, 0x3e }, 120 { ZD_CR35, 0x3e },
121 { CR41, 0x24 }, { CR44, 0x32 }, 121 { ZD_CR41, 0x24 }, { ZD_CR44, 0x32 },
122 /* for newest (3rd cut) AL2300 */ 122 /* for newest (3rd cut) AL2300 */
123 { CR46, 0x96 }, 123 { ZD_CR46, 0x96 },
124 { CR47, 0x1e }, { CR79, 0x58 }, { CR80, 0x30 }, 124 { ZD_CR47, 0x1e }, { ZD_CR79, 0x58 }, { ZD_CR80, 0x30 },
125 { CR81, 0x30 }, { CR87, 0x0a }, { CR89, 0x04 }, 125 { ZD_CR81, 0x30 }, { ZD_CR87, 0x0a }, { ZD_CR89, 0x04 },
126 { CR92, 0x0a }, { CR99, 0x28 }, { CR100, 0x00 }, 126 { ZD_CR92, 0x0a }, { ZD_CR99, 0x28 }, { ZD_CR100, 0x00 },
127 { CR101, 0x13 }, { CR102, 0x27 }, { CR106, 0x24 }, 127 { ZD_CR101, 0x13 }, { ZD_CR102, 0x27 }, { ZD_CR106, 0x24 },
128 { CR107, 0x2a }, { CR109, 0x09 }, { CR110, 0x13 }, 128 { ZD_CR107, 0x2a }, { ZD_CR109, 0x09 }, { ZD_CR110, 0x13 },
129 { CR111, 0x1f }, { CR112, 0x1f }, { CR113, 0x27 }, 129 { ZD_CR111, 0x1f }, { ZD_CR112, 0x1f }, { ZD_CR113, 0x27 },
130 { CR114, 0x27 }, 130 { ZD_CR114, 0x27 },
131 /* for newest (3rd cut) AL2300 */ 131 /* for newest (3rd cut) AL2300 */
132 { CR115, 0x24 }, 132 { ZD_CR115, 0x24 },
133 { CR116, 0x24 }, { CR117, 0xf4 }, { CR118, 0xfc }, 133 { ZD_CR116, 0x24 }, { ZD_CR117, 0xf4 }, { ZD_CR118, 0xfc },
134 { CR119, 0x10 }, { CR120, 0x4f }, { CR121, 0x77 }, 134 { ZD_CR119, 0x10 }, { ZD_CR120, 0x4f }, { ZD_CR121, 0x77 },
135 { CR122, 0xe0 }, { CR137, 0x88 }, { CR252, 0xff }, 135 { ZD_CR122, 0xe0 }, { ZD_CR137, 0x88 }, { ZD_CR252, 0xff },
136 { CR253, 0xff }, 136 { ZD_CR253, 0xff },
137 }; 137 };
138 138
139 static const struct zd_ioreq16 ioreqs_pll[] = { 139 static const struct zd_ioreq16 ioreqs_pll[] = {
140 /* shdnb(PLL_ON)=0 */ 140 /* shdnb(PLL_ON)=0 */
141 { CR251, 0x2f }, 141 { ZD_CR251, 0x2f },
142 /* shdnb(PLL_ON)=1 */ 142 /* shdnb(PLL_ON)=1 */
143 { CR251, 0x3f }, 143 { ZD_CR251, 0x3f },
144 { CR138, 0x28 }, { CR203, 0x06 }, 144 { ZD_CR138, 0x28 }, { ZD_CR203, 0x06 },
145 }; 145 };
146 146
147 static const u32 rv1[] = { 147 static const u32 rv1[] = {
@@ -161,7 +161,7 @@ static int zd1211_al2230_init_hw(struct zd_rf *rf)
161 0x0805b6, 161 0x0805b6,
162 0x011687, 162 0x011687,
163 0x000688, 163 0x000688,
164 0x0403b9, /* external control TX power (CR31) */ 164 0x0403b9, /* external control TX power (ZD_CR31) */
165 0x00dbba, 165 0x00dbba,
166 0x00099b, 166 0x00099b,
167 0x0bdffc, 167 0x0bdffc,
@@ -221,52 +221,54 @@ static int zd1211b_al2230_init_hw(struct zd_rf *rf)
221 struct zd_chip *chip = zd_rf_to_chip(rf); 221 struct zd_chip *chip = zd_rf_to_chip(rf);
222 222
223 static const struct zd_ioreq16 ioreqs1[] = { 223 static const struct zd_ioreq16 ioreqs1[] = {
224 { CR10, 0x89 }, { CR15, 0x20 }, 224 { ZD_CR10, 0x89 }, { ZD_CR15, 0x20 },
225 { CR17, 0x2B }, /* for newest(3rd cut) AL2230 */ 225 { ZD_CR17, 0x2B }, /* for newest(3rd cut) AL2230 */
226 { CR23, 0x40 }, { CR24, 0x20 }, { CR26, 0x93 }, 226 { ZD_CR23, 0x40 }, { ZD_CR24, 0x20 }, { ZD_CR26, 0x93 },
227 { CR28, 0x3e }, { CR29, 0x00 }, 227 { ZD_CR28, 0x3e }, { ZD_CR29, 0x00 },
228 { CR33, 0x28 }, /* 5621 */ 228 { ZD_CR33, 0x28 }, /* 5621 */
229 { CR34, 0x30 }, 229 { ZD_CR34, 0x30 },
230 { CR35, 0x3e }, /* for newest(3rd cut) AL2230 */ 230 { ZD_CR35, 0x3e }, /* for newest(3rd cut) AL2230 */
231 { CR41, 0x24 }, { CR44, 0x32 }, 231 { ZD_CR41, 0x24 }, { ZD_CR44, 0x32 },
232 { CR46, 0x99 }, /* for newest(3rd cut) AL2230 */ 232 { ZD_CR46, 0x99 }, /* for newest(3rd cut) AL2230 */
233 { CR47, 0x1e }, 233 { ZD_CR47, 0x1e },
234 234
235 /* ZD1211B 05.06.10 */ 235 /* ZD1211B 05.06.10 */
236 { CR48, 0x06 }, { CR49, 0xf9 }, { CR51, 0x01 }, 236 { ZD_CR48, 0x06 }, { ZD_CR49, 0xf9 }, { ZD_CR51, 0x01 },
237 { CR52, 0x80 }, { CR53, 0x7e }, { CR65, 0x00 }, 237 { ZD_CR52, 0x80 }, { ZD_CR53, 0x7e }, { ZD_CR65, 0x00 },
238 { CR66, 0x00 }, { CR67, 0x00 }, { CR68, 0x00 }, 238 { ZD_CR66, 0x00 }, { ZD_CR67, 0x00 }, { ZD_CR68, 0x00 },
239 { CR69, 0x28 }, 239 { ZD_CR69, 0x28 },
240 240
241 { CR79, 0x58 }, { CR80, 0x30 }, { CR81, 0x30 }, 241 { ZD_CR79, 0x58 }, { ZD_CR80, 0x30 }, { ZD_CR81, 0x30 },
242 { CR87, 0x0a }, { CR89, 0x04 }, 242 { ZD_CR87, 0x0a }, { ZD_CR89, 0x04 },
243 { CR91, 0x00 }, /* 5621 */ 243 { ZD_CR91, 0x00 }, /* 5621 */
244 { CR92, 0x0a }, 244 { ZD_CR92, 0x0a },
245 { CR98, 0x8d }, /* 4804, for 1212 new algorithm */ 245 { ZD_CR98, 0x8d }, /* 4804, for 1212 new algorithm */
246 { CR99, 0x00 }, /* 5621 */ 246 { ZD_CR99, 0x00 }, /* 5621 */
247 { CR101, 0x13 }, { CR102, 0x27 }, 247 { ZD_CR101, 0x13 }, { ZD_CR102, 0x27 },
248 { CR106, 0x24 }, /* for newest(3rd cut) AL2230 */ 248 { ZD_CR106, 0x24 }, /* for newest(3rd cut) AL2230 */
249 { CR107, 0x2a }, 249 { ZD_CR107, 0x2a },
250 { CR109, 0x13 }, /* 4804, for 1212 new algorithm */ 250 { ZD_CR109, 0x13 }, /* 4804, for 1212 new algorithm */
251 { CR110, 0x1f }, /* 4804, for 1212 new algorithm */ 251 { ZD_CR110, 0x1f }, /* 4804, for 1212 new algorithm */
252 { CR111, 0x1f }, { CR112, 0x1f }, { CR113, 0x27 }, 252 { ZD_CR111, 0x1f }, { ZD_CR112, 0x1f }, { ZD_CR113, 0x27 },
253 { CR114, 0x27 }, 253 { ZD_CR114, 0x27 },
254 { CR115, 0x26 }, /* 24->26 at 4902 for newest(3rd cut) AL2230 */ 254 { ZD_CR115, 0x26 }, /* 24->26 at 4902 for newest(3rd cut)
255 { CR116, 0x24 }, 255 * AL2230
256 { CR117, 0xfa }, /* for 1211b */ 256 */
257 { CR118, 0xfa }, /* for 1211b */ 257 { ZD_CR116, 0x24 },
258 { CR119, 0x10 }, 258 { ZD_CR117, 0xfa }, /* for 1211b */
259 { CR120, 0x4f }, 259 { ZD_CR118, 0xfa }, /* for 1211b */
260 { CR121, 0x6c }, /* for 1211b */ 260 { ZD_CR119, 0x10 },
261 { CR122, 0xfc }, /* E0->FC at 4902 */ 261 { ZD_CR120, 0x4f },
262 { CR123, 0x57 }, /* 5623 */ 262 { ZD_CR121, 0x6c }, /* for 1211b */
263 { CR125, 0xad }, /* 4804, for 1212 new algorithm */ 263 { ZD_CR122, 0xfc }, /* E0->FC at 4902 */
264 { CR126, 0x6c }, /* 5614 */ 264 { ZD_CR123, 0x57 }, /* 5623 */
265 { CR127, 0x03 }, /* 4804, for 1212 new algorithm */ 265 { ZD_CR125, 0xad }, /* 4804, for 1212 new algorithm */
266 { CR137, 0x50 }, /* 5614 */ 266 { ZD_CR126, 0x6c }, /* 5614 */
267 { CR138, 0xa8 }, 267 { ZD_CR127, 0x03 }, /* 4804, for 1212 new algorithm */
268 { CR144, 0xac }, /* 5621 */ 268 { ZD_CR137, 0x50 }, /* 5614 */
269 { CR150, 0x0d }, { CR252, 0x34 }, { CR253, 0x34 }, 269 { ZD_CR138, 0xa8 },
270 { ZD_CR144, 0xac }, /* 5621 */
271 { ZD_CR150, 0x0d }, { ZD_CR252, 0x34 }, { ZD_CR253, 0x34 },
270 }; 272 };
271 273
272 static const u32 rv1[] = { 274 static const u32 rv1[] = {
@@ -284,7 +286,7 @@ static int zd1211b_al2230_init_hw(struct zd_rf *rf)
284 0x6da010, /* Reg6 update for MP versio */ 286 0x6da010, /* Reg6 update for MP versio */
285 0xe36280, /* Modified by jxiao for Bor-Chin on 2004/08/02 */ 287 0xe36280, /* Modified by jxiao for Bor-Chin on 2004/08/02 */
286 0x116000, 288 0x116000,
287 0x9dc020, /* External control TX power (CR31) */ 289 0x9dc020, /* External control TX power (ZD_CR31) */
288 0x5ddb00, /* RegA update for MP version */ 290 0x5ddb00, /* RegA update for MP version */
289 0xd99000, /* RegB update for MP version */ 291 0xd99000, /* RegB update for MP version */
290 0x3ffbd0, /* RegC update for MP version */ 292 0x3ffbd0, /* RegC update for MP version */
@@ -295,8 +297,8 @@ static int zd1211b_al2230_init_hw(struct zd_rf *rf)
295 }; 297 };
296 298
297 static const struct zd_ioreq16 ioreqs2[] = { 299 static const struct zd_ioreq16 ioreqs2[] = {
298 { CR251, 0x2f }, /* shdnb(PLL_ON)=0 */ 300 { ZD_CR251, 0x2f }, /* shdnb(PLL_ON)=0 */
299 { CR251, 0x7f }, /* shdnb(PLL_ON)=1 */ 301 { ZD_CR251, 0x7f }, /* shdnb(PLL_ON)=1 */
300 }; 302 };
301 303
302 static const u32 rv3[] = { 304 static const u32 rv3[] = {
@@ -308,7 +310,7 @@ static int zd1211b_al2230_init_hw(struct zd_rf *rf)
308 310
309 static const struct zd_ioreq16 ioreqs3[] = { 311 static const struct zd_ioreq16 ioreqs3[] = {
310 /* related to 6M band edge patching, happens unconditionally */ 312 /* related to 6M band edge patching, happens unconditionally */
311 { CR128, 0x14 }, { CR129, 0x12 }, { CR130, 0x10 }, 313 { ZD_CR128, 0x14 }, { ZD_CR129, 0x12 }, { ZD_CR130, 0x10 },
312 }; 314 };
313 315
314 r = zd_iowrite16a_locked(chip, zd1211b_ioreqs_shared_1, 316 r = zd_iowrite16a_locked(chip, zd1211b_ioreqs_shared_1,
@@ -361,8 +363,8 @@ static int zd1211_al2230_set_channel(struct zd_rf *rf, u8 channel)
361 const u32 *rv = zd1211_al2230_table[channel-1]; 363 const u32 *rv = zd1211_al2230_table[channel-1];
362 struct zd_chip *chip = zd_rf_to_chip(rf); 364 struct zd_chip *chip = zd_rf_to_chip(rf);
363 static const struct zd_ioreq16 ioreqs[] = { 365 static const struct zd_ioreq16 ioreqs[] = {
364 { CR138, 0x28 }, 366 { ZD_CR138, 0x28 },
365 { CR203, 0x06 }, 367 { ZD_CR203, 0x06 },
366 }; 368 };
367 369
368 r = zd_rfwritev_locked(chip, rv, 3, RF_RV_BITS); 370 r = zd_rfwritev_locked(chip, rv, 3, RF_RV_BITS);
@@ -393,8 +395,8 @@ static int zd1211_al2230_switch_radio_on(struct zd_rf *rf)
393{ 395{
394 struct zd_chip *chip = zd_rf_to_chip(rf); 396 struct zd_chip *chip = zd_rf_to_chip(rf);
395 static const struct zd_ioreq16 ioreqs[] = { 397 static const struct zd_ioreq16 ioreqs[] = {
396 { CR11, 0x00 }, 398 { ZD_CR11, 0x00 },
397 { CR251, 0x3f }, 399 { ZD_CR251, 0x3f },
398 }; 400 };
399 401
400 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); 402 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
@@ -404,8 +406,8 @@ static int zd1211b_al2230_switch_radio_on(struct zd_rf *rf)
404{ 406{
405 struct zd_chip *chip = zd_rf_to_chip(rf); 407 struct zd_chip *chip = zd_rf_to_chip(rf);
406 static const struct zd_ioreq16 ioreqs[] = { 408 static const struct zd_ioreq16 ioreqs[] = {
407 { CR11, 0x00 }, 409 { ZD_CR11, 0x00 },
408 { CR251, 0x7f }, 410 { ZD_CR251, 0x7f },
409 }; 411 };
410 412
411 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); 413 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
@@ -415,8 +417,8 @@ static int al2230_switch_radio_off(struct zd_rf *rf)
415{ 417{
416 struct zd_chip *chip = zd_rf_to_chip(rf); 418 struct zd_chip *chip = zd_rf_to_chip(rf);
417 static const struct zd_ioreq16 ioreqs[] = { 419 static const struct zd_ioreq16 ioreqs[] = {
418 { CR11, 0x04 }, 420 { ZD_CR11, 0x04 },
419 { CR251, 0x2f }, 421 { ZD_CR251, 0x2f },
420 }; 422 };
421 423
422 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); 424 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
diff --git a/drivers/net/wireless/zd1211rw/zd_rf_al7230b.c b/drivers/net/wireless/zd1211rw/zd_rf_al7230b.c
index 65095d661e6b..385c670d1293 100644
--- a/drivers/net/wireless/zd1211rw/zd_rf_al7230b.c
+++ b/drivers/net/wireless/zd1211rw/zd_rf_al7230b.c
@@ -68,19 +68,19 @@ static const u32 rv_init2[] = {
68}; 68};
69 69
70static const struct zd_ioreq16 ioreqs_sw[] = { 70static const struct zd_ioreq16 ioreqs_sw[] = {
71 { CR128, 0x14 }, { CR129, 0x12 }, { CR130, 0x10 }, 71 { ZD_CR128, 0x14 }, { ZD_CR129, 0x12 }, { ZD_CR130, 0x10 },
72 { CR38, 0x38 }, { CR136, 0xdf }, 72 { ZD_CR38, 0x38 }, { ZD_CR136, 0xdf },
73}; 73};
74 74
75static int zd1211b_al7230b_finalize(struct zd_chip *chip) 75static int zd1211b_al7230b_finalize(struct zd_chip *chip)
76{ 76{
77 int r; 77 int r;
78 static const struct zd_ioreq16 ioreqs[] = { 78 static const struct zd_ioreq16 ioreqs[] = {
79 { CR80, 0x30 }, { CR81, 0x30 }, { CR79, 0x58 }, 79 { ZD_CR80, 0x30 }, { ZD_CR81, 0x30 }, { ZD_CR79, 0x58 },
80 { CR12, 0xf0 }, { CR77, 0x1b }, { CR78, 0x58 }, 80 { ZD_CR12, 0xf0 }, { ZD_CR77, 0x1b }, { ZD_CR78, 0x58 },
81 { CR203, 0x04 }, 81 { ZD_CR203, 0x04 },
82 { }, 82 { },
83 { CR240, 0x80 }, 83 { ZD_CR240, 0x80 },
84 }; 84 };
85 85
86 r = zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); 86 r = zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
@@ -89,12 +89,12 @@ static int zd1211b_al7230b_finalize(struct zd_chip *chip)
89 89
90 if (chip->new_phy_layout) { 90 if (chip->new_phy_layout) {
91 /* antenna selection? */ 91 /* antenna selection? */
92 r = zd_iowrite16_locked(chip, 0xe5, CR9); 92 r = zd_iowrite16_locked(chip, 0xe5, ZD_CR9);
93 if (r) 93 if (r)
94 return r; 94 return r;
95 } 95 }
96 96
97 return zd_iowrite16_locked(chip, 0x04, CR203); 97 return zd_iowrite16_locked(chip, 0x04, ZD_CR203);
98} 98}
99 99
100static int zd1211_al7230b_init_hw(struct zd_rf *rf) 100static int zd1211_al7230b_init_hw(struct zd_rf *rf)
@@ -106,66 +106,66 @@ static int zd1211_al7230b_init_hw(struct zd_rf *rf)
106 * specified */ 106 * specified */
107 static const struct zd_ioreq16 ioreqs_1[] = { 107 static const struct zd_ioreq16 ioreqs_1[] = {
108 /* This one is 7230-specific, and happens before the rest */ 108 /* This one is 7230-specific, and happens before the rest */
109 { CR240, 0x57 }, 109 { ZD_CR240, 0x57 },
110 { }, 110 { },
111 111
112 { CR15, 0x20 }, { CR23, 0x40 }, { CR24, 0x20 }, 112 { ZD_CR15, 0x20 }, { ZD_CR23, 0x40 }, { ZD_CR24, 0x20 },
113 { CR26, 0x11 }, { CR28, 0x3e }, { CR29, 0x00 }, 113 { ZD_CR26, 0x11 }, { ZD_CR28, 0x3e }, { ZD_CR29, 0x00 },
114 { CR44, 0x33 }, 114 { ZD_CR44, 0x33 },
115 /* This value is different for 7230 (was: 0x2a) */ 115 /* This value is different for 7230 (was: 0x2a) */
116 { CR106, 0x22 }, 116 { ZD_CR106, 0x22 },
117 { CR107, 0x1a }, { CR109, 0x09 }, { CR110, 0x27 }, 117 { ZD_CR107, 0x1a }, { ZD_CR109, 0x09 }, { ZD_CR110, 0x27 },
118 { CR111, 0x2b }, { CR112, 0x2b }, { CR119, 0x0a }, 118 { ZD_CR111, 0x2b }, { ZD_CR112, 0x2b }, { ZD_CR119, 0x0a },
119 /* This happened further down in AL2230, 119 /* This happened further down in AL2230,
120 * and the value changed (was: 0xe0) */ 120 * and the value changed (was: 0xe0) */
121 { CR122, 0xfc }, 121 { ZD_CR122, 0xfc },
122 { CR10, 0x89 }, 122 { ZD_CR10, 0x89 },
123 /* for newest (3rd cut) AL2300 */ 123 /* for newest (3rd cut) AL2300 */
124 { CR17, 0x28 }, 124 { ZD_CR17, 0x28 },
125 { CR26, 0x93 }, { CR34, 0x30 }, 125 { ZD_CR26, 0x93 }, { ZD_CR34, 0x30 },
126 /* for newest (3rd cut) AL2300 */ 126 /* for newest (3rd cut) AL2300 */
127 { CR35, 0x3e }, 127 { ZD_CR35, 0x3e },
128 { CR41, 0x24 }, { CR44, 0x32 }, 128 { ZD_CR41, 0x24 }, { ZD_CR44, 0x32 },
129 /* for newest (3rd cut) AL2300 */ 129 /* for newest (3rd cut) AL2300 */
130 { CR46, 0x96 }, 130 { ZD_CR46, 0x96 },
131 { CR47, 0x1e }, { CR79, 0x58 }, { CR80, 0x30 }, 131 { ZD_CR47, 0x1e }, { ZD_CR79, 0x58 }, { ZD_CR80, 0x30 },
132 { CR81, 0x30 }, { CR87, 0x0a }, { CR89, 0x04 }, 132 { ZD_CR81, 0x30 }, { ZD_CR87, 0x0a }, { ZD_CR89, 0x04 },
133 { CR92, 0x0a }, { CR99, 0x28 }, 133 { ZD_CR92, 0x0a }, { ZD_CR99, 0x28 },
134 /* This value is different for 7230 (was: 0x00) */ 134 /* This value is different for 7230 (was: 0x00) */
135 { CR100, 0x02 }, 135 { ZD_CR100, 0x02 },
136 { CR101, 0x13 }, { CR102, 0x27 }, 136 { ZD_CR101, 0x13 }, { ZD_CR102, 0x27 },
137 /* This value is different for 7230 (was: 0x24) */ 137 /* This value is different for 7230 (was: 0x24) */
138 { CR106, 0x22 }, 138 { ZD_CR106, 0x22 },
139 /* This value is different for 7230 (was: 0x2a) */ 139 /* This value is different for 7230 (was: 0x2a) */
140 { CR107, 0x3f }, 140 { ZD_CR107, 0x3f },
141 { CR109, 0x09 }, 141 { ZD_CR109, 0x09 },
142 /* This value is different for 7230 (was: 0x13) */ 142 /* This value is different for 7230 (was: 0x13) */
143 { CR110, 0x1f }, 143 { ZD_CR110, 0x1f },
144 { CR111, 0x1f }, { CR112, 0x1f }, { CR113, 0x27 }, 144 { ZD_CR111, 0x1f }, { ZD_CR112, 0x1f }, { ZD_CR113, 0x27 },
145 { CR114, 0x27 }, 145 { ZD_CR114, 0x27 },
146 /* for newest (3rd cut) AL2300 */ 146 /* for newest (3rd cut) AL2300 */
147 { CR115, 0x24 }, 147 { ZD_CR115, 0x24 },
148 /* This value is different for 7230 (was: 0x24) */ 148 /* This value is different for 7230 (was: 0x24) */
149 { CR116, 0x3f }, 149 { ZD_CR116, 0x3f },
150 /* This value is different for 7230 (was: 0xf4) */ 150 /* This value is different for 7230 (was: 0xf4) */
151 { CR117, 0xfa }, 151 { ZD_CR117, 0xfa },
152 { CR118, 0xfc }, { CR119, 0x10 }, { CR120, 0x4f }, 152 { ZD_CR118, 0xfc }, { ZD_CR119, 0x10 }, { ZD_CR120, 0x4f },
153 { CR121, 0x77 }, { CR137, 0x88 }, 153 { ZD_CR121, 0x77 }, { ZD_CR137, 0x88 },
154 /* This one is 7230-specific */ 154 /* This one is 7230-specific */
155 { CR138, 0xa8 }, 155 { ZD_CR138, 0xa8 },
156 /* This value is different for 7230 (was: 0xff) */ 156 /* This value is different for 7230 (was: 0xff) */
157 { CR252, 0x34 }, 157 { ZD_CR252, 0x34 },
158 /* This value is different for 7230 (was: 0xff) */ 158 /* This value is different for 7230 (was: 0xff) */
159 { CR253, 0x34 }, 159 { ZD_CR253, 0x34 },
160 160
161 /* PLL_OFF */ 161 /* PLL_OFF */
162 { CR251, 0x2f }, 162 { ZD_CR251, 0x2f },
163 }; 163 };
164 164
165 static const struct zd_ioreq16 ioreqs_2[] = { 165 static const struct zd_ioreq16 ioreqs_2[] = {
166 { CR251, 0x3f }, /* PLL_ON */ 166 { ZD_CR251, 0x3f }, /* PLL_ON */
167 { CR128, 0x14 }, { CR129, 0x12 }, { CR130, 0x10 }, 167 { ZD_CR128, 0x14 }, { ZD_CR129, 0x12 }, { ZD_CR130, 0x10 },
168 { CR38, 0x38 }, { CR136, 0xdf }, 168 { ZD_CR38, 0x38 }, { ZD_CR136, 0xdf },
169 }; 169 };
170 170
171 r = zd_iowrite16a_locked(chip, ioreqs_1, ARRAY_SIZE(ioreqs_1)); 171 r = zd_iowrite16a_locked(chip, ioreqs_1, ARRAY_SIZE(ioreqs_1));
@@ -192,10 +192,10 @@ static int zd1211_al7230b_init_hw(struct zd_rf *rf)
192 if (r) 192 if (r)
193 return r; 193 return r;
194 194
195 r = zd_iowrite16_locked(chip, 0x06, CR203); 195 r = zd_iowrite16_locked(chip, 0x06, ZD_CR203);
196 if (r) 196 if (r)
197 return r; 197 return r;
198 r = zd_iowrite16_locked(chip, 0x80, CR240); 198 r = zd_iowrite16_locked(chip, 0x80, ZD_CR240);
199 if (r) 199 if (r)
200 return r; 200 return r;
201 201
@@ -208,79 +208,79 @@ static int zd1211b_al7230b_init_hw(struct zd_rf *rf)
208 struct zd_chip *chip = zd_rf_to_chip(rf); 208 struct zd_chip *chip = zd_rf_to_chip(rf);
209 209
210 static const struct zd_ioreq16 ioreqs_1[] = { 210 static const struct zd_ioreq16 ioreqs_1[] = {
211 { CR240, 0x57 }, { CR9, 0x9 }, 211 { ZD_CR240, 0x57 }, { ZD_CR9, 0x9 },
212 { }, 212 { },
213 { CR10, 0x8b }, { CR15, 0x20 }, 213 { ZD_CR10, 0x8b }, { ZD_CR15, 0x20 },
214 { CR17, 0x2B }, /* for newest (3rd cut) AL2230 */ 214 { ZD_CR17, 0x2B }, /* for newest (3rd cut) AL2230 */
215 { CR20, 0x10 }, /* 4N25->Stone Request */ 215 { ZD_CR20, 0x10 }, /* 4N25->Stone Request */
216 { CR23, 0x40 }, { CR24, 0x20 }, { CR26, 0x93 }, 216 { ZD_CR23, 0x40 }, { ZD_CR24, 0x20 }, { ZD_CR26, 0x93 },
217 { CR28, 0x3e }, { CR29, 0x00 }, 217 { ZD_CR28, 0x3e }, { ZD_CR29, 0x00 },
218 { CR33, 0x28 }, /* 5613 */ 218 { ZD_CR33, 0x28 }, /* 5613 */
219 { CR34, 0x30 }, 219 { ZD_CR34, 0x30 },
220 { CR35, 0x3e }, /* for newest (3rd cut) AL2230 */ 220 { ZD_CR35, 0x3e }, /* for newest (3rd cut) AL2230 */
221 { CR41, 0x24 }, { CR44, 0x32 }, 221 { ZD_CR41, 0x24 }, { ZD_CR44, 0x32 },
222 { CR46, 0x99 }, /* for newest (3rd cut) AL2230 */ 222 { ZD_CR46, 0x99 }, /* for newest (3rd cut) AL2230 */
223 { CR47, 0x1e }, 223 { ZD_CR47, 0x1e },
224 224
225 /* ZD1215 5610 */ 225 /* ZD1215 5610 */
226 { CR48, 0x00 }, { CR49, 0x00 }, { CR51, 0x01 }, 226 { ZD_CR48, 0x00 }, { ZD_CR49, 0x00 }, { ZD_CR51, 0x01 },
227 { CR52, 0x80 }, { CR53, 0x7e }, { CR65, 0x00 }, 227 { ZD_CR52, 0x80 }, { ZD_CR53, 0x7e }, { ZD_CR65, 0x00 },
228 { CR66, 0x00 }, { CR67, 0x00 }, { CR68, 0x00 }, 228 { ZD_CR66, 0x00 }, { ZD_CR67, 0x00 }, { ZD_CR68, 0x00 },
229 { CR69, 0x28 }, 229 { ZD_CR69, 0x28 },
230 230
231 { CR79, 0x58 }, { CR80, 0x30 }, { CR81, 0x30 }, 231 { ZD_CR79, 0x58 }, { ZD_CR80, 0x30 }, { ZD_CR81, 0x30 },
232 { CR87, 0x0A }, { CR89, 0x04 }, 232 { ZD_CR87, 0x0A }, { ZD_CR89, 0x04 },
233 { CR90, 0x58 }, /* 5112 */ 233 { ZD_CR90, 0x58 }, /* 5112 */
234 { CR91, 0x00 }, /* 5613 */ 234 { ZD_CR91, 0x00 }, /* 5613 */
235 { CR92, 0x0a }, 235 { ZD_CR92, 0x0a },
236 { CR98, 0x8d }, /* 4804, for 1212 new algorithm */ 236 { ZD_CR98, 0x8d }, /* 4804, for 1212 new algorithm */
237 { CR99, 0x00 }, { CR100, 0x02 }, { CR101, 0x13 }, 237 { ZD_CR99, 0x00 }, { ZD_CR100, 0x02 }, { ZD_CR101, 0x13 },
238 { CR102, 0x27 }, 238 { ZD_CR102, 0x27 },
239 { CR106, 0x20 }, /* change to 0x24 for AL7230B */ 239 { ZD_CR106, 0x20 }, /* change to 0x24 for AL7230B */
240 { CR109, 0x13 }, /* 4804, for 1212 new algorithm */ 240 { ZD_CR109, 0x13 }, /* 4804, for 1212 new algorithm */
241 { CR112, 0x1f }, 241 { ZD_CR112, 0x1f },
242 }; 242 };
243 243
244 static const struct zd_ioreq16 ioreqs_new_phy[] = { 244 static const struct zd_ioreq16 ioreqs_new_phy[] = {
245 { CR107, 0x28 }, 245 { ZD_CR107, 0x28 },
246 { CR110, 0x1f }, /* 5127, 0x13->0x1f */ 246 { ZD_CR110, 0x1f }, /* 5127, 0x13->0x1f */
247 { CR111, 0x1f }, /* 0x13 to 0x1f for AL7230B */ 247 { ZD_CR111, 0x1f }, /* 0x13 to 0x1f for AL7230B */
248 { CR116, 0x2a }, { CR118, 0xfa }, { CR119, 0x12 }, 248 { ZD_CR116, 0x2a }, { ZD_CR118, 0xfa }, { ZD_CR119, 0x12 },
249 { CR121, 0x6c }, /* 5613 */ 249 { ZD_CR121, 0x6c }, /* 5613 */
250 }; 250 };
251 251
252 static const struct zd_ioreq16 ioreqs_old_phy[] = { 252 static const struct zd_ioreq16 ioreqs_old_phy[] = {
253 { CR107, 0x24 }, 253 { ZD_CR107, 0x24 },
254 { CR110, 0x13 }, /* 5127, 0x13->0x1f */ 254 { ZD_CR110, 0x13 }, /* 5127, 0x13->0x1f */
255 { CR111, 0x13 }, /* 0x13 to 0x1f for AL7230B */ 255 { ZD_CR111, 0x13 }, /* 0x13 to 0x1f for AL7230B */
256 { CR116, 0x24 }, { CR118, 0xfc }, { CR119, 0x11 }, 256 { ZD_CR116, 0x24 }, { ZD_CR118, 0xfc }, { ZD_CR119, 0x11 },
257 { CR121, 0x6a }, /* 5613 */ 257 { ZD_CR121, 0x6a }, /* 5613 */
258 }; 258 };
259 259
260 static const struct zd_ioreq16 ioreqs_2[] = { 260 static const struct zd_ioreq16 ioreqs_2[] = {
261 { CR113, 0x27 }, { CR114, 0x27 }, { CR115, 0x24 }, 261 { ZD_CR113, 0x27 }, { ZD_CR114, 0x27 }, { ZD_CR115, 0x24 },
262 { CR117, 0xfa }, { CR120, 0x4f }, 262 { ZD_CR117, 0xfa }, { ZD_CR120, 0x4f },
263 { CR122, 0xfc }, /* E0->FCh at 4901 */ 263 { ZD_CR122, 0xfc }, /* E0->FCh at 4901 */
264 { CR123, 0x57 }, /* 5613 */ 264 { ZD_CR123, 0x57 }, /* 5613 */
265 { CR125, 0xad }, /* 4804, for 1212 new algorithm */ 265 { ZD_CR125, 0xad }, /* 4804, for 1212 new algorithm */
266 { CR126, 0x6c }, /* 5613 */ 266 { ZD_CR126, 0x6c }, /* 5613 */
267 { CR127, 0x03 }, /* 4804, for 1212 new algorithm */ 267 { ZD_CR127, 0x03 }, /* 4804, for 1212 new algorithm */
268 { CR130, 0x10 }, 268 { ZD_CR130, 0x10 },
269 { CR131, 0x00 }, /* 5112 */ 269 { ZD_CR131, 0x00 }, /* 5112 */
270 { CR137, 0x50 }, /* 5613 */ 270 { ZD_CR137, 0x50 }, /* 5613 */
271 { CR138, 0xa8 }, /* 5112 */ 271 { ZD_CR138, 0xa8 }, /* 5112 */
272 { CR144, 0xac }, /* 5613 */ 272 { ZD_CR144, 0xac }, /* 5613 */
273 { CR148, 0x40 }, /* 5112 */ 273 { ZD_CR148, 0x40 }, /* 5112 */
274 { CR149, 0x40 }, /* 4O07, 50->40 */ 274 { ZD_CR149, 0x40 }, /* 4O07, 50->40 */
275 { CR150, 0x1a }, /* 5112, 0C->1A */ 275 { ZD_CR150, 0x1a }, /* 5112, 0C->1A */
276 { CR252, 0x34 }, { CR253, 0x34 }, 276 { ZD_CR252, 0x34 }, { ZD_CR253, 0x34 },
277 { CR251, 0x2f }, /* PLL_OFF */ 277 { ZD_CR251, 0x2f }, /* PLL_OFF */
278 }; 278 };
279 279
280 static const struct zd_ioreq16 ioreqs_3[] = { 280 static const struct zd_ioreq16 ioreqs_3[] = {
281 { CR251, 0x7f }, /* PLL_ON */ 281 { ZD_CR251, 0x7f }, /* PLL_ON */
282 { CR128, 0x14 }, { CR129, 0x12 }, { CR130, 0x10 }, 282 { ZD_CR128, 0x14 }, { ZD_CR129, 0x12 }, { ZD_CR130, 0x10 },
283 { CR38, 0x38 }, { CR136, 0xdf }, 283 { ZD_CR38, 0x38 }, { ZD_CR136, 0xdf },
284 }; 284 };
285 285
286 r = zd_iowrite16a_locked(chip, ioreqs_1, ARRAY_SIZE(ioreqs_1)); 286 r = zd_iowrite16a_locked(chip, ioreqs_1, ARRAY_SIZE(ioreqs_1));
@@ -331,16 +331,16 @@ static int zd1211_al7230b_set_channel(struct zd_rf *rf, u8 channel)
331 331
332 static const struct zd_ioreq16 ioreqs[] = { 332 static const struct zd_ioreq16 ioreqs[] = {
333 /* PLL_ON */ 333 /* PLL_ON */
334 { CR251, 0x3f }, 334 { ZD_CR251, 0x3f },
335 { CR203, 0x06 }, { CR240, 0x08 }, 335 { ZD_CR203, 0x06 }, { ZD_CR240, 0x08 },
336 }; 336 };
337 337
338 r = zd_iowrite16_locked(chip, 0x57, CR240); 338 r = zd_iowrite16_locked(chip, 0x57, ZD_CR240);
339 if (r) 339 if (r)
340 return r; 340 return r;
341 341
342 /* PLL_OFF */ 342 /* PLL_OFF */
343 r = zd_iowrite16_locked(chip, 0x2f, CR251); 343 r = zd_iowrite16_locked(chip, 0x2f, ZD_CR251);
344 if (r) 344 if (r)
345 return r; 345 return r;
346 346
@@ -376,15 +376,15 @@ static int zd1211b_al7230b_set_channel(struct zd_rf *rf, u8 channel)
376 const u32 *rv = chan_rv[channel-1]; 376 const u32 *rv = chan_rv[channel-1];
377 struct zd_chip *chip = zd_rf_to_chip(rf); 377 struct zd_chip *chip = zd_rf_to_chip(rf);
378 378
379 r = zd_iowrite16_locked(chip, 0x57, CR240); 379 r = zd_iowrite16_locked(chip, 0x57, ZD_CR240);
380 if (r) 380 if (r)
381 return r; 381 return r;
382 r = zd_iowrite16_locked(chip, 0xe4, CR9); 382 r = zd_iowrite16_locked(chip, 0xe4, ZD_CR9);
383 if (r) 383 if (r)
384 return r; 384 return r;
385 385
386 /* PLL_OFF */ 386 /* PLL_OFF */
387 r = zd_iowrite16_locked(chip, 0x2f, CR251); 387 r = zd_iowrite16_locked(chip, 0x2f, ZD_CR251);
388 if (r) 388 if (r)
389 return r; 389 return r;
390 r = zd_rfwritev_cr_locked(chip, std_rv, ARRAY_SIZE(std_rv)); 390 r = zd_rfwritev_cr_locked(chip, std_rv, ARRAY_SIZE(std_rv));
@@ -410,7 +410,7 @@ static int zd1211b_al7230b_set_channel(struct zd_rf *rf, u8 channel)
410 if (r) 410 if (r)
411 return r; 411 return r;
412 412
413 r = zd_iowrite16_locked(chip, 0x7f, CR251); 413 r = zd_iowrite16_locked(chip, 0x7f, ZD_CR251);
414 if (r) 414 if (r)
415 return r; 415 return r;
416 416
@@ -421,8 +421,8 @@ static int zd1211_al7230b_switch_radio_on(struct zd_rf *rf)
421{ 421{
422 struct zd_chip *chip = zd_rf_to_chip(rf); 422 struct zd_chip *chip = zd_rf_to_chip(rf);
423 static const struct zd_ioreq16 ioreqs[] = { 423 static const struct zd_ioreq16 ioreqs[] = {
424 { CR11, 0x00 }, 424 { ZD_CR11, 0x00 },
425 { CR251, 0x3f }, 425 { ZD_CR251, 0x3f },
426 }; 426 };
427 427
428 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); 428 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
@@ -432,8 +432,8 @@ static int zd1211b_al7230b_switch_radio_on(struct zd_rf *rf)
432{ 432{
433 struct zd_chip *chip = zd_rf_to_chip(rf); 433 struct zd_chip *chip = zd_rf_to_chip(rf);
434 static const struct zd_ioreq16 ioreqs[] = { 434 static const struct zd_ioreq16 ioreqs[] = {
435 { CR11, 0x00 }, 435 { ZD_CR11, 0x00 },
436 { CR251, 0x7f }, 436 { ZD_CR251, 0x7f },
437 }; 437 };
438 438
439 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); 439 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
@@ -443,8 +443,8 @@ static int al7230b_switch_radio_off(struct zd_rf *rf)
443{ 443{
444 struct zd_chip *chip = zd_rf_to_chip(rf); 444 struct zd_chip *chip = zd_rf_to_chip(rf);
445 static const struct zd_ioreq16 ioreqs[] = { 445 static const struct zd_ioreq16 ioreqs[] = {
446 { CR11, 0x04 }, 446 { ZD_CR11, 0x04 },
447 { CR251, 0x2f }, 447 { ZD_CR251, 0x2f },
448 }; 448 };
449 449
450 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); 450 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
@@ -456,7 +456,7 @@ static int zd1211b_al7230b_patch_6m(struct zd_rf *rf, u8 channel)
456{ 456{
457 struct zd_chip *chip = zd_rf_to_chip(rf); 457 struct zd_chip *chip = zd_rf_to_chip(rf);
458 struct zd_ioreq16 ioreqs[] = { 458 struct zd_ioreq16 ioreqs[] = {
459 { CR128, 0x14 }, { CR129, 0x12 }, 459 { ZD_CR128, 0x14 }, { ZD_CR129, 0x12 },
460 }; 460 };
461 461
462 /* FIXME: Channel 11 is not the edge for all regulatory domains. */ 462 /* FIXME: Channel 11 is not the edge for all regulatory domains. */
diff --git a/drivers/net/wireless/zd1211rw/zd_rf_rf2959.c b/drivers/net/wireless/zd1211rw/zd_rf_rf2959.c
index 0597d862fbd2..032542614259 100644
--- a/drivers/net/wireless/zd1211rw/zd_rf_rf2959.c
+++ b/drivers/net/wireless/zd1211rw/zd_rf_rf2959.c
@@ -152,44 +152,44 @@ static int rf2959_init_hw(struct zd_rf *rf)
152 struct zd_chip *chip = zd_rf_to_chip(rf); 152 struct zd_chip *chip = zd_rf_to_chip(rf);
153 153
154 static const struct zd_ioreq16 ioreqs[] = { 154 static const struct zd_ioreq16 ioreqs[] = {
155 { CR2, 0x1E }, { CR9, 0x20 }, { CR10, 0x89 }, 155 { ZD_CR2, 0x1E }, { ZD_CR9, 0x20 }, { ZD_CR10, 0x89 },
156 { CR11, 0x00 }, { CR15, 0xD0 }, { CR17, 0x68 }, 156 { ZD_CR11, 0x00 }, { ZD_CR15, 0xD0 }, { ZD_CR17, 0x68 },
157 { CR19, 0x4a }, { CR20, 0x0c }, { CR21, 0x0E }, 157 { ZD_CR19, 0x4a }, { ZD_CR20, 0x0c }, { ZD_CR21, 0x0E },
158 { CR23, 0x48 }, 158 { ZD_CR23, 0x48 },
159 /* normal size for cca threshold */ 159 /* normal size for cca threshold */
160 { CR24, 0x14 }, 160 { ZD_CR24, 0x14 },
161 /* { CR24, 0x20 }, */ 161 /* { ZD_CR24, 0x20 }, */
162 { CR26, 0x90 }, { CR27, 0x30 }, { CR29, 0x20 }, 162 { ZD_CR26, 0x90 }, { ZD_CR27, 0x30 }, { ZD_CR29, 0x20 },
163 { CR31, 0xb2 }, { CR32, 0x43 }, { CR33, 0x28 }, 163 { ZD_CR31, 0xb2 }, { ZD_CR32, 0x43 }, { ZD_CR33, 0x28 },
164 { CR38, 0x30 }, { CR34, 0x0f }, { CR35, 0xF0 }, 164 { ZD_CR38, 0x30 }, { ZD_CR34, 0x0f }, { ZD_CR35, 0xF0 },
165 { CR41, 0x2a }, { CR46, 0x7F }, { CR47, 0x1E }, 165 { ZD_CR41, 0x2a }, { ZD_CR46, 0x7F }, { ZD_CR47, 0x1E },
166 { CR51, 0xc5 }, { CR52, 0xc5 }, { CR53, 0xc5 }, 166 { ZD_CR51, 0xc5 }, { ZD_CR52, 0xc5 }, { ZD_CR53, 0xc5 },
167 { CR79, 0x58 }, { CR80, 0x30 }, { CR81, 0x30 }, 167 { ZD_CR79, 0x58 }, { ZD_CR80, 0x30 }, { ZD_CR81, 0x30 },
168 { CR82, 0x00 }, { CR83, 0x24 }, { CR84, 0x04 }, 168 { ZD_CR82, 0x00 }, { ZD_CR83, 0x24 }, { ZD_CR84, 0x04 },
169 { CR85, 0x00 }, { CR86, 0x10 }, { CR87, 0x2A }, 169 { ZD_CR85, 0x00 }, { ZD_CR86, 0x10 }, { ZD_CR87, 0x2A },
170 { CR88, 0x10 }, { CR89, 0x24 }, { CR90, 0x18 }, 170 { ZD_CR88, 0x10 }, { ZD_CR89, 0x24 }, { ZD_CR90, 0x18 },
171 /* { CR91, 0x18 }, */ 171 /* { ZD_CR91, 0x18 }, */
172 /* should solve continous CTS frame problems */ 172 /* should solve continous CTS frame problems */
173 { CR91, 0x00 }, 173 { ZD_CR91, 0x00 },
174 { CR92, 0x0a }, { CR93, 0x00 }, { CR94, 0x01 }, 174 { ZD_CR92, 0x0a }, { ZD_CR93, 0x00 }, { ZD_CR94, 0x01 },
175 { CR95, 0x00 }, { CR96, 0x40 }, { CR97, 0x37 }, 175 { ZD_CR95, 0x00 }, { ZD_CR96, 0x40 }, { ZD_CR97, 0x37 },
176 { CR98, 0x05 }, { CR99, 0x28 }, { CR100, 0x00 }, 176 { ZD_CR98, 0x05 }, { ZD_CR99, 0x28 }, { ZD_CR100, 0x00 },
177 { CR101, 0x13 }, { CR102, 0x27 }, { CR103, 0x27 }, 177 { ZD_CR101, 0x13 }, { ZD_CR102, 0x27 }, { ZD_CR103, 0x27 },
178 { CR104, 0x18 }, { CR105, 0x12 }, 178 { ZD_CR104, 0x18 }, { ZD_CR105, 0x12 },
179 /* normal size */ 179 /* normal size */
180 { CR106, 0x1a }, 180 { ZD_CR106, 0x1a },
181 /* { CR106, 0x22 }, */ 181 /* { ZD_CR106, 0x22 }, */
182 { CR107, 0x24 }, { CR108, 0x0a }, { CR109, 0x13 }, 182 { ZD_CR107, 0x24 }, { ZD_CR108, 0x0a }, { ZD_CR109, 0x13 },
183 { CR110, 0x2F }, { CR111, 0x27 }, { CR112, 0x27 }, 183 { ZD_CR110, 0x2F }, { ZD_CR111, 0x27 }, { ZD_CR112, 0x27 },
184 { CR113, 0x27 }, { CR114, 0x27 }, { CR115, 0x40 }, 184 { ZD_CR113, 0x27 }, { ZD_CR114, 0x27 }, { ZD_CR115, 0x40 },
185 { CR116, 0x40 }, { CR117, 0xF0 }, { CR118, 0xF0 }, 185 { ZD_CR116, 0x40 }, { ZD_CR117, 0xF0 }, { ZD_CR118, 0xF0 },
186 { CR119, 0x16 }, 186 { ZD_CR119, 0x16 },
187 /* no TX continuation */ 187 /* no TX continuation */
188 { CR122, 0x00 }, 188 { ZD_CR122, 0x00 },
189 /* { CR122, 0xff }, */ 189 /* { ZD_CR122, 0xff }, */
190 { CR127, 0x03 }, { CR131, 0x08 }, { CR138, 0x28 }, 190 { ZD_CR127, 0x03 }, { ZD_CR131, 0x08 }, { ZD_CR138, 0x28 },
191 { CR148, 0x44 }, { CR150, 0x10 }, { CR169, 0xBB }, 191 { ZD_CR148, 0x44 }, { ZD_CR150, 0x10 }, { ZD_CR169, 0xBB },
192 { CR170, 0xBB }, 192 { ZD_CR170, 0xBB },
193 }; 193 };
194 194
195 static const u32 rv[] = { 195 static const u32 rv[] = {
@@ -210,7 +210,7 @@ static int rf2959_init_hw(struct zd_rf *rf)
210 */ 210 */
211 0x294128, /* internal power */ 211 0x294128, /* internal power */
212 /* 0x28252c, */ /* External control TX power */ 212 /* 0x28252c, */ /* External control TX power */
213 /* CR31_CCK, CR51_6-36M, CR52_48M, CR53_54M */ 213 /* ZD_CR31_CCK, ZD_CR51_6-36M, ZD_CR52_48M, ZD_CR53_54M */
214 0x2c0000, 214 0x2c0000,
215 0x300000, 215 0x300000,
216 0x340000, /* REG13(0xD) */ 216 0x340000, /* REG13(0xD) */
@@ -245,8 +245,8 @@ static int rf2959_set_channel(struct zd_rf *rf, u8 channel)
245static int rf2959_switch_radio_on(struct zd_rf *rf) 245static int rf2959_switch_radio_on(struct zd_rf *rf)
246{ 246{
247 static const struct zd_ioreq16 ioreqs[] = { 247 static const struct zd_ioreq16 ioreqs[] = {
248 { CR10, 0x89 }, 248 { ZD_CR10, 0x89 },
249 { CR11, 0x00 }, 249 { ZD_CR11, 0x00 },
250 }; 250 };
251 struct zd_chip *chip = zd_rf_to_chip(rf); 251 struct zd_chip *chip = zd_rf_to_chip(rf);
252 252
@@ -256,8 +256,8 @@ static int rf2959_switch_radio_on(struct zd_rf *rf)
256static int rf2959_switch_radio_off(struct zd_rf *rf) 256static int rf2959_switch_radio_off(struct zd_rf *rf)
257{ 257{
258 static const struct zd_ioreq16 ioreqs[] = { 258 static const struct zd_ioreq16 ioreqs[] = {
259 { CR10, 0x15 }, 259 { ZD_CR10, 0x15 },
260 { CR11, 0x81 }, 260 { ZD_CR11, 0x81 },
261 }; 261 };
262 struct zd_chip *chip = zd_rf_to_chip(rf); 262 struct zd_chip *chip = zd_rf_to_chip(rf);
263 263
diff --git a/drivers/net/wireless/zd1211rw/zd_rf_uw2453.c b/drivers/net/wireless/zd1211rw/zd_rf_uw2453.c
index 9e74eb1b67d5..860b0af7dc3e 100644
--- a/drivers/net/wireless/zd1211rw/zd_rf_uw2453.c
+++ b/drivers/net/wireless/zd1211rw/zd_rf_uw2453.c
@@ -314,42 +314,44 @@ static int uw2453_init_hw(struct zd_rf *rf)
314 struct zd_chip *chip = zd_rf_to_chip(rf); 314 struct zd_chip *chip = zd_rf_to_chip(rf);
315 315
316 static const struct zd_ioreq16 ioreqs[] = { 316 static const struct zd_ioreq16 ioreqs[] = {
317 { CR10, 0x89 }, { CR15, 0x20 }, 317 { ZD_CR10, 0x89 }, { ZD_CR15, 0x20 },
318 { CR17, 0x28 }, /* 6112 no change */ 318 { ZD_CR17, 0x28 }, /* 6112 no change */
319 { CR23, 0x38 }, { CR24, 0x20 }, { CR26, 0x93 }, 319 { ZD_CR23, 0x38 }, { ZD_CR24, 0x20 }, { ZD_CR26, 0x93 },
320 { CR27, 0x15 }, { CR28, 0x3e }, { CR29, 0x00 }, 320 { ZD_CR27, 0x15 }, { ZD_CR28, 0x3e }, { ZD_CR29, 0x00 },
321 { CR33, 0x28 }, { CR34, 0x30 }, 321 { ZD_CR33, 0x28 }, { ZD_CR34, 0x30 },
322 { CR35, 0x43 }, /* 6112 3e->43 */ 322 { ZD_CR35, 0x43 }, /* 6112 3e->43 */
323 { CR41, 0x24 }, { CR44, 0x32 }, 323 { ZD_CR41, 0x24 }, { ZD_CR44, 0x32 },
324 { CR46, 0x92 }, /* 6112 96->92 */ 324 { ZD_CR46, 0x92 }, /* 6112 96->92 */
325 { CR47, 0x1e }, 325 { ZD_CR47, 0x1e },
326 { CR48, 0x04 }, /* 5602 Roger */ 326 { ZD_CR48, 0x04 }, /* 5602 Roger */
327 { CR49, 0xfa }, { CR79, 0x58 }, { CR80, 0x30 }, 327 { ZD_CR49, 0xfa }, { ZD_CR79, 0x58 }, { ZD_CR80, 0x30 },
328 { CR81, 0x30 }, { CR87, 0x0a }, { CR89, 0x04 }, 328 { ZD_CR81, 0x30 }, { ZD_CR87, 0x0a }, { ZD_CR89, 0x04 },
329 { CR91, 0x00 }, { CR92, 0x0a }, { CR98, 0x8d }, 329 { ZD_CR91, 0x00 }, { ZD_CR92, 0x0a }, { ZD_CR98, 0x8d },
330 { CR99, 0x28 }, { CR100, 0x02 }, 330 { ZD_CR99, 0x28 }, { ZD_CR100, 0x02 },
331 { CR101, 0x09 }, /* 6112 13->1f 6220 1f->13 6407 13->9 */ 331 { ZD_CR101, 0x09 }, /* 6112 13->1f 6220 1f->13 6407 13->9 */
332 { CR102, 0x27 }, 332 { ZD_CR102, 0x27 },
333 { CR106, 0x1c }, /* 5d07 5112 1f->1c 6220 1c->1f 6221 1f->1c */ 333 { ZD_CR106, 0x1c }, /* 5d07 5112 1f->1c 6220 1c->1f
334 { CR107, 0x1c }, /* 6220 1c->1a 5221 1a->1c */ 334 * 6221 1f->1c
335 { CR109, 0x13 }, 335 */
336 { CR110, 0x1f }, /* 6112 13->1f 6221 1f->13 6407 13->0x09 */ 336 { ZD_CR107, 0x1c }, /* 6220 1c->1a 5221 1a->1c */
337 { CR111, 0x13 }, { CR112, 0x1f }, { CR113, 0x27 }, 337 { ZD_CR109, 0x13 },
338 { CR114, 0x23 }, /* 6221 27->23 */ 338 { ZD_CR110, 0x1f }, /* 6112 13->1f 6221 1f->13 6407 13->0x09 */
339 { CR115, 0x24 }, /* 6112 24->1c 6220 1c->24 */ 339 { ZD_CR111, 0x13 }, { ZD_CR112, 0x1f }, { ZD_CR113, 0x27 },
340 { CR116, 0x24 }, /* 6220 1c->24 */ 340 { ZD_CR114, 0x23 }, /* 6221 27->23 */
341 { CR117, 0xfa }, /* 6112 fa->f8 6220 f8->f4 6220 f4->fa */ 341 { ZD_CR115, 0x24 }, /* 6112 24->1c 6220 1c->24 */
342 { CR118, 0xf0 }, /* 5d07 6112 f0->f2 6220 f2->f0 */ 342 { ZD_CR116, 0x24 }, /* 6220 1c->24 */
343 { CR119, 0x1a }, /* 6112 1a->10 6220 10->14 6220 14->1a */ 343 { ZD_CR117, 0xfa }, /* 6112 fa->f8 6220 f8->f4 6220 f4->fa */
344 { CR120, 0x4f }, 344 { ZD_CR118, 0xf0 }, /* 5d07 6112 f0->f2 6220 f2->f0 */
345 { CR121, 0x1f }, /* 6220 4f->1f */ 345 { ZD_CR119, 0x1a }, /* 6112 1a->10 6220 10->14 6220 14->1a */
346 { CR122, 0xf0 }, { CR123, 0x57 }, { CR125, 0xad }, 346 { ZD_CR120, 0x4f },
347 { CR126, 0x6c }, { CR127, 0x03 }, 347 { ZD_CR121, 0x1f }, /* 6220 4f->1f */
348 { CR128, 0x14 }, /* 6302 12->11 */ 348 { ZD_CR122, 0xf0 }, { ZD_CR123, 0x57 }, { ZD_CR125, 0xad },
349 { CR129, 0x12 }, /* 6301 10->0f */ 349 { ZD_CR126, 0x6c }, { ZD_CR127, 0x03 },
350 { CR130, 0x10 }, { CR137, 0x50 }, { CR138, 0xa8 }, 350 { ZD_CR128, 0x14 }, /* 6302 12->11 */
351 { CR144, 0xac }, { CR146, 0x20 }, { CR252, 0xff }, 351 { ZD_CR129, 0x12 }, /* 6301 10->0f */
352 { CR253, 0xff }, 352 { ZD_CR130, 0x10 }, { ZD_CR137, 0x50 }, { ZD_CR138, 0xa8 },
353 { ZD_CR144, 0xac }, { ZD_CR146, 0x20 }, { ZD_CR252, 0xff },
354 { ZD_CR253, 0xff },
353 }; 355 };
354 356
355 static const u32 rv[] = { 357 static const u32 rv[] = {
@@ -433,7 +435,7 @@ static int uw2453_init_hw(struct zd_rf *rf)
433 * the one that produced a lock. */ 435 * the one that produced a lock. */
434 UW2453_PRIV(rf)->config = found_config + 1; 436 UW2453_PRIV(rf)->config = found_config + 1;
435 437
436 return zd_iowrite16_locked(chip, 0x06, CR203); 438 return zd_iowrite16_locked(chip, 0x06, ZD_CR203);
437} 439}
438 440
439static int uw2453_set_channel(struct zd_rf *rf, u8 channel) 441static int uw2453_set_channel(struct zd_rf *rf, u8 channel)
@@ -445,8 +447,8 @@ static int uw2453_set_channel(struct zd_rf *rf, u8 channel)
445 struct zd_chip *chip = zd_rf_to_chip(rf); 447 struct zd_chip *chip = zd_rf_to_chip(rf);
446 448
447 static const struct zd_ioreq16 ioreqs[] = { 449 static const struct zd_ioreq16 ioreqs[] = {
448 { CR80, 0x30 }, { CR81, 0x30 }, { CR79, 0x58 }, 450 { ZD_CR80, 0x30 }, { ZD_CR81, 0x30 }, { ZD_CR79, 0x58 },
449 { CR12, 0xf0 }, { CR77, 0x1b }, { CR78, 0x58 }, 451 { ZD_CR12, 0xf0 }, { ZD_CR77, 0x1b }, { ZD_CR78, 0x58 },
450 }; 452 };
451 453
452 r = uw2453_synth_set_channel(chip, channel, autocal); 454 r = uw2453_synth_set_channel(chip, channel, autocal);
@@ -474,7 +476,7 @@ static int uw2453_set_channel(struct zd_rf *rf, u8 channel)
474 if (r) 476 if (r)
475 return r; 477 return r;
476 478
477 return zd_iowrite16_locked(chip, 0x06, CR203); 479 return zd_iowrite16_locked(chip, 0x06, ZD_CR203);
478} 480}
479 481
480static int uw2453_switch_radio_on(struct zd_rf *rf) 482static int uw2453_switch_radio_on(struct zd_rf *rf)
@@ -482,7 +484,7 @@ static int uw2453_switch_radio_on(struct zd_rf *rf)
482 int r; 484 int r;
483 struct zd_chip *chip = zd_rf_to_chip(rf); 485 struct zd_chip *chip = zd_rf_to_chip(rf);
484 struct zd_ioreq16 ioreqs[] = { 486 struct zd_ioreq16 ioreqs[] = {
485 { CR11, 0x00 }, { CR251, 0x3f }, 487 { ZD_CR11, 0x00 }, { ZD_CR251, 0x3f },
486 }; 488 };
487 489
488 /* enter RXTX mode */ 490 /* enter RXTX mode */
@@ -501,7 +503,7 @@ static int uw2453_switch_radio_off(struct zd_rf *rf)
501 int r; 503 int r;
502 struct zd_chip *chip = zd_rf_to_chip(rf); 504 struct zd_chip *chip = zd_rf_to_chip(rf);
503 static const struct zd_ioreq16 ioreqs[] = { 505 static const struct zd_ioreq16 ioreqs[] = {
504 { CR11, 0x04 }, { CR251, 0x2f }, 506 { ZD_CR11, 0x04 }, { ZD_CR251, 0x2f },
505 }; 507 };
506 508
507 /* enter IDLE mode */ 509 /* enter IDLE mode */
diff --git a/drivers/net/wireless/zd1211rw/zd_usb.c b/drivers/net/wireless/zd1211rw/zd_usb.c
index 58236e6d0921..c9c1362e9499 100644
--- a/drivers/net/wireless/zd1211rw/zd_usb.c
+++ b/drivers/net/wireless/zd1211rw/zd_usb.c
@@ -1877,10 +1877,10 @@ int zd_usb_rfwrite(struct zd_usb *usb, u32 value, u8 bits)
1877 1877
1878 dev_dbg_f(zd_usb_dev(usb), "value %#09x bits %d\n", value, bits); 1878 dev_dbg_f(zd_usb_dev(usb), "value %#09x bits %d\n", value, bits);
1879 1879
1880 r = zd_usb_ioread16(usb, &bit_value_template, CR203); 1880 r = zd_usb_ioread16(usb, &bit_value_template, ZD_CR203);
1881 if (r) { 1881 if (r) {
1882 dev_dbg_f(zd_usb_dev(usb), 1882 dev_dbg_f(zd_usb_dev(usb),
1883 "error %d: Couldn't read CR203\n", r); 1883 "error %d: Couldn't read ZD_CR203\n", r);
1884 return r; 1884 return r;
1885 } 1885 }
1886 bit_value_template &= ~(RF_IF_LE|RF_CLK|RF_DATA); 1886 bit_value_template &= ~(RF_IF_LE|RF_CLK|RF_DATA);
diff --git a/drivers/net/wireless/zd1211rw/zd_usb.h b/drivers/net/wireless/zd1211rw/zd_usb.h
index b3df2c8116cc..3924258ce177 100644
--- a/drivers/net/wireless/zd1211rw/zd_usb.h
+++ b/drivers/net/wireless/zd1211rw/zd_usb.h
@@ -109,7 +109,7 @@ struct usb_req_rfwrite {
109 __le16 bits; 109 __le16 bits;
110 /* RF2595: 24 */ 110 /* RF2595: 24 */
111 __le16 bit_values[0]; 111 __le16 bit_values[0];
112 /* (CR203 & ~(RF_IF_LE | RF_CLK | RF_DATA)) | (bit ? RF_DATA : 0) */ 112 /* (ZD_CR203 & ~(RF_IF_LE | RF_CLK | RF_DATA)) | (bit ? RF_DATA : 0) */
113} __packed; 113} __packed;
114 114
115/* USB interrupt */ 115/* USB interrupt */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-11 05:21:45 -0500