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authorDaniel Drake <dsd@gentoo.org>2006-08-12 12:59:42 -0400
committerJohn W. Linville <linville@tuxdriver.com>2006-08-14 15:43:21 -0400
commit20fe2176e5edbeb5957f113df1282a917ef87b5d (patch)
treebf1b07ba5bc22060f42e37209d41bc51183b72f4 /drivers/net/wireless/zd1211rw/zd_rf_al2230.c
parent98227a90a727029613f23c5e53554f1f4d7a1c89 (diff)
[PATCH] zd1211rw: AL2230 ZD1211B vendor sync
This patch synchronizes our code to some recent vendor driver modifications. A new PHY layout is supported, some values are tweaked, and the AL2230 is now programmed over a new interface which is many times faster. Signed-off-by: Daniel Drake <dsd@gentoo.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/zd1211rw/zd_rf_al2230.c')
-rw-r--r--drivers/net/wireless/zd1211rw/zd_rf_al2230.c155
1 files changed, 110 insertions, 45 deletions
diff --git a/drivers/net/wireless/zd1211rw/zd_rf_al2230.c b/drivers/net/wireless/zd1211rw/zd_rf_al2230.c
index 0948b25f660d..25323a13a3db 100644
--- a/drivers/net/wireless/zd1211rw/zd_rf_al2230.c
+++ b/drivers/net/wireless/zd1211rw/zd_rf_al2230.c
@@ -21,7 +21,7 @@
21#include "zd_usb.h" 21#include "zd_usb.h"
22#include "zd_chip.h" 22#include "zd_chip.h"
23 23
24static const u32 al2230_table[][3] = { 24static const u32 zd1211_al2230_table[][3] = {
25 RF_CHANNEL( 1) = { 0x03f790, 0x033331, 0x00000d, }, 25 RF_CHANNEL( 1) = { 0x03f790, 0x033331, 0x00000d, },
26 RF_CHANNEL( 2) = { 0x03f790, 0x0b3331, 0x00000d, }, 26 RF_CHANNEL( 2) = { 0x03f790, 0x0b3331, 0x00000d, },
27 RF_CHANNEL( 3) = { 0x03e790, 0x033331, 0x00000d, }, 27 RF_CHANNEL( 3) = { 0x03e790, 0x033331, 0x00000d, },
@@ -38,6 +38,53 @@ static const u32 al2230_table[][3] = {
38 RF_CHANNEL(14) = { 0x03e7c0, 0x066661, 0x00000d, }, 38 RF_CHANNEL(14) = { 0x03e7c0, 0x066661, 0x00000d, },
39}; 39};
40 40
41static const u32 zd1211b_al2230_table[][3] = {
42 RF_CHANNEL( 1) = { 0x09efc0, 0x8cccc0, 0xb00000, },
43 RF_CHANNEL( 2) = { 0x09efc0, 0x8cccd0, 0xb00000, },
44 RF_CHANNEL( 3) = { 0x09e7c0, 0x8cccc0, 0xb00000, },
45 RF_CHANNEL( 4) = { 0x09e7c0, 0x8cccd0, 0xb00000, },
46 RF_CHANNEL( 5) = { 0x05efc0, 0x8cccc0, 0xb00000, },
47 RF_CHANNEL( 6) = { 0x05efc0, 0x8cccd0, 0xb00000, },
48 RF_CHANNEL( 7) = { 0x05e7c0, 0x8cccc0, 0xb00000, },
49 RF_CHANNEL( 8) = { 0x05e7c0, 0x8cccd0, 0xb00000, },
50 RF_CHANNEL( 9) = { 0x0defc0, 0x8cccc0, 0xb00000, },
51 RF_CHANNEL(10) = { 0x0defc0, 0x8cccd0, 0xb00000, },
52 RF_CHANNEL(11) = { 0x0de7c0, 0x8cccc0, 0xb00000, },
53 RF_CHANNEL(12) = { 0x0de7c0, 0x8cccd0, 0xb00000, },
54 RF_CHANNEL(13) = { 0x03efc0, 0x8cccc0, 0xb00000, },
55 RF_CHANNEL(14) = { 0x03e7c0, 0x866660, 0xb00000, },
56};
57
58static const struct zd_ioreq16 zd1211b_ioreqs_shared_1[] = {
59 { CR240, 0x57 }, { CR9, 0xe0 },
60};
61
62static int zd1211b_al2230_finalize_rf(struct zd_chip *chip)
63{
64 int r;
65 static const struct zd_ioreq16 ioreqs[] = {
66 { CR80, 0x30 }, { CR81, 0x30 }, { CR79, 0x58 },
67 { CR12, 0xf0 }, { CR77, 0x1b }, { CR78, 0x58 },
68 { CR203, 0x06 },
69 { },
70
71 { CR240, 0x80 },
72 };
73
74 r = zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
75 if (r)
76 return r;
77
78 /* related to antenna selection? */
79 if (chip->new_phy_layout) {
80 r = zd_iowrite16_locked(chip, 0xe1, CR9);
81 if (r)
82 return r;
83 }
84
85 return zd_iowrite16_locked(chip, 0x06, CR203);
86}
87
41static int zd1211_al2230_init_hw(struct zd_rf *rf) 88static int zd1211_al2230_init_hw(struct zd_rf *rf)
42{ 89{
43 int r; 90 int r;
@@ -139,7 +186,7 @@ static int zd1211b_al2230_init_hw(struct zd_rf *rf)
139 { CR47, 0x1e }, 186 { CR47, 0x1e },
140 187
141 /* ZD1211B 05.06.10 */ 188 /* ZD1211B 05.06.10 */
142 { CR48, 0x00 }, { CR49, 0x00 }, { CR51, 0x01 }, 189 { CR48, 0x06 }, { CR49, 0xf9 }, { CR51, 0x01 },
143 { CR52, 0x80 }, { CR53, 0x7e }, { CR65, 0x00 }, 190 { CR52, 0x80 }, { CR53, 0x7e }, { CR65, 0x00 },
144 { CR66, 0x00 }, { CR67, 0x00 }, { CR68, 0x00 }, 191 { CR66, 0x00 }, { CR67, 0x00 }, { CR68, 0x00 },
145 { CR69, 0x28 }, 192 { CR69, 0x28 },
@@ -172,79 +219,78 @@ static int zd1211b_al2230_init_hw(struct zd_rf *rf)
172 { CR137, 0x50 }, /* 5614 */ 219 { CR137, 0x50 }, /* 5614 */
173 { CR138, 0xa8 }, 220 { CR138, 0xa8 },
174 { CR144, 0xac }, /* 5621 */ 221 { CR144, 0xac }, /* 5621 */
175 { CR150, 0x0d }, { CR252, 0x00 }, { CR253, 0x00 }, 222 { CR150, 0x0d }, { CR252, 0x34 }, { CR253, 0x34 },
176 }; 223 };
177 224
178 static const u32 rv1[] = { 225 static const u32 rv1[] = {
179 /* channel 1 */ 226 0x8cccd0,
180 0x03f790, 227 0x481dc0,
181 0x033331, 228 0xcfff00,
182 0x00000d, 229 0x25a000,
183 230
184 0x0b3331, 231 /* To improve AL2230 yield, improve phase noise, 4713 */
185 0x03b812, 232 0x25a000,
186 0x00fff3, 233 0xa3b2f0,
187 0x0005a4, 234
188 0x0f4dc5, /* fix freq shift 0x044dc5 */ 235 0x6da010, /* Reg6 update for MP versio */
189 0x0805b6, 236 0xe36280, /* Modified by jxiao for Bor-Chin on 2004/08/02 */
190 0x0146c7, 237 0x116000,
191 0x000688, 238 0x9dc020, /* External control TX power (CR31) */
192 0x0403b9, /* External control TX power (CR31) */ 239 0x5ddb00, /* RegA update for MP version */
193 0x00dbba, 240 0xd99000, /* RegB update for MP version */
194 0x00099b, 241 0x3ffbd0, /* RegC update for MP version */
195 0x0bdffc, 242 0xb00000, /* RegD update for MP version */
196 0x00000d, 243
197 0x00580f, 244 /* improve phase noise and remove phase calibration,4713 */
245 0xf01a00,
198 }; 246 };
199 247
200 static const struct zd_ioreq16 ioreqs2[] = { 248 static const struct zd_ioreq16 ioreqs2[] = {
201 { CR47, 0x1e }, { CR_RFCFG, 0x03 }, 249 { CR251, 0x2f }, /* shdnb(PLL_ON)=0 */
250 { CR251, 0x7f }, /* shdnb(PLL_ON)=1 */
202 }; 251 };
203 252
204 static const u32 rv2[] = { 253 static const u32 rv2[] = {
205 0x00880f, 254 /* To improve AL2230 yield, 4713 */
206 0x00080f, 255 0xf01b00,
256 0xf01e00,
257 0xf01a00,
207 }; 258 };
208 259
209 static const struct zd_ioreq16 ioreqs3[] = { 260 static const struct zd_ioreq16 ioreqs3[] = {
210 { CR_RFCFG, 0x00 }, { CR47, 0x1e }, { CR251, 0x7f }, 261 /* related to 6M band edge patching, happens unconditionally */
211 }; 262 { CR128, 0x14 }, { CR129, 0x12 }, { CR130, 0x10 },
212
213 static const u32 rv3[] = {
214 0x00d80f,
215 0x00780f,
216 0x00580f,
217 };
218
219 static const struct zd_ioreq16 ioreqs4[] = {
220 { CR138, 0x28 }, { CR203, 0x06 },
221 }; 263 };
222 264
265 r = zd_iowrite16a_locked(chip, zd1211b_ioreqs_shared_1,
266 ARRAY_SIZE(zd1211b_ioreqs_shared_1));
267 if (r)
268 return r;
223 r = zd_iowrite16a_locked(chip, ioreqs1, ARRAY_SIZE(ioreqs1)); 269 r = zd_iowrite16a_locked(chip, ioreqs1, ARRAY_SIZE(ioreqs1));
224 if (r) 270 if (r)
225 return r; 271 return r;
226 r = zd_rfwritev_locked(chip, rv1, ARRAY_SIZE(rv1), RF_RV_BITS); 272 r = zd_rfwritev_cr_locked(chip, zd1211b_al2230_table[0], 3);
227 if (r) 273 if (r)
228 return r; 274 return r;
229 r = zd_iowrite16a_locked(chip, ioreqs2, ARRAY_SIZE(ioreqs2)); 275 r = zd_rfwritev_cr_locked(chip, rv1, ARRAY_SIZE(rv1));
230 if (r) 276 if (r)
231 return r; 277 return r;
232 r = zd_rfwritev_locked(chip, rv2, ARRAY_SIZE(rv2), RF_RV_BITS); 278 r = zd_iowrite16a_locked(chip, ioreqs2, ARRAY_SIZE(ioreqs2));
233 if (r) 279 if (r)
234 return r; 280 return r;
235 r = zd_iowrite16a_locked(chip, ioreqs3, ARRAY_SIZE(ioreqs3)); 281 r = zd_rfwritev_cr_locked(chip, rv2, ARRAY_SIZE(rv2));
236 if (r) 282 if (r)
237 return r; 283 return r;
238 r = zd_rfwritev_locked(chip, rv3, ARRAY_SIZE(rv3), RF_RV_BITS); 284 r = zd_iowrite16a_locked(chip, ioreqs3, ARRAY_SIZE(ioreqs3));
239 if (r) 285 if (r)
240 return r; 286 return r;
241 return zd_iowrite16a_locked(chip, ioreqs4, ARRAY_SIZE(ioreqs4)); 287 return zd1211b_al2230_finalize_rf(chip);
242} 288}
243 289
244static int al2230_set_channel(struct zd_rf *rf, u8 channel) 290static int zd1211_al2230_set_channel(struct zd_rf *rf, u8 channel)
245{ 291{
246 int r; 292 int r;
247 const u32 *rv = al2230_table[channel-1]; 293 const u32 *rv = zd1211_al2230_table[channel-1];
248 struct zd_chip *chip = zd_rf_to_chip(rf); 294 struct zd_chip *chip = zd_rf_to_chip(rf);
249 static const struct zd_ioreq16 ioreqs[] = { 295 static const struct zd_ioreq16 ioreqs[] = {
250 { CR138, 0x28 }, 296 { CR138, 0x28 },
@@ -257,6 +303,24 @@ static int al2230_set_channel(struct zd_rf *rf, u8 channel)
257 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); 303 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
258} 304}
259 305
306static int zd1211b_al2230_set_channel(struct zd_rf *rf, u8 channel)
307{
308 int r;
309 const u32 *rv = zd1211b_al2230_table[channel-1];
310 struct zd_chip *chip = zd_rf_to_chip(rf);
311
312 r = zd_iowrite16a_locked(chip, zd1211b_ioreqs_shared_1,
313 ARRAY_SIZE(zd1211b_ioreqs_shared_1));
314 if (r)
315 return r;
316
317 r = zd_rfwritev_cr_locked(chip, rv, 3);
318 if (r)
319 return r;
320
321 return zd1211b_al2230_finalize_rf(chip);
322}
323
260static int zd1211_al2230_switch_radio_on(struct zd_rf *rf) 324static int zd1211_al2230_switch_radio_on(struct zd_rf *rf)
261{ 325{
262 struct zd_chip *chip = zd_rf_to_chip(rf); 326 struct zd_chip *chip = zd_rf_to_chip(rf);
@@ -294,13 +358,14 @@ int zd_rf_init_al2230(struct zd_rf *rf)
294{ 358{
295 struct zd_chip *chip = zd_rf_to_chip(rf); 359 struct zd_chip *chip = zd_rf_to_chip(rf);
296 360
297 rf->set_channel = al2230_set_channel;
298 rf->switch_radio_off = al2230_switch_radio_off; 361 rf->switch_radio_off = al2230_switch_radio_off;
299 if (chip->is_zd1211b) { 362 if (chip->is_zd1211b) {
300 rf->init_hw = zd1211b_al2230_init_hw; 363 rf->init_hw = zd1211b_al2230_init_hw;
364 rf->set_channel = zd1211b_al2230_set_channel;
301 rf->switch_radio_on = zd1211b_al2230_switch_radio_on; 365 rf->switch_radio_on = zd1211b_al2230_switch_radio_on;
302 } else { 366 } else {
303 rf->init_hw = zd1211_al2230_init_hw; 367 rf->init_hw = zd1211_al2230_init_hw;
368 rf->set_channel = zd1211_al2230_set_channel;
304 rf->switch_radio_on = zd1211_al2230_switch_radio_on; 369 rf->switch_radio_on = zd1211_al2230_switch_radio_on;
305 } 370 }
306 rf->patch_6m_band_edge = 1; 371 rf->patch_6m_band_edge = 1;