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authorDaniel Drake <dsd@gentoo.org>2007-11-19 10:00:29 -0500
committerDavid S. Miller <davem@davemloft.net>2008-01-28 18:04:47 -0500
commit459c51ad6e1fc19e91a53798358433d3c08cd09d (patch)
treefb86feacf1b229cb4ab6b36b4d1deaf4983b1e45 /drivers/net/wireless/zd1211rw/zd_chip.h
parent0765af4493193149505f118d04d9300f0a15c8f5 (diff)
zd1211rw: port to mac80211
This seems to be working smoothly now. Let's not hold back the mac80211 transition any further. This patch ports the existing driver from softmac to mac80211. Many thanks to everyone who helped out with the porting efforts. Signed-off-by: Daniel Drake <dsd@gentoo.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/zd1211rw/zd_chip.h')
-rw-r--r--drivers/net/wireless/zd1211rw/zd_chip.h55
1 files changed, 33 insertions, 22 deletions
diff --git a/drivers/net/wireless/zd1211rw/zd_chip.h b/drivers/net/wireless/zd1211rw/zd_chip.h
index 8009b70213e2..a88a56932239 100644
--- a/drivers/net/wireless/zd1211rw/zd_chip.h
+++ b/drivers/net/wireless/zd1211rw/zd_chip.h
@@ -433,9 +433,10 @@ enum {
433#define CR_GROUP_HASH_P2 CTL_REG(0x0628) 433#define CR_GROUP_HASH_P2 CTL_REG(0x0628)
434 434
435#define CR_RX_TIMEOUT CTL_REG(0x062C) 435#define CR_RX_TIMEOUT CTL_REG(0x062C)
436
436/* Basic rates supported by the BSS. When producing ACK or CTS messages, the 437/* Basic rates supported by the BSS. When producing ACK or CTS messages, the
437 * device will use a rate in this table that is less than or equal to the rate 438 * device will use a rate in this table that is less than or equal to the rate
438 * of the incoming frame which prompted the response */ 439 * of the incoming frame which prompted the response. */
439#define CR_BASIC_RATE_TBL CTL_REG(0x0630) 440#define CR_BASIC_RATE_TBL CTL_REG(0x0630)
440#define CR_RATE_1M (1 << 0) /* 802.11b */ 441#define CR_RATE_1M (1 << 0) /* 802.11b */
441#define CR_RATE_2M (1 << 1) /* 802.11b */ 442#define CR_RATE_2M (1 << 1) /* 802.11b */
@@ -509,14 +510,37 @@ enum {
509#define CR_UNDERRUN_CNT CTL_REG(0x0688) 510#define CR_UNDERRUN_CNT CTL_REG(0x0688)
510 511
511#define CR_RX_FILTER CTL_REG(0x068c) 512#define CR_RX_FILTER CTL_REG(0x068c)
513#define RX_FILTER_ASSOC_REQUEST (1 << 0)
512#define RX_FILTER_ASSOC_RESPONSE (1 << 1) 514#define RX_FILTER_ASSOC_RESPONSE (1 << 1)
515#define RX_FILTER_REASSOC_REQUEST (1 << 2)
513#define RX_FILTER_REASSOC_RESPONSE (1 << 3) 516#define RX_FILTER_REASSOC_RESPONSE (1 << 3)
517#define RX_FILTER_PROBE_REQUEST (1 << 4)
514#define RX_FILTER_PROBE_RESPONSE (1 << 5) 518#define RX_FILTER_PROBE_RESPONSE (1 << 5)
519/* bits 6 and 7 reserved */
515#define RX_FILTER_BEACON (1 << 8) 520#define RX_FILTER_BEACON (1 << 8)
521#define RX_FILTER_ATIM (1 << 9)
516#define RX_FILTER_DISASSOC (1 << 10) 522#define RX_FILTER_DISASSOC (1 << 10)
517#define RX_FILTER_AUTH (1 << 11) 523#define RX_FILTER_AUTH (1 << 11)
518#define AP_RX_FILTER 0x0400feff 524#define RX_FILTER_DEAUTH (1 << 12)
519#define STA_RX_FILTER 0x0000ffff 525#define RX_FILTER_PSPOLL (1 << 26)
526#define RX_FILTER_RTS (1 << 27)
527#define RX_FILTER_CTS (1 << 28)
528#define RX_FILTER_ACK (1 << 29)
529#define RX_FILTER_CFEND (1 << 30)
530#define RX_FILTER_CFACK (1 << 31)
531
532/* Enable bits for all frames you are interested in. */
533#define STA_RX_FILTER (RX_FILTER_ASSOC_REQUEST | RX_FILTER_ASSOC_RESPONSE | \
534 RX_FILTER_REASSOC_REQUEST | RX_FILTER_REASSOC_RESPONSE | \
535 RX_FILTER_PROBE_REQUEST | RX_FILTER_PROBE_RESPONSE | \
536 (0x3 << 6) /* vendor driver sets these reserved bits */ | \
537 RX_FILTER_BEACON | RX_FILTER_ATIM | RX_FILTER_DISASSOC | \
538 RX_FILTER_AUTH | RX_FILTER_DEAUTH | \
539 (0x7 << 13) /* vendor driver sets these reserved bits */ | \
540 RX_FILTER_PSPOLL | RX_FILTER_ACK) /* 0x2400ffff */
541
542#define RX_FILTER_CTRL (RX_FILTER_RTS | RX_FILTER_CTS | \
543 RX_FILTER_CFEND | RX_FILTER_CFACK)
520 544
521/* Monitor mode sets filter to 0xfffff */ 545/* Monitor mode sets filter to 0xfffff */
522 546
@@ -730,7 +754,7 @@ static inline struct zd_chip *zd_rf_to_chip(struct zd_rf *rf)
730#define zd_chip_dev(chip) (&(chip)->usb.intf->dev) 754#define zd_chip_dev(chip) (&(chip)->usb.intf->dev)
731 755
732void zd_chip_init(struct zd_chip *chip, 756void zd_chip_init(struct zd_chip *chip,
733 struct net_device *netdev, 757 struct ieee80211_hw *hw,
734 struct usb_interface *intf); 758 struct usb_interface *intf);
735void zd_chip_clear(struct zd_chip *chip); 759void zd_chip_clear(struct zd_chip *chip);
736int zd_chip_read_mac_addr_fw(struct zd_chip *chip, u8 *addr); 760int zd_chip_read_mac_addr_fw(struct zd_chip *chip, u8 *addr);
@@ -835,14 +859,12 @@ int zd_chip_switch_radio_on(struct zd_chip *chip);
835int zd_chip_switch_radio_off(struct zd_chip *chip); 859int zd_chip_switch_radio_off(struct zd_chip *chip);
836int zd_chip_enable_int(struct zd_chip *chip); 860int zd_chip_enable_int(struct zd_chip *chip);
837void zd_chip_disable_int(struct zd_chip *chip); 861void zd_chip_disable_int(struct zd_chip *chip);
838int zd_chip_enable_rx(struct zd_chip *chip); 862int zd_chip_enable_rxtx(struct zd_chip *chip);
839void zd_chip_disable_rx(struct zd_chip *chip); 863void zd_chip_disable_rxtx(struct zd_chip *chip);
840int zd_chip_enable_hwint(struct zd_chip *chip); 864int zd_chip_enable_hwint(struct zd_chip *chip);
841int zd_chip_disable_hwint(struct zd_chip *chip); 865int zd_chip_disable_hwint(struct zd_chip *chip);
842int zd_chip_generic_patch_6m_band(struct zd_chip *chip, int channel); 866int zd_chip_generic_patch_6m_band(struct zd_chip *chip, int channel);
843 867int zd_chip_set_rts_cts_rate_locked(struct zd_chip *chip, int preamble);
844int zd_chip_set_rts_cts_rate_locked(struct zd_chip *chip,
845 u8 rts_rate, int preamble);
846 868
847static inline int zd_get_encryption_type(struct zd_chip *chip, u32 *type) 869static inline int zd_get_encryption_type(struct zd_chip *chip, u32 *type)
848{ 870{
@@ -859,17 +881,7 @@ static inline int zd_chip_get_basic_rates(struct zd_chip *chip, u16 *cr_rates)
859 return zd_ioread16(chip, CR_BASIC_RATE_TBL, cr_rates); 881 return zd_ioread16(chip, CR_BASIC_RATE_TBL, cr_rates);
860} 882}
861 883
862int zd_chip_set_basic_rates_locked(struct zd_chip *chip, u16 cr_rates); 884int zd_chip_set_basic_rates(struct zd_chip *chip, u16 cr_rates);
863
864static inline int zd_chip_set_basic_rates(struct zd_chip *chip, u16 cr_rates)
865{
866 int r;
867
868 mutex_lock(&chip->mutex);
869 r = zd_chip_set_basic_rates_locked(chip, cr_rates);
870 mutex_unlock(&chip->mutex);
871 return r;
872}
873 885
874int zd_chip_lock_phy_regs(struct zd_chip *chip); 886int zd_chip_lock_phy_regs(struct zd_chip *chip);
875int zd_chip_unlock_phy_regs(struct zd_chip *chip); 887int zd_chip_unlock_phy_regs(struct zd_chip *chip);
@@ -893,9 +905,8 @@ struct rx_status;
893 905
894u8 zd_rx_qual_percent(const void *rx_frame, unsigned int size, 906u8 zd_rx_qual_percent(const void *rx_frame, unsigned int size,
895 const struct rx_status *status); 907 const struct rx_status *status);
896u8 zd_rx_strength_percent(u8 rssi);
897 908
898u16 zd_rx_rate(const void *rx_frame, const struct rx_status *status); 909u8 zd_rx_rate(const void *rx_frame, const struct rx_status *status);
899 910
900struct zd_mc_hash { 911struct zd_mc_hash {
901 u32 low; 912 u32 low;