diff options
author | Zero.Lin <Zero.Lin@mediatek.com> | 2012-05-29 04:11:09 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2012-06-06 15:19:00 -0400 |
commit | cff3d1f0931d0e6189f5ee718112b235bad1bf99 (patch) | |
tree | 292264f50d71ed36d799357c48a79f2291f5626d /drivers/net/wireless/rt2x00 | |
parent | d7fbcada37ec71b61901bf4344ca832a1bb9f5d1 (diff) |
rt2x00:Add RT5392 chipset support
Signed-off-by: Zero.Lin <Zero.Lin@mediatek.com>
Reviewed-by: Stanislaw Gruszka <sgruszka@redhat.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/rt2x00')
-rw-r--r-- | drivers/net/wireless/rt2x00/rt2800.h | 6 | ||||
-rw-r--r-- | drivers/net/wireless/rt2x00/rt2800lib.c | 22 |
2 files changed, 27 insertions, 1 deletions
diff --git a/drivers/net/wireless/rt2x00/rt2800.h b/drivers/net/wireless/rt2x00/rt2800.h index 6403f49da419..1ca88cdc6ece 100644 --- a/drivers/net/wireless/rt2x00/rt2800.h +++ b/drivers/net/wireless/rt2x00/rt2800.h | |||
@@ -72,6 +72,7 @@ | |||
72 | #define RF5370 0x5370 | 72 | #define RF5370 0x5370 |
73 | #define RF5372 0x5372 | 73 | #define RF5372 0x5372 |
74 | #define RF5390 0x5390 | 74 | #define RF5390 0x5390 |
75 | #define RF5392 0x5392 | ||
75 | 76 | ||
76 | /* | 77 | /* |
77 | * Chipset revisions. | 78 | * Chipset revisions. |
@@ -1946,6 +1947,11 @@ struct mac_iveiv_entry { | |||
1946 | #define RFCSR49_TX FIELD8(0x3f) | 1947 | #define RFCSR49_TX FIELD8(0x3f) |
1947 | 1948 | ||
1948 | /* | 1949 | /* |
1950 | * RFCSR 50: | ||
1951 | */ | ||
1952 | #define RFCSR50_TX FIELD8(0x3f) | ||
1953 | |||
1954 | /* | ||
1949 | * RF registers | 1955 | * RF registers |
1950 | */ | 1956 | */ |
1951 | 1957 | ||
diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c index 11488e743f08..4d3747c3010b 100644 --- a/drivers/net/wireless/rt2x00/rt2800lib.c +++ b/drivers/net/wireless/rt2x00/rt2800lib.c | |||
@@ -1958,7 +1958,22 @@ static void rt2800_config_channel_rf53xx(struct rt2x00_dev *rt2x00dev, | |||
1958 | rt2x00_set_field8(&rfcsr, RFCSR49_TX, info->default_power1); | 1958 | rt2x00_set_field8(&rfcsr, RFCSR49_TX, info->default_power1); |
1959 | rt2800_rfcsr_write(rt2x00dev, 49, rfcsr); | 1959 | rt2800_rfcsr_write(rt2x00dev, 49, rfcsr); |
1960 | 1960 | ||
1961 | if (rt2x00_rt(rt2x00dev, RT5392)) { | ||
1962 | rt2800_rfcsr_read(rt2x00dev, 50, &rfcsr); | ||
1963 | if (info->default_power1 > RT5390_POWER_BOUND) | ||
1964 | rt2x00_set_field8(&rfcsr, RFCSR50_TX, | ||
1965 | RT5390_POWER_BOUND); | ||
1966 | else | ||
1967 | rt2x00_set_field8(&rfcsr, RFCSR50_TX, | ||
1968 | info->default_power2); | ||
1969 | rt2800_rfcsr_write(rt2x00dev, 50, rfcsr); | ||
1970 | } | ||
1971 | |||
1961 | rt2800_rfcsr_read(rt2x00dev, 1, &rfcsr); | 1972 | rt2800_rfcsr_read(rt2x00dev, 1, &rfcsr); |
1973 | if (rt2x00_rt(rt2x00dev, RT5392)) { | ||
1974 | rt2x00_set_field8(&rfcsr, RFCSR1_RX1_PD, 1); | ||
1975 | rt2x00_set_field8(&rfcsr, RFCSR1_TX1_PD, 1); | ||
1976 | } | ||
1962 | rt2x00_set_field8(&rfcsr, RFCSR1_RF_BLOCK_EN, 1); | 1977 | rt2x00_set_field8(&rfcsr, RFCSR1_RF_BLOCK_EN, 1); |
1963 | rt2x00_set_field8(&rfcsr, RFCSR1_PLL_PD, 1); | 1978 | rt2x00_set_field8(&rfcsr, RFCSR1_PLL_PD, 1); |
1964 | rt2x00_set_field8(&rfcsr, RFCSR1_RX0_PD, 1); | 1979 | rt2x00_set_field8(&rfcsr, RFCSR1_RX0_PD, 1); |
@@ -2064,6 +2079,7 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev, | |||
2064 | case RF5370: | 2079 | case RF5370: |
2065 | case RF5372: | 2080 | case RF5372: |
2066 | case RF5390: | 2081 | case RF5390: |
2082 | case RF5392: | ||
2067 | rt2800_config_channel_rf53xx(rt2x00dev, conf, rf, info); | 2083 | rt2800_config_channel_rf53xx(rt2x00dev, conf, rf, info); |
2068 | break; | 2084 | break; |
2069 | default: | 2085 | default: |
@@ -2554,6 +2570,7 @@ void rt2800_vco_calibration(struct rt2x00_dev *rt2x00dev) | |||
2554 | case RF5370: | 2570 | case RF5370: |
2555 | case RF5372: | 2571 | case RF5372: |
2556 | case RF5390: | 2572 | case RF5390: |
2573 | case RF5392: | ||
2557 | rt2800_rfcsr_read(rt2x00dev, 3, &rfcsr); | 2574 | rt2800_rfcsr_read(rt2x00dev, 3, &rfcsr); |
2558 | rt2x00_set_field8(&rfcsr, RFCSR30_RF_CALIBRATION, 1); | 2575 | rt2x00_set_field8(&rfcsr, RFCSR30_RF_CALIBRATION, 1); |
2559 | rt2800_rfcsr_write(rt2x00dev, 3, rfcsr); | 2576 | rt2800_rfcsr_write(rt2x00dev, 3, rfcsr); |
@@ -4269,6 +4286,7 @@ int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev) | |||
4269 | case RF5370: | 4286 | case RF5370: |
4270 | case RF5372: | 4287 | case RF5372: |
4271 | case RF5390: | 4288 | case RF5390: |
4289 | case RF5392: | ||
4272 | break; | 4290 | break; |
4273 | default: | 4291 | default: |
4274 | ERROR(rt2x00dev, "Invalid RF chipset 0x%04x detected.\n", | 4292 | ERROR(rt2x00dev, "Invalid RF chipset 0x%04x detected.\n", |
@@ -4583,7 +4601,8 @@ int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev) | |||
4583 | rt2x00_rf(rt2x00dev, RF5360) || | 4601 | rt2x00_rf(rt2x00dev, RF5360) || |
4584 | rt2x00_rf(rt2x00dev, RF5370) || | 4602 | rt2x00_rf(rt2x00dev, RF5370) || |
4585 | rt2x00_rf(rt2x00dev, RF5372) || | 4603 | rt2x00_rf(rt2x00dev, RF5372) || |
4586 | rt2x00_rf(rt2x00dev, RF5390)) { | 4604 | rt2x00_rf(rt2x00dev, RF5390) || |
4605 | rt2x00_rf(rt2x00dev, RF5392)) { | ||
4587 | spec->num_channels = 14; | 4606 | spec->num_channels = 14; |
4588 | spec->channels = rf_vals_3x; | 4607 | spec->channels = rf_vals_3x; |
4589 | } else if (rt2x00_rf(rt2x00dev, RF3052)) { | 4608 | } else if (rt2x00_rf(rt2x00dev, RF3052)) { |
@@ -4670,6 +4689,7 @@ int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev) | |||
4670 | case RF5370: | 4689 | case RF5370: |
4671 | case RF5372: | 4690 | case RF5372: |
4672 | case RF5390: | 4691 | case RF5390: |
4692 | case RF5392: | ||
4673 | __set_bit(CAPABILITY_VCO_RECALIBRATION, &rt2x00dev->cap_flags); | 4693 | __set_bit(CAPABILITY_VCO_RECALIBRATION, &rt2x00dev->cap_flags); |
4674 | break; | 4694 | break; |
4675 | } | 4695 | } |