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authorStanislaw Gruszka <stf_xl@wp.pl>2013-03-16 14:19:45 -0400
committerJohn W. Linville <linville@tuxdriver.com>2013-03-18 16:38:33 -0400
commit8756130bf3fb9e4adc96bb6bc4774573e261c5b7 (patch)
tree95e2bebe894d4e79bea456377cff47b7e7ef4569 /drivers/net/wireless/rt2x00
parent6803141b4fe53ab88683d70c1612e0f450c0cb1d (diff)
rt2800: 5592: add iq calibration
Based on: GetIQCalibration() IQCalibration() from: DPO_RT5572_LinuxSTA_2.6.1.3_20121022/chips/rtmp_chip.c Signed-off-by: Stanislaw Gruszka <stf_xl@wp.pl> Tested-by: Wanlong Gao <gaowanlong@cn.fujitsu.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/rt2x00')
-rw-r--r--drivers/net/wireless/rt2x00/rt2800.h55
-rw-r--r--drivers/net/wireless/rt2x00/rt2800lib.c41
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00.h9
3 files changed, 101 insertions, 4 deletions
diff --git a/drivers/net/wireless/rt2x00/rt2800.h b/drivers/net/wireless/rt2x00/rt2800.h
index 9d18d5384be7..25c94b596e93 100644
--- a/drivers/net/wireless/rt2x00/rt2800.h
+++ b/drivers/net/wireless/rt2x00/rt2800.h
@@ -2532,6 +2532,61 @@ struct mac_iveiv_entry {
2532#define EEPROM_BBP_REG_ID FIELD16(0xff00) 2532#define EEPROM_BBP_REG_ID FIELD16(0xff00)
2533 2533
2534/* 2534/*
2535 * EEPROM IQ Calibration, unlike other entries those are byte addresses.
2536 */
2537
2538#define EEPROM_IQ_GAIN_CAL_TX0_2G 0x130
2539#define EEPROM_IQ_PHASE_CAL_TX0_2G 0x131
2540#define EEPROM_IQ_GROUPDELAY_CAL_TX0_2G 0x132
2541#define EEPROM_IQ_GAIN_CAL_TX1_2G 0x133
2542#define EEPROM_IQ_PHASE_CAL_TX1_2G 0x134
2543#define EEPROM_IQ_GROUPDELAY_CAL_TX1_2G 0x135
2544#define EEPROM_IQ_GAIN_CAL_RX0_2G 0x136
2545#define EEPROM_IQ_PHASE_CAL_RX0_2G 0x137
2546#define EEPROM_IQ_GROUPDELAY_CAL_RX0_2G 0x138
2547#define EEPROM_IQ_GAIN_CAL_RX1_2G 0x139
2548#define EEPROM_IQ_PHASE_CAL_RX1_2G 0x13A
2549#define EEPROM_IQ_GROUPDELAY_CAL_RX1_2G 0x13B
2550#define EEPROM_RF_IQ_COMPENSATION_CONTROL 0x13C
2551#define EEPROM_RF_IQ_IMBALANCE_COMPENSATION_CONTROL 0x13D
2552#define EEPROM_IQ_GAIN_CAL_TX0_CH36_TO_CH64_5G 0x144
2553#define EEPROM_IQ_PHASE_CAL_TX0_CH36_TO_CH64_5G 0x145
2554#define EEPROM_IQ_GAIN_CAL_TX0_CH100_TO_CH138_5G 0X146
2555#define EEPROM_IQ_PHASE_CAL_TX0_CH100_TO_CH138_5G 0x147
2556#define EEPROM_IQ_GAIN_CAL_TX0_CH140_TO_CH165_5G 0x148
2557#define EEPROM_IQ_PHASE_CAL_TX0_CH140_TO_CH165_5G 0x149
2558#define EEPROM_IQ_GAIN_CAL_TX1_CH36_TO_CH64_5G 0x14A
2559#define EEPROM_IQ_PHASE_CAL_TX1_CH36_TO_CH64_5G 0x14B
2560#define EEPROM_IQ_GAIN_CAL_TX1_CH100_TO_CH138_5G 0X14C
2561#define EEPROM_IQ_PHASE_CAL_TX1_CH100_TO_CH138_5G 0x14D
2562#define EEPROM_IQ_GAIN_CAL_TX1_CH140_TO_CH165_5G 0x14E
2563#define EEPROM_IQ_PHASE_CAL_TX1_CH140_TO_CH165_5G 0x14F
2564#define EEPROM_IQ_GROUPDELAY_CAL_TX0_CH36_TO_CH64_5G 0x150
2565#define EEPROM_IQ_GROUPDELAY_CAL_TX1_CH36_TO_CH64_5G 0x151
2566#define EEPROM_IQ_GROUPDELAY_CAL_TX0_CH100_TO_CH138_5G 0x152
2567#define EEPROM_IQ_GROUPDELAY_CAL_TX1_CH100_TO_CH138_5G 0x153
2568#define EEPROM_IQ_GROUPDELAY_CAL_TX0_CH140_TO_CH165_5G 0x154
2569#define EEPROM_IQ_GROUPDELAY_CAL_TX1_CH140_TO_CH165_5G 0x155
2570#define EEPROM_IQ_GAIN_CAL_RX0_CH36_TO_CH64_5G 0x156
2571#define EEPROM_IQ_PHASE_CAL_RX0_CH36_TO_CH64_5G 0x157
2572#define EEPROM_IQ_GAIN_CAL_RX0_CH100_TO_CH138_5G 0X158
2573#define EEPROM_IQ_PHASE_CAL_RX0_CH100_TO_CH138_5G 0x159
2574#define EEPROM_IQ_GAIN_CAL_RX0_CH140_TO_CH165_5G 0x15A
2575#define EEPROM_IQ_PHASE_CAL_RX0_CH140_TO_CH165_5G 0x15B
2576#define EEPROM_IQ_GAIN_CAL_RX1_CH36_TO_CH64_5G 0x15C
2577#define EEPROM_IQ_PHASE_CAL_RX1_CH36_TO_CH64_5G 0x15D
2578#define EEPROM_IQ_GAIN_CAL_RX1_CH100_TO_CH138_5G 0X15E
2579#define EEPROM_IQ_PHASE_CAL_RX1_CH100_TO_CH138_5G 0x15F
2580#define EEPROM_IQ_GAIN_CAL_RX1_CH140_TO_CH165_5G 0x160
2581#define EEPROM_IQ_PHASE_CAL_RX1_CH140_TO_CH165_5G 0x161
2582#define EEPROM_IQ_GROUPDELAY_CAL_RX0_CH36_TO_CH64_5G 0x162
2583#define EEPROM_IQ_GROUPDELAY_CAL_RX1_CH36_TO_CH64_5G 0x163
2584#define EEPROM_IQ_GROUPDELAY_CAL_RX0_CH100_TO_CH138_5G 0x164
2585#define EEPROM_IQ_GROUPDELAY_CAL_RX1_CH100_TO_CH138_5G 0x165
2586#define EEPROM_IQ_GROUPDELAY_CAL_RX0_CH140_TO_CH165_5G 0x166
2587#define EEPROM_IQ_GROUPDELAY_CAL_RX1_CH140_TO_CH165_5G 0x167
2588
2589/*
2535 * MCU mailbox commands. 2590 * MCU mailbox commands.
2536 * MCU_SLEEP - go to power-save mode. 2591 * MCU_SLEEP - go to power-save mode.
2537 * arg1: 1: save as much power as possible, 0: save less power. 2592 * arg1: 1: save as much power as possible, 0: save less power.
diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c
index c990ab8b1d24..e96ea3298c7c 100644
--- a/drivers/net/wireless/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/rt2x00/rt2800lib.c
@@ -527,8 +527,10 @@ int rt2800_load_firmware(struct rt2x00_dev *rt2x00dev,
527 */ 527 */
528 rt2800_register_write(rt2x00dev, H2M_BBP_AGENT, 0); 528 rt2800_register_write(rt2x00dev, H2M_BBP_AGENT, 0);
529 rt2800_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0); 529 rt2800_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0);
530 if (rt2x00_is_usb(rt2x00dev)) 530 if (rt2x00_is_usb(rt2x00dev)) {
531 rt2800_register_write(rt2x00dev, H2M_INT_SRC, 0); 531 rt2800_register_write(rt2x00dev, H2M_INT_SRC, 0);
532 rt2800_mcu_request(rt2x00dev, MCU_BOOT_SIGNAL, 0, 0, 0);
533 }
532 msleep(1); 534 msleep(1);
533 535
534 return 0; 536 return 0;
@@ -2456,6 +2458,41 @@ static void rt2800_config_channel_rf55xx(struct rt2x00_dev *rt2x00dev,
2456 rt2800_bbp_write(rt2x00dev, 196, (rf->channel <= 14) ? 0x19 : 0x7F); 2458 rt2800_bbp_write(rt2x00dev, 196, (rf->channel <= 14) ? 0x19 : 0x7F);
2457} 2459}
2458 2460
2461static void rt2800_iq_calibrate(struct rt2x00_dev *rt2x00dev, int channel)
2462{
2463 u8 cal;
2464
2465 /* TODO */
2466 if (WARN_ON_ONCE(channel > 14))
2467 return;
2468
2469 rt2800_bbp_write(rt2x00dev, 158, 0x2c);
2470 cal = rt2x00_eeprom_byte(rt2x00dev, EEPROM_IQ_GAIN_CAL_TX0_2G);
2471 rt2800_bbp_write(rt2x00dev, 159, cal);
2472
2473 rt2800_bbp_write(rt2x00dev, 158, 0x2d);
2474 cal = rt2x00_eeprom_byte(rt2x00dev, EEPROM_IQ_PHASE_CAL_TX0_2G);
2475 rt2800_bbp_write(rt2x00dev, 159, cal);
2476
2477 rt2800_bbp_write(rt2x00dev, 158, 0x4a);
2478 cal = rt2x00_eeprom_byte(rt2x00dev, EEPROM_IQ_GAIN_CAL_TX1_2G);
2479 rt2800_bbp_write(rt2x00dev, 159, cal);
2480
2481 rt2800_bbp_write(rt2x00dev, 158, 0x4b);
2482 cal = rt2x00_eeprom_byte(rt2x00dev, EEPROM_IQ_PHASE_CAL_TX1_2G);
2483 rt2800_bbp_write(rt2x00dev, 159, cal);
2484
2485 /* RF IQ compensation control */
2486 rt2800_bbp_write(rt2x00dev, 158, 0x04);
2487 cal = rt2x00_eeprom_byte(rt2x00dev, EEPROM_RF_IQ_COMPENSATION_CONTROL);
2488 rt2800_bbp_write(rt2x00dev, 159, cal != 0xff ? cal : 0);
2489
2490 /* RF IQ imbalance compensation control */
2491 rt2800_bbp_write(rt2x00dev, 158, 0x03);
2492 cal = rt2x00_eeprom_byte(rt2x00dev, EEPROM_RF_IQ_IMBALANCE_COMPENSATION_CONTROL);
2493 rt2800_bbp_write(rt2x00dev, 159, cal != 0xff ? cal : 0);
2494}
2495
2459static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev, 2496static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev,
2460 struct ieee80211_conf *conf, 2497 struct ieee80211_conf *conf,
2461 struct rf_channel *rf, 2498 struct rf_channel *rf,
@@ -2606,7 +2643,7 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev,
2606 rt2800_bbp_write(rt2x00dev, 196, conf_is_ht40(conf) ? 0x10 : 0x1a); 2643 rt2800_bbp_write(rt2x00dev, 196, conf_is_ht40(conf) ? 0x10 : 0x1a);
2607 2644
2608 /* TODO AGC adjust */ 2645 /* TODO AGC adjust */
2609 /* TODO IQ calibration */ 2646 rt2800_iq_calibrate(rt2x00dev, rf->channel);
2610 } 2647 }
2611 2648
2612 rt2800_bbp_read(rt2x00dev, 4, &bbp); 2649 rt2800_bbp_read(rt2x00dev, 4, &bbp);
diff --git a/drivers/net/wireless/rt2x00/rt2x00.h b/drivers/net/wireless/rt2x00/rt2x00.h
index 425183570f35..51922cc179de 100644
--- a/drivers/net/wireless/rt2x00/rt2x00.h
+++ b/drivers/net/wireless/rt2x00/rt2x00.h
@@ -1065,8 +1065,7 @@ static inline void rt2x00_rf_write(struct rt2x00_dev *rt2x00dev,
1065} 1065}
1066 1066
1067/* 1067/*
1068 * Generic EEPROM access. 1068 * Generic EEPROM access. The EEPROM is being accessed by word or byte index.
1069 * The EEPROM is being accessed by word index.
1070 */ 1069 */
1071static inline void *rt2x00_eeprom_addr(struct rt2x00_dev *rt2x00dev, 1070static inline void *rt2x00_eeprom_addr(struct rt2x00_dev *rt2x00dev,
1072 const unsigned int word) 1071 const unsigned int word)
@@ -1086,6 +1085,12 @@ static inline void rt2x00_eeprom_write(struct rt2x00_dev *rt2x00dev,
1086 rt2x00dev->eeprom[word] = cpu_to_le16(data); 1085 rt2x00dev->eeprom[word] = cpu_to_le16(data);
1087} 1086}
1088 1087
1088static inline u8 rt2x00_eeprom_byte(struct rt2x00_dev *rt2x00dev,
1089 const unsigned int byte)
1090{
1091 return *(((u8 *)rt2x00dev->eeprom) + byte);
1092}
1093
1089/* 1094/*
1090 * Chipset handlers 1095 * Chipset handlers
1091 */ 1096 */