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authorIvo van Doorn <IvDoorn@gmail.com>2011-04-18 09:27:06 -0400
committerJohn W. Linville <linville@tuxdriver.com>2011-04-19 15:39:11 -0400
commit7dab73b37f5e8885cb73efd25e73861f9b4f0246 (patch)
tree3c09412e1ec0b02eaf193879aed12db0f9874f7c /drivers/net/wireless/rt2x00/rt61pci.c
parent62fe778412b36791b7897cfa139342906fbbf07b (diff)
rt2x00: Split rt2x00dev->flags
The number of flags defined for the rt2x00dev->flags field, has been growing over the years. Currently we are approaching the maximum number of bits which are available in the field. A secondary problem, is that one part of the field are initialized only during boot, because the driver requirements are initialized or device requirements are loaded from the EEPROM. In both cases, the flags are fixed and will not change during device operation. The other flags are the device state, and will change frequently. So far this resulted in the fact that for some flags, the atomic bit accessors are used, while for the others the non-atomic variants are used. By splitting the flags up into a "flags" and "cap_flags" we can put all flags which are fixed inside "cap_flags". This field can then be read non-atomically. In the "flags" field we keep the device state, which is going to be read atomically. This adds more room for more flags in the future, and sanitizes the field access methods. Signed-off-by: Ivo van Doorn <IvDoorn@gmail.com> Acked-by: Helmut Schaa <helmut.schaa@googlemail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/rt2x00/rt61pci.c')
-rw-r--r--drivers/net/wireless/rt2x00/rt61pci.c42
1 files changed, 21 insertions, 21 deletions
diff --git a/drivers/net/wireless/rt2x00/rt61pci.c b/drivers/net/wireless/rt2x00/rt61pci.c
index 8ee1514a7943..c16c1501df18 100644
--- a/drivers/net/wireless/rt2x00/rt61pci.c
+++ b/drivers/net/wireless/rt2x00/rt61pci.c
@@ -683,7 +683,7 @@ static void rt61pci_config_antenna_2x(struct rt2x00_dev *rt2x00dev,
683 683
684 rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, rt2x00_rf(rt2x00dev, RF2529)); 684 rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, rt2x00_rf(rt2x00dev, RF2529));
685 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, 685 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END,
686 !test_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags)); 686 !test_bit(CAPABILITY_FRAME_TYPE, &rt2x00dev->cap_flags));
687 687
688 /* 688 /*
689 * Configure the RX antenna. 689 * Configure the RX antenna.
@@ -811,10 +811,10 @@ static void rt61pci_config_ant(struct rt2x00_dev *rt2x00dev,
811 811
812 if (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ) { 812 if (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ) {
813 sel = antenna_sel_a; 813 sel = antenna_sel_a;
814 lna = test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags); 814 lna = test_bit(CAPABILITY_EXTERNAL_LNA_A, &rt2x00dev->cap_flags);
815 } else { 815 } else {
816 sel = antenna_sel_bg; 816 sel = antenna_sel_bg;
817 lna = test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags); 817 lna = test_bit(CAPABILITY_EXTERNAL_LNA_BG, &rt2x00dev->cap_flags);
818 } 818 }
819 819
820 for (i = 0; i < ARRAY_SIZE(antenna_sel_a); i++) 820 for (i = 0; i < ARRAY_SIZE(antenna_sel_a); i++)
@@ -834,7 +834,7 @@ static void rt61pci_config_ant(struct rt2x00_dev *rt2x00dev,
834 else if (rt2x00_rf(rt2x00dev, RF2527)) 834 else if (rt2x00_rf(rt2x00dev, RF2527))
835 rt61pci_config_antenna_2x(rt2x00dev, ant); 835 rt61pci_config_antenna_2x(rt2x00dev, ant);
836 else if (rt2x00_rf(rt2x00dev, RF2529)) { 836 else if (rt2x00_rf(rt2x00dev, RF2529)) {
837 if (test_bit(CONFIG_DOUBLE_ANTENNA, &rt2x00dev->flags)) 837 if (test_bit(CAPABILITY_DOUBLE_ANTENNA, &rt2x00dev->cap_flags))
838 rt61pci_config_antenna_2x(rt2x00dev, ant); 838 rt61pci_config_antenna_2x(rt2x00dev, ant);
839 else 839 else
840 rt61pci_config_antenna_2529(rt2x00dev, ant); 840 rt61pci_config_antenna_2529(rt2x00dev, ant);
@@ -848,13 +848,13 @@ static void rt61pci_config_lna_gain(struct rt2x00_dev *rt2x00dev,
848 short lna_gain = 0; 848 short lna_gain = 0;
849 849
850 if (libconf->conf->channel->band == IEEE80211_BAND_2GHZ) { 850 if (libconf->conf->channel->band == IEEE80211_BAND_2GHZ) {
851 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags)) 851 if (test_bit(CAPABILITY_EXTERNAL_LNA_BG, &rt2x00dev->cap_flags))
852 lna_gain += 14; 852 lna_gain += 14;
853 853
854 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_BG, &eeprom); 854 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_BG, &eeprom);
855 lna_gain -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_BG_1); 855 lna_gain -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_BG_1);
856 } else { 856 } else {
857 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags)) 857 if (test_bit(CAPABILITY_EXTERNAL_LNA_A, &rt2x00dev->cap_flags))
858 lna_gain += 14; 858 lna_gain += 14;
859 859
860 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_A, &eeprom); 860 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_A, &eeprom);
@@ -1050,14 +1050,14 @@ static void rt61pci_link_tuner(struct rt2x00_dev *rt2x00dev,
1050 if (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ) { 1050 if (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ) {
1051 low_bound = 0x28; 1051 low_bound = 0x28;
1052 up_bound = 0x48; 1052 up_bound = 0x48;
1053 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags)) { 1053 if (test_bit(CAPABILITY_EXTERNAL_LNA_A, &rt2x00dev->cap_flags)) {
1054 low_bound += 0x10; 1054 low_bound += 0x10;
1055 up_bound += 0x10; 1055 up_bound += 0x10;
1056 } 1056 }
1057 } else { 1057 } else {
1058 low_bound = 0x20; 1058 low_bound = 0x20;
1059 up_bound = 0x40; 1059 up_bound = 0x40;
1060 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags)) { 1060 if (test_bit(CAPABILITY_EXTERNAL_LNA_BG, &rt2x00dev->cap_flags)) {
1061 low_bound += 0x10; 1061 low_bound += 0x10;
1062 up_bound += 0x10; 1062 up_bound += 0x10;
1063 } 1063 }
@@ -2537,7 +2537,7 @@ static int rt61pci_init_eeprom(struct rt2x00_dev *rt2x00dev)
2537 * Determine number of antennas. 2537 * Determine number of antennas.
2538 */ 2538 */
2539 if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_NUM) == 2) 2539 if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_NUM) == 2)
2540 __set_bit(CONFIG_DOUBLE_ANTENNA, &rt2x00dev->flags); 2540 __set_bit(CAPABILITY_DOUBLE_ANTENNA, &rt2x00dev->cap_flags);
2541 2541
2542 /* 2542 /*
2543 * Identify default antenna configuration. 2543 * Identify default antenna configuration.
@@ -2551,20 +2551,20 @@ static int rt61pci_init_eeprom(struct rt2x00_dev *rt2x00dev)
2551 * Read the Frame type. 2551 * Read the Frame type.
2552 */ 2552 */
2553 if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_FRAME_TYPE)) 2553 if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_FRAME_TYPE))
2554 __set_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags); 2554 __set_bit(CAPABILITY_FRAME_TYPE, &rt2x00dev->cap_flags);
2555 2555
2556 /* 2556 /*
2557 * Detect if this device has a hardware controlled radio. 2557 * Detect if this device has a hardware controlled radio.
2558 */ 2558 */
2559 if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_HARDWARE_RADIO)) 2559 if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_HARDWARE_RADIO))
2560 __set_bit(CONFIG_SUPPORT_HW_BUTTON, &rt2x00dev->flags); 2560 __set_bit(CAPABILITY_HW_BUTTON, &rt2x00dev->cap_flags);
2561 2561
2562 /* 2562 /*
2563 * Read frequency offset and RF programming sequence. 2563 * Read frequency offset and RF programming sequence.
2564 */ 2564 */
2565 rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &eeprom); 2565 rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &eeprom);
2566 if (rt2x00_get_field16(eeprom, EEPROM_FREQ_SEQ)) 2566 if (rt2x00_get_field16(eeprom, EEPROM_FREQ_SEQ))
2567 __set_bit(CONFIG_RF_SEQUENCE, &rt2x00dev->flags); 2567 __set_bit(CAPABILITY_RF_SEQUENCE, &rt2x00dev->cap_flags);
2568 2568
2569 rt2x00dev->freq_offset = rt2x00_get_field16(eeprom, EEPROM_FREQ_OFFSET); 2569 rt2x00dev->freq_offset = rt2x00_get_field16(eeprom, EEPROM_FREQ_OFFSET);
2570 2570
@@ -2574,9 +2574,9 @@ static int rt61pci_init_eeprom(struct rt2x00_dev *rt2x00dev)
2574 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom); 2574 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
2575 2575
2576 if (rt2x00_get_field16(eeprom, EEPROM_NIC_EXTERNAL_LNA_A)) 2576 if (rt2x00_get_field16(eeprom, EEPROM_NIC_EXTERNAL_LNA_A))
2577 __set_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags); 2577 __set_bit(CAPABILITY_EXTERNAL_LNA_A, &rt2x00dev->cap_flags);
2578 if (rt2x00_get_field16(eeprom, EEPROM_NIC_EXTERNAL_LNA_BG)) 2578 if (rt2x00_get_field16(eeprom, EEPROM_NIC_EXTERNAL_LNA_BG))
2579 __set_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags); 2579 __set_bit(CAPABILITY_EXTERNAL_LNA_BG, &rt2x00dev->cap_flags);
2580 2580
2581 /* 2581 /*
2582 * When working with a RF2529 chip without double antenna, 2582 * When working with a RF2529 chip without double antenna,
@@ -2584,7 +2584,7 @@ static int rt61pci_init_eeprom(struct rt2x00_dev *rt2x00dev)
2584 * eeprom word. 2584 * eeprom word.
2585 */ 2585 */
2586 if (rt2x00_rf(rt2x00dev, RF2529) && 2586 if (rt2x00_rf(rt2x00dev, RF2529) &&
2587 !test_bit(CONFIG_DOUBLE_ANTENNA, &rt2x00dev->flags)) { 2587 !test_bit(CAPABILITY_DOUBLE_ANTENNA, &rt2x00dev->cap_flags)) {
2588 rt2x00dev->default_ant.rx = 2588 rt2x00dev->default_ant.rx =
2589 ANTENNA_A + rt2x00_get_field16(eeprom, EEPROM_NIC_RX_FIXED); 2589 ANTENNA_A + rt2x00_get_field16(eeprom, EEPROM_NIC_RX_FIXED);
2590 rt2x00dev->default_ant.tx = 2590 rt2x00dev->default_ant.tx =
@@ -2799,7 +2799,7 @@ static int rt61pci_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
2799 spec->supported_bands = SUPPORT_BAND_2GHZ; 2799 spec->supported_bands = SUPPORT_BAND_2GHZ;
2800 spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM; 2800 spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
2801 2801
2802 if (!test_bit(CONFIG_RF_SEQUENCE, &rt2x00dev->flags)) { 2802 if (!test_bit(CAPABILITY_RF_SEQUENCE, &rt2x00dev->cap_flags)) {
2803 spec->num_channels = 14; 2803 spec->num_channels = 14;
2804 spec->channels = rf_vals_noseq; 2804 spec->channels = rf_vals_noseq;
2805 } else { 2805 } else {
@@ -2869,16 +2869,16 @@ static int rt61pci_probe_hw(struct rt2x00_dev *rt2x00dev)
2869 * This device has multiple filters for control frames, 2869 * This device has multiple filters for control frames,
2870 * but has no a separate filter for PS Poll frames. 2870 * but has no a separate filter for PS Poll frames.
2871 */ 2871 */
2872 __set_bit(DRIVER_SUPPORT_CONTROL_FILTERS, &rt2x00dev->flags); 2872 __set_bit(CAPABILITY_CONTROL_FILTERS, &rt2x00dev->cap_flags);
2873 2873
2874 /* 2874 /*
2875 * This device requires firmware and DMA mapped skbs. 2875 * This device requires firmware and DMA mapped skbs.
2876 */ 2876 */
2877 __set_bit(DRIVER_REQUIRE_FIRMWARE, &rt2x00dev->flags); 2877 __set_bit(REQUIRE_FIRMWARE, &rt2x00dev->cap_flags);
2878 __set_bit(DRIVER_REQUIRE_DMA, &rt2x00dev->flags); 2878 __set_bit(REQUIRE_DMA, &rt2x00dev->cap_flags);
2879 if (!modparam_nohwcrypt) 2879 if (!modparam_nohwcrypt)
2880 __set_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags); 2880 __set_bit(CAPABILITY_HW_CRYPTO, &rt2x00dev->cap_flags);
2881 __set_bit(DRIVER_SUPPORT_LINK_TUNING, &rt2x00dev->flags); 2881 __set_bit(CAPABILITY_LINK_TUNING, &rt2x00dev->cap_flags);
2882 2882
2883 /* 2883 /*
2884 * Set the rssi offset. 2884 * Set the rssi offset.