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authorIvo van Doorn <IvDoorn@gmail.com>2007-10-06 07:34:52 -0400
committerDavid S. Miller <davem@sunset.davemloft.net>2007-10-10 19:55:15 -0400
commit5c58ee51ff8c0aca74c225e0263bc5dd2b917781 (patch)
treea08e875dade8a6f55d45419b728b2b077cec6dc0 /drivers/net/wireless/rt2x00/rt61pci.c
parent4f5af6eb3d17f8e343597ea99d97eb2f2905b2fb (diff)
[PATCH] rt2x00: Reorganize configuration handler
Reorganize configuration handling by creating a extra structure which contains precalculated values based on the mac80211 values which are usefull for all individual drivers. This also fixes the preamble configuration problem, up untill now preamble was never configured since by default the rate->val value was used when changing the mode. Now rate->val will only be used to set the basic rate mask. The preamble configuration will now be done correctly through the erp_ie_changed callback function. Signed-off-by: Ivo van Doorn <IvDoorn@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/rt2x00/rt61pci.c')
-rw-r--r--drivers/net/wireless/rt2x00/rt61pci.c101
1 files changed, 27 insertions, 74 deletions
diff --git a/drivers/net/wireless/rt2x00/rt61pci.c b/drivers/net/wireless/rt2x00/rt61pci.c
index cd22817cced5..1a869a5cbe91 100644
--- a/drivers/net/wireless/rt2x00/rt61pci.c
+++ b/drivers/net/wireless/rt2x00/rt61pci.c
@@ -328,62 +328,31 @@ static void rt61pci_config_type(struct rt2x00_dev *rt2x00dev, const int type,
328 rt2x00pci_register_write(rt2x00dev, TXRX_CSR9, reg); 328 rt2x00pci_register_write(rt2x00dev, TXRX_CSR9, reg);
329} 329}
330 330
331static void rt61pci_config_rate(struct rt2x00_dev *rt2x00dev, const int rate) 331static void rt61pci_config_preamble(struct rt2x00_dev *rt2x00dev,
332 const int short_preamble,
333 const int ack_timeout,
334 const int ack_consume_time)
332{ 335{
333 struct ieee80211_conf *conf = &rt2x00dev->hw->conf;
334 u32 reg; 336 u32 reg;
335 u32 value;
336 u32 preamble;
337
338 if (DEVICE_GET_RATE_FIELD(rate, PREAMBLE))
339 preamble = SHORT_PREAMBLE;
340 else
341 preamble = PREAMBLE;
342
343 /*
344 * Extract the allowed ratemask from the device specific rate value,
345 * We need to set TXRX_CSR5 to the basic rate mask so we need to mask
346 * off the non-basic rates.
347 */
348 reg = DEVICE_GET_RATE_FIELD(rate, RATEMASK) & DEV_BASIC_RATEMASK;
349
350 rt2x00pci_register_write(rt2x00dev, TXRX_CSR5, reg);
351 337
352 rt2x00pci_register_read(rt2x00dev, TXRX_CSR0, &reg); 338 rt2x00pci_register_read(rt2x00dev, TXRX_CSR0, &reg);
353 value = ((conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME) ? 339 rt2x00_set_field32(&reg, TXRX_CSR0_RX_ACK_TIMEOUT, ack_timeout);
354 SHORT_DIFS : DIFS) +
355 PLCP + preamble + get_duration(ACK_SIZE, 10);
356 rt2x00_set_field32(&reg, TXRX_CSR0_RX_ACK_TIMEOUT, value);
357 rt2x00pci_register_write(rt2x00dev, TXRX_CSR0, reg); 340 rt2x00pci_register_write(rt2x00dev, TXRX_CSR0, reg);
358 341
359 rt2x00pci_register_read(rt2x00dev, TXRX_CSR4, &reg); 342 rt2x00pci_register_read(rt2x00dev, TXRX_CSR4, &reg);
360 rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_PREAMBLE, 343 rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_PREAMBLE,
361 (preamble == SHORT_PREAMBLE)); 344 !!short_preamble);
362 rt2x00pci_register_write(rt2x00dev, TXRX_CSR4, reg); 345 rt2x00pci_register_write(rt2x00dev, TXRX_CSR4, reg);
363} 346}
364 347
365static void rt61pci_config_phymode(struct rt2x00_dev *rt2x00dev, 348static void rt61pci_config_phymode(struct rt2x00_dev *rt2x00dev,
366 const int phymode) 349 const int basic_rate_mask)
367{ 350{
368 struct ieee80211_hw_mode *mode; 351 rt2x00pci_register_write(rt2x00dev, TXRX_CSR5, basic_rate_mask);
369 struct ieee80211_rate *rate;
370
371 if (phymode == MODE_IEEE80211A)
372 rt2x00dev->curr_hwmode = HWMODE_A;
373 else if (phymode == MODE_IEEE80211B)
374 rt2x00dev->curr_hwmode = HWMODE_B;
375 else
376 rt2x00dev->curr_hwmode = HWMODE_G;
377
378 mode = &rt2x00dev->hwmodes[rt2x00dev->curr_hwmode];
379 rate = &mode->rates[mode->num_rates - 1];
380
381 rt61pci_config_rate(rt2x00dev, rate->val2);
382} 352}
383 353
384static void rt61pci_config_lock_channel(struct rt2x00_dev *rt2x00dev, 354static void rt61pci_config_channel(struct rt2x00_dev *rt2x00dev,
385 struct rf_channel *rf, 355 struct rf_channel *rf, const int txpower)
386 const int txpower)
387{ 356{
388 u8 r3; 357 u8 r3;
389 u8 r94; 358 u8 r94;
@@ -428,20 +397,6 @@ static void rt61pci_config_lock_channel(struct rt2x00_dev *rt2x00dev,
428 msleep(1); 397 msleep(1);
429} 398}
430 399
431static void rt61pci_config_channel(struct rt2x00_dev *rt2x00dev,
432 const int index, const int channel,
433 const int txpower)
434{
435 struct rf_channel rf;
436
437 /*
438 * Fill rf_reg structure.
439 */
440 memcpy(&rf, &rt2x00dev->spec.channels[index], sizeof(rf));
441
442 rt61pci_config_lock_channel(rt2x00dev, &rf, txpower);
443}
444
445static void rt61pci_config_txpower(struct rt2x00_dev *rt2x00dev, 400static void rt61pci_config_txpower(struct rt2x00_dev *rt2x00dev,
446 const int txpower) 401 const int txpower)
447{ 402{
@@ -452,7 +407,7 @@ static void rt61pci_config_txpower(struct rt2x00_dev *rt2x00dev,
452 rt2x00_rf_read(rt2x00dev, 3, &rf.rf3); 407 rt2x00_rf_read(rt2x00dev, 3, &rf.rf3);
453 rt2x00_rf_read(rt2x00dev, 4, &rf.rf4); 408 rt2x00_rf_read(rt2x00dev, 4, &rf.rf4);
454 409
455 rt61pci_config_lock_channel(rt2x00dev, &rf, txpower); 410 rt61pci_config_channel(rt2x00dev, &rf, txpower);
456} 411}
457 412
458static void rt61pci_config_antenna_5x(struct rt2x00_dev *rt2x00dev, 413static void rt61pci_config_antenna_5x(struct rt2x00_dev *rt2x00dev,
@@ -714,20 +669,18 @@ static void rt61pci_config_antenna(struct rt2x00_dev *rt2x00dev,
714} 669}
715 670
716static void rt61pci_config_duration(struct rt2x00_dev *rt2x00dev, 671static void rt61pci_config_duration(struct rt2x00_dev *rt2x00dev,
717 const int short_slot_time, 672 struct rt2x00lib_conf *libconf)
718 const int beacon_int)
719{ 673{
720 u32 reg; 674 u32 reg;
721 675
722 rt2x00pci_register_read(rt2x00dev, MAC_CSR9, &reg); 676 rt2x00pci_register_read(rt2x00dev, MAC_CSR9, &reg);
723 rt2x00_set_field32(&reg, MAC_CSR9_SLOT_TIME, 677 rt2x00_set_field32(&reg, MAC_CSR9_SLOT_TIME, libconf->slot_time);
724 short_slot_time ? SHORT_SLOT_TIME : SLOT_TIME);
725 rt2x00pci_register_write(rt2x00dev, MAC_CSR9, reg); 678 rt2x00pci_register_write(rt2x00dev, MAC_CSR9, reg);
726 679
727 rt2x00pci_register_read(rt2x00dev, MAC_CSR8, &reg); 680 rt2x00pci_register_read(rt2x00dev, MAC_CSR8, &reg);
728 rt2x00_set_field32(&reg, MAC_CSR8_SIFS, SIFS); 681 rt2x00_set_field32(&reg, MAC_CSR8_SIFS, libconf->sifs);
729 rt2x00_set_field32(&reg, MAC_CSR8_SIFS_AFTER_RX_OFDM, 3); 682 rt2x00_set_field32(&reg, MAC_CSR8_SIFS_AFTER_RX_OFDM, 3);
730 rt2x00_set_field32(&reg, MAC_CSR8_EIFS, EIFS); 683 rt2x00_set_field32(&reg, MAC_CSR8_EIFS, libconf->eifs);
731 rt2x00pci_register_write(rt2x00dev, MAC_CSR8, reg); 684 rt2x00pci_register_write(rt2x00dev, MAC_CSR8, reg);
732 685
733 rt2x00pci_register_read(rt2x00dev, TXRX_CSR0, &reg); 686 rt2x00pci_register_read(rt2x00dev, TXRX_CSR0, &reg);
@@ -739,29 +692,27 @@ static void rt61pci_config_duration(struct rt2x00_dev *rt2x00dev,
739 rt2x00pci_register_write(rt2x00dev, TXRX_CSR4, reg); 692 rt2x00pci_register_write(rt2x00dev, TXRX_CSR4, reg);
740 693
741 rt2x00pci_register_read(rt2x00dev, TXRX_CSR9, &reg); 694 rt2x00pci_register_read(rt2x00dev, TXRX_CSR9, &reg);
742 rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_INTERVAL, beacon_int * 16); 695 rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_INTERVAL,
696 libconf->conf->beacon_int * 16);
743 rt2x00pci_register_write(rt2x00dev, TXRX_CSR9, reg); 697 rt2x00pci_register_write(rt2x00dev, TXRX_CSR9, reg);
744} 698}
745 699
746static void rt61pci_config(struct rt2x00_dev *rt2x00dev, 700static void rt61pci_config(struct rt2x00_dev *rt2x00dev,
747 const unsigned int flags, 701 const unsigned int flags,
748 struct ieee80211_conf *conf) 702 struct rt2x00lib_conf *libconf)
749{ 703{
750 int short_slot_time = conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME;
751
752 if (flags & CONFIG_UPDATE_PHYMODE) 704 if (flags & CONFIG_UPDATE_PHYMODE)
753 rt61pci_config_phymode(rt2x00dev, conf->phymode); 705 rt61pci_config_phymode(rt2x00dev, libconf->basic_rates);
754 if (flags & CONFIG_UPDATE_CHANNEL) 706 if (flags & CONFIG_UPDATE_CHANNEL)
755 rt61pci_config_channel(rt2x00dev, conf->channel_val, 707 rt61pci_config_channel(rt2x00dev, &libconf->rf,
756 conf->channel, conf->power_level); 708 libconf->conf->power_level);
757 if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL)) 709 if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL))
758 rt61pci_config_txpower(rt2x00dev, conf->power_level); 710 rt61pci_config_txpower(rt2x00dev, libconf->conf->power_level);
759 if (flags & CONFIG_UPDATE_ANTENNA) 711 if (flags & CONFIG_UPDATE_ANTENNA)
760 rt61pci_config_antenna(rt2x00dev, conf->antenna_sel_tx, 712 rt61pci_config_antenna(rt2x00dev, libconf->conf->antenna_sel_tx,
761 conf->antenna_sel_rx); 713 libconf->conf->antenna_sel_rx);
762 if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT)) 714 if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT))
763 rt61pci_config_duration(rt2x00dev, short_slot_time, 715 rt61pci_config_duration(rt2x00dev, libconf);
764 conf->beacon_int);
765} 716}
766 717
767/* 718/*
@@ -2513,6 +2464,7 @@ static const struct ieee80211_ops rt61pci_mac80211_ops = {
2513 .configure_filter = rt61pci_configure_filter, 2464 .configure_filter = rt61pci_configure_filter,
2514 .get_stats = rt2x00mac_get_stats, 2465 .get_stats = rt2x00mac_get_stats,
2515 .set_retry_limit = rt61pci_set_retry_limit, 2466 .set_retry_limit = rt61pci_set_retry_limit,
2467 .erp_ie_changed = rt2x00mac_erp_ie_changed,
2516 .conf_tx = rt2x00mac_conf_tx, 2468 .conf_tx = rt2x00mac_conf_tx,
2517 .get_tx_stats = rt2x00mac_get_tx_stats, 2469 .get_tx_stats = rt2x00mac_get_tx_stats,
2518 .get_tsf = rt61pci_get_tsf, 2470 .get_tsf = rt61pci_get_tsf,
@@ -2539,6 +2491,7 @@ static const struct rt2x00lib_ops rt61pci_rt2x00_ops = {
2539 .config_mac_addr = rt61pci_config_mac_addr, 2491 .config_mac_addr = rt61pci_config_mac_addr,
2540 .config_bssid = rt61pci_config_bssid, 2492 .config_bssid = rt61pci_config_bssid,
2541 .config_type = rt61pci_config_type, 2493 .config_type = rt61pci_config_type,
2494 .config_preamble = rt61pci_config_preamble,
2542 .config = rt61pci_config, 2495 .config = rt61pci_config,
2543}; 2496};
2544 2497