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authorAndrea Bastoni <bastoni@cs.unc.edu>2010-05-30 19:16:45 -0400
committerAndrea Bastoni <bastoni@cs.unc.edu>2010-05-30 19:16:45 -0400
commitada47b5fe13d89735805b566185f4885f5a3f750 (patch)
tree644b88f8a71896307d71438e9b3af49126ffb22b /drivers/net/wireless/rt2x00/rt61pci.c
parent43e98717ad40a4ae64545b5ba047c7b86aa44f4f (diff)
parent3280f21d43ee541f97f8cda5792150d2dbec20d5 (diff)
Merge branch 'wip-2.6.34' into old-private-masterarchived-private-master
Diffstat (limited to 'drivers/net/wireless/rt2x00/rt61pci.c')
-rw-r--r--drivers/net/wireless/rt2x00/rt61pci.c117
1 files changed, 60 insertions, 57 deletions
diff --git a/drivers/net/wireless/rt2x00/rt61pci.c b/drivers/net/wireless/rt2x00/rt61pci.c
index b20e3eac9d67..432e75f960b7 100644
--- a/drivers/net/wireless/rt2x00/rt61pci.c
+++ b/drivers/net/wireless/rt2x00/rt61pci.c
@@ -1,5 +1,5 @@
1/* 1/*
2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project 2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 <http://rt2x00.serialmonkey.com> 3 <http://rt2x00.serialmonkey.com>
4 4
5 This program is free software; you can redistribute it and/or modify 5 This program is free software; you can redistribute it and/or modify
@@ -30,6 +30,7 @@
30#include <linux/init.h> 30#include <linux/init.h>
31#include <linux/kernel.h> 31#include <linux/kernel.h>
32#include <linux/module.h> 32#include <linux/module.h>
33#include <linux/slab.h>
33#include <linux/pci.h> 34#include <linux/pci.h>
34#include <linux/eeprom_93cx6.h> 35#include <linux/eeprom_93cx6.h>
35 36
@@ -51,7 +52,7 @@ MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
51 * These indirect registers work with busy bits, 52 * These indirect registers work with busy bits,
52 * and we will try maximal REGISTER_BUSY_COUNT times to access 53 * and we will try maximal REGISTER_BUSY_COUNT times to access
53 * the register while taking a REGISTER_BUSY_DELAY us delay 54 * the register while taking a REGISTER_BUSY_DELAY us delay
54 * between each attampt. When the busy bit is still set at that time, 55 * between each attempt. When the busy bit is still set at that time,
55 * the access attempt is considered to have failed, 56 * the access attempt is considered to have failed,
56 * and we will print an error. 57 * and we will print an error.
57 */ 58 */
@@ -386,7 +387,7 @@ static int rt61pci_config_shared_key(struct rt2x00_dev *rt2x00dev,
386 * The driver does not support the IV/EIV generation 387 * The driver does not support the IV/EIV generation
387 * in hardware. However it doesn't support the IV/EIV 388 * in hardware. However it doesn't support the IV/EIV
388 * inside the ieee80211 frame either, but requires it 389 * inside the ieee80211 frame either, but requires it
389 * to be provided seperately for the descriptor. 390 * to be provided separately for the descriptor.
390 * rt2x00lib will cut the IV/EIV data out of all frames 391 * rt2x00lib will cut the IV/EIV data out of all frames
391 * given to us by mac80211, but we must tell mac80211 392 * given to us by mac80211, but we must tell mac80211
392 * to generate the IV/EIV data. 393 * to generate the IV/EIV data.
@@ -397,7 +398,7 @@ static int rt61pci_config_shared_key(struct rt2x00_dev *rt2x00dev,
397 /* 398 /*
398 * SEC_CSR0 contains only single-bit fields to indicate 399 * SEC_CSR0 contains only single-bit fields to indicate
399 * a particular key is valid. Because using the FIELD32() 400 * a particular key is valid. Because using the FIELD32()
400 * defines directly will cause a lot of overhead we use 401 * defines directly will cause a lot of overhead, we use
401 * a calculation to determine the correct bit directly. 402 * a calculation to determine the correct bit directly.
402 */ 403 */
403 mask = 1 << key->hw_key_idx; 404 mask = 1 << key->hw_key_idx;
@@ -425,11 +426,11 @@ static int rt61pci_config_pairwise_key(struct rt2x00_dev *rt2x00dev,
425 /* 426 /*
426 * rt2x00lib can't determine the correct free 427 * rt2x00lib can't determine the correct free
427 * key_idx for pairwise keys. We have 2 registers 428 * key_idx for pairwise keys. We have 2 registers
428 * with key valid bits. The goal is simple, read 429 * with key valid bits. The goal is simple: read
429 * the first register, if that is full move to 430 * the first register. If that is full, move to
430 * the next register. 431 * the next register.
431 * When both registers are full, we drop the key, 432 * When both registers are full, we drop the key.
432 * otherwise we use the first invalid entry. 433 * Otherwise, we use the first invalid entry.
433 */ 434 */
434 rt2x00pci_register_read(rt2x00dev, SEC_CSR2, &reg); 435 rt2x00pci_register_read(rt2x00dev, SEC_CSR2, &reg);
435 if (reg && reg == ~0) { 436 if (reg && reg == ~0) {
@@ -464,8 +465,8 @@ static int rt61pci_config_pairwise_key(struct rt2x00_dev *rt2x00dev,
464 &addr_entry, sizeof(addr_entry)); 465 &addr_entry, sizeof(addr_entry));
465 466
466 /* 467 /*
467 * Enable pairwise lookup table for given BSS idx, 468 * Enable pairwise lookup table for given BSS idx.
468 * without this received frames will not be decrypted 469 * Without this, received frames will not be decrypted
469 * by the hardware. 470 * by the hardware.
470 */ 471 */
471 rt2x00pci_register_read(rt2x00dev, SEC_CSR4, &reg); 472 rt2x00pci_register_read(rt2x00dev, SEC_CSR4, &reg);
@@ -476,7 +477,7 @@ static int rt61pci_config_pairwise_key(struct rt2x00_dev *rt2x00dev,
476 * The driver does not support the IV/EIV generation 477 * The driver does not support the IV/EIV generation
477 * in hardware. However it doesn't support the IV/EIV 478 * in hardware. However it doesn't support the IV/EIV
478 * inside the ieee80211 frame either, but requires it 479 * inside the ieee80211 frame either, but requires it
479 * to be provided seperately for the descriptor. 480 * to be provided separately for the descriptor.
480 * rt2x00lib will cut the IV/EIV data out of all frames 481 * rt2x00lib will cut the IV/EIV data out of all frames
481 * given to us by mac80211, but we must tell mac80211 482 * given to us by mac80211, but we must tell mac80211
482 * to generate the IV/EIV data. 483 * to generate the IV/EIV data.
@@ -487,7 +488,7 @@ static int rt61pci_config_pairwise_key(struct rt2x00_dev *rt2x00dev,
487 /* 488 /*
488 * SEC_CSR2 and SEC_CSR3 contain only single-bit fields to indicate 489 * SEC_CSR2 and SEC_CSR3 contain only single-bit fields to indicate
489 * a particular key is valid. Because using the FIELD32() 490 * a particular key is valid. Because using the FIELD32()
490 * defines directly will cause a lot of overhead we use 491 * defines directly will cause a lot of overhead, we use
491 * a calculation to determine the correct bit directly. 492 * a calculation to determine the correct bit directly.
492 */ 493 */
493 if (key->hw_key_idx < 32) { 494 if (key->hw_key_idx < 32) {
@@ -556,7 +557,7 @@ static void rt61pci_config_intf(struct rt2x00_dev *rt2x00dev,
556 if (flags & CONFIG_UPDATE_TYPE) { 557 if (flags & CONFIG_UPDATE_TYPE) {
557 /* 558 /*
558 * Clear current synchronisation setup. 559 * Clear current synchronisation setup.
559 * For the Beacon base registers we only need to clear 560 * For the Beacon base registers, we only need to clear
560 * the first byte since that byte contains the VALID and OWNER 561 * the first byte since that byte contains the VALID and OWNER
561 * bits which (when set to 0) will invalidate the entire beacon. 562 * bits which (when set to 0) will invalidate the entire beacon.
562 */ 563 */
@@ -637,8 +638,7 @@ static void rt61pci_config_antenna_5x(struct rt2x00_dev *rt2x00dev,
637 rt61pci_bbp_read(rt2x00dev, 4, &r4); 638 rt61pci_bbp_read(rt2x00dev, 4, &r4);
638 rt61pci_bbp_read(rt2x00dev, 77, &r77); 639 rt61pci_bbp_read(rt2x00dev, 77, &r77);
639 640
640 rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, 641 rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, rt2x00_rf(rt2x00dev, RF5325));
641 rt2x00_rf(&rt2x00dev->chip, RF5325));
642 642
643 /* 643 /*
644 * Configure the RX antenna. 644 * Configure the RX antenna.
@@ -684,8 +684,7 @@ static void rt61pci_config_antenna_2x(struct rt2x00_dev *rt2x00dev,
684 rt61pci_bbp_read(rt2x00dev, 4, &r4); 684 rt61pci_bbp_read(rt2x00dev, 4, &r4);
685 rt61pci_bbp_read(rt2x00dev, 77, &r77); 685 rt61pci_bbp_read(rt2x00dev, 77, &r77);
686 686
687 rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, 687 rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, rt2x00_rf(rt2x00dev, RF2529));
688 rt2x00_rf(&rt2x00dev->chip, RF2529));
689 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, 688 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END,
690 !test_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags)); 689 !test_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags));
691 690
@@ -833,12 +832,11 @@ static void rt61pci_config_ant(struct rt2x00_dev *rt2x00dev,
833 832
834 rt2x00pci_register_write(rt2x00dev, PHY_CSR0, reg); 833 rt2x00pci_register_write(rt2x00dev, PHY_CSR0, reg);
835 834
836 if (rt2x00_rf(&rt2x00dev->chip, RF5225) || 835 if (rt2x00_rf(rt2x00dev, RF5225) || rt2x00_rf(rt2x00dev, RF5325))
837 rt2x00_rf(&rt2x00dev->chip, RF5325))
838 rt61pci_config_antenna_5x(rt2x00dev, ant); 836 rt61pci_config_antenna_5x(rt2x00dev, ant);
839 else if (rt2x00_rf(&rt2x00dev->chip, RF2527)) 837 else if (rt2x00_rf(rt2x00dev, RF2527))
840 rt61pci_config_antenna_2x(rt2x00dev, ant); 838 rt61pci_config_antenna_2x(rt2x00dev, ant);
841 else if (rt2x00_rf(&rt2x00dev->chip, RF2529)) { 839 else if (rt2x00_rf(rt2x00dev, RF2529)) {
842 if (test_bit(CONFIG_DOUBLE_ANTENNA, &rt2x00dev->flags)) 840 if (test_bit(CONFIG_DOUBLE_ANTENNA, &rt2x00dev->flags))
843 rt61pci_config_antenna_2x(rt2x00dev, ant); 841 rt61pci_config_antenna_2x(rt2x00dev, ant);
844 else 842 else
@@ -879,8 +877,7 @@ static void rt61pci_config_channel(struct rt2x00_dev *rt2x00dev,
879 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower)); 877 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
880 rt2x00_set_field32(&rf->rf4, RF4_FREQ_OFFSET, rt2x00dev->freq_offset); 878 rt2x00_set_field32(&rf->rf4, RF4_FREQ_OFFSET, rt2x00dev->freq_offset);
881 879
882 smart = !(rt2x00_rf(&rt2x00dev->chip, RF5225) || 880 smart = !(rt2x00_rf(rt2x00dev, RF5225) || rt2x00_rf(rt2x00dev, RF2527));
883 rt2x00_rf(&rt2x00dev->chip, RF2527));
884 881
885 rt61pci_bbp_read(rt2x00dev, 3, &r3); 882 rt61pci_bbp_read(rt2x00dev, 3, &r3);
886 rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, smart); 883 rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, smart);
@@ -1135,16 +1132,18 @@ dynamic_cca_tune:
1135 */ 1132 */
1136static char *rt61pci_get_firmware_name(struct rt2x00_dev *rt2x00dev) 1133static char *rt61pci_get_firmware_name(struct rt2x00_dev *rt2x00dev)
1137{ 1134{
1135 u16 chip;
1138 char *fw_name; 1136 char *fw_name;
1139 1137
1140 switch (rt2x00dev->chip.rt) { 1138 pci_read_config_word(to_pci_dev(rt2x00dev->dev), PCI_DEVICE_ID, &chip);
1141 case RT2561: 1139 switch (chip) {
1140 case RT2561_PCI_ID:
1142 fw_name = FIRMWARE_RT2561; 1141 fw_name = FIRMWARE_RT2561;
1143 break; 1142 break;
1144 case RT2561s: 1143 case RT2561s_PCI_ID:
1145 fw_name = FIRMWARE_RT2561s; 1144 fw_name = FIRMWARE_RT2561s;
1146 break; 1145 break;
1147 case RT2661: 1146 case RT2661_PCI_ID:
1148 fw_name = FIRMWARE_RT2661; 1147 fw_name = FIRMWARE_RT2661;
1149 break; 1148 break;
1150 default: 1149 default:
@@ -1168,8 +1167,8 @@ static int rt61pci_check_firmware(struct rt2x00_dev *rt2x00dev,
1168 return FW_BAD_LENGTH; 1167 return FW_BAD_LENGTH;
1169 1168
1170 /* 1169 /*
1171 * The last 2 bytes in the firmware array are the crc checksum itself, 1170 * The last 2 bytes in the firmware array are the crc checksum itself.
1172 * this means that we should never pass those 2 bytes to the crc 1171 * This means that we should never pass those 2 bytes to the crc
1173 * algorithm. 1172 * algorithm.
1174 */ 1173 */
1175 fw_crc = (data[len - 2] << 8 | data[len - 1]); 1174 fw_crc = (data[len - 2] << 8 | data[len - 1]);
@@ -1986,7 +1985,7 @@ static void rt61pci_fill_rxdone(struct queue_entry *entry,
1986 1985
1987 /* 1986 /*
1988 * Hardware has stripped IV/EIV data from 802.11 frame during 1987 * Hardware has stripped IV/EIV data from 802.11 frame during
1989 * decryption. It has provided the data seperately but rt2x00lib 1988 * decryption. It has provided the data separately but rt2x00lib
1990 * should decide if it should be reinserted. 1989 * should decide if it should be reinserted.
1991 */ 1990 */
1992 rxdesc->flags |= RX_FLAG_IV_STRIPPED; 1991 rxdesc->flags |= RX_FLAG_IV_STRIPPED;
@@ -2042,7 +2041,7 @@ static void rt61pci_txdone(struct rt2x00_dev *rt2x00dev)
2042 * During each loop we will compare the freshly read 2041 * During each loop we will compare the freshly read
2043 * STA_CSR4 register value with the value read from 2042 * STA_CSR4 register value with the value read from
2044 * the previous loop. If the 2 values are equal then 2043 * the previous loop. If the 2 values are equal then
2045 * we should stop processing because the chance it 2044 * we should stop processing because the chance is
2046 * quite big that the device has been unplugged and 2045 * quite big that the device has been unplugged and
2047 * we risk going into an endless loop. 2046 * we risk going into an endless loop.
2048 */ 2047 */
@@ -2299,12 +2298,13 @@ static int rt61pci_init_eeprom(struct rt2x00_dev *rt2x00dev)
2299 */ 2298 */
2300 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE); 2299 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
2301 rt2x00pci_register_read(rt2x00dev, MAC_CSR0, &reg); 2300 rt2x00pci_register_read(rt2x00dev, MAC_CSR0, &reg);
2302 rt2x00_set_chip_rf(rt2x00dev, value, reg); 2301 rt2x00_set_chip(rt2x00dev, rt2x00_get_field32(reg, MAC_CSR0_CHIPSET),
2302 value, rt2x00_get_field32(reg, MAC_CSR0_REVISION));
2303 2303
2304 if (!rt2x00_rf(&rt2x00dev->chip, RF5225) && 2304 if (!rt2x00_rf(rt2x00dev, RF5225) &&
2305 !rt2x00_rf(&rt2x00dev->chip, RF5325) && 2305 !rt2x00_rf(rt2x00dev, RF5325) &&
2306 !rt2x00_rf(&rt2x00dev->chip, RF2527) && 2306 !rt2x00_rf(rt2x00dev, RF2527) &&
2307 !rt2x00_rf(&rt2x00dev->chip, RF2529)) { 2307 !rt2x00_rf(rt2x00dev, RF2529)) {
2308 ERROR(rt2x00dev, "Invalid RF chipset detected.\n"); 2308 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
2309 return -ENODEV; 2309 return -ENODEV;
2310 } 2310 }
@@ -2330,7 +2330,7 @@ static int rt61pci_init_eeprom(struct rt2x00_dev *rt2x00dev)
2330 __set_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags); 2330 __set_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags);
2331 2331
2332 /* 2332 /*
2333 * Detect if this device has an hardware controlled radio. 2333 * Detect if this device has a hardware controlled radio.
2334 */ 2334 */
2335 if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_HARDWARE_RADIO)) 2335 if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_HARDWARE_RADIO))
2336 __set_bit(CONFIG_SUPPORT_HW_BUTTON, &rt2x00dev->flags); 2336 __set_bit(CONFIG_SUPPORT_HW_BUTTON, &rt2x00dev->flags);
@@ -2355,11 +2355,11 @@ static int rt61pci_init_eeprom(struct rt2x00_dev *rt2x00dev)
2355 __set_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags); 2355 __set_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags);
2356 2356
2357 /* 2357 /*
2358 * When working with a RF2529 chip without double antenna 2358 * When working with a RF2529 chip without double antenna,
2359 * the antenna settings should be gathered from the NIC 2359 * the antenna settings should be gathered from the NIC
2360 * eeprom word. 2360 * eeprom word.
2361 */ 2361 */
2362 if (rt2x00_rf(&rt2x00dev->chip, RF2529) && 2362 if (rt2x00_rf(rt2x00dev, RF2529) &&
2363 !test_bit(CONFIG_DOUBLE_ANTENNA, &rt2x00dev->flags)) { 2363 !test_bit(CONFIG_DOUBLE_ANTENNA, &rt2x00dev->flags)) {
2364 rt2x00dev->default_ant.rx = 2364 rt2x00dev->default_ant.rx =
2365 ANTENNA_A + rt2x00_get_field16(eeprom, EEPROM_NIC_RX_FIXED); 2365 ANTENNA_A + rt2x00_get_field16(eeprom, EEPROM_NIC_RX_FIXED);
@@ -2538,6 +2538,11 @@ static int rt61pci_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
2538 unsigned int i; 2538 unsigned int i;
2539 2539
2540 /* 2540 /*
2541 * Disable powersaving as default.
2542 */
2543 rt2x00dev->hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
2544
2545 /*
2541 * Initialize all hw fields. 2546 * Initialize all hw fields.
2542 */ 2547 */
2543 rt2x00dev->hw->flags = 2548 rt2x00dev->hw->flags =
@@ -2545,7 +2550,6 @@ static int rt61pci_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
2545 IEEE80211_HW_SIGNAL_DBM | 2550 IEEE80211_HW_SIGNAL_DBM |
2546 IEEE80211_HW_SUPPORTS_PS | 2551 IEEE80211_HW_SUPPORTS_PS |
2547 IEEE80211_HW_PS_NULLFUNC_STACK; 2552 IEEE80211_HW_PS_NULLFUNC_STACK;
2548 rt2x00dev->hw->extra_tx_headroom = 0;
2549 2553
2550 SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev); 2554 SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
2551 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw, 2555 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
@@ -2566,8 +2570,7 @@ static int rt61pci_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
2566 spec->channels = rf_vals_seq; 2570 spec->channels = rf_vals_seq;
2567 } 2571 }
2568 2572
2569 if (rt2x00_rf(&rt2x00dev->chip, RF5225) || 2573 if (rt2x00_rf(rt2x00dev, RF5225) || rt2x00_rf(rt2x00dev, RF5325)) {
2570 rt2x00_rf(&rt2x00dev->chip, RF5325)) {
2571 spec->supported_bands |= SUPPORT_BAND_5GHZ; 2574 spec->supported_bands |= SUPPORT_BAND_5GHZ;
2572 spec->num_channels = ARRAY_SIZE(rf_vals_seq); 2575 spec->num_channels = ARRAY_SIZE(rf_vals_seq);
2573 } 2576 }
@@ -2668,7 +2671,7 @@ static int rt61pci_conf_tx(struct ieee80211_hw *hw, u16 queue_idx,
2668 2671
2669 /* 2672 /*
2670 * We only need to perform additional register initialization 2673 * We only need to perform additional register initialization
2671 * for WMM queues/ 2674 * for WMM queues.
2672 */ 2675 */
2673 if (queue_idx >= 4) 2676 if (queue_idx >= 4)
2674 return 0; 2677 return 0;
@@ -2730,7 +2733,6 @@ static const struct ieee80211_ops rt61pci_mac80211_ops = {
2730 .get_stats = rt2x00mac_get_stats, 2733 .get_stats = rt2x00mac_get_stats,
2731 .bss_info_changed = rt2x00mac_bss_info_changed, 2734 .bss_info_changed = rt2x00mac_bss_info_changed,
2732 .conf_tx = rt61pci_conf_tx, 2735 .conf_tx = rt61pci_conf_tx,
2733 .get_tx_stats = rt2x00mac_get_tx_stats,
2734 .get_tsf = rt61pci_get_tsf, 2736 .get_tsf = rt61pci_get_tsf,
2735 .rfkill_poll = rt2x00mac_rfkill_poll, 2737 .rfkill_poll = rt2x00mac_rfkill_poll,
2736}; 2738};
@@ -2787,26 +2789,27 @@ static const struct data_queue_desc rt61pci_queue_bcn = {
2787}; 2789};
2788 2790
2789static const struct rt2x00_ops rt61pci_ops = { 2791static const struct rt2x00_ops rt61pci_ops = {
2790 .name = KBUILD_MODNAME, 2792 .name = KBUILD_MODNAME,
2791 .max_sta_intf = 1, 2793 .max_sta_intf = 1,
2792 .max_ap_intf = 4, 2794 .max_ap_intf = 4,
2793 .eeprom_size = EEPROM_SIZE, 2795 .eeprom_size = EEPROM_SIZE,
2794 .rf_size = RF_SIZE, 2796 .rf_size = RF_SIZE,
2795 .tx_queues = NUM_TX_QUEUES, 2797 .tx_queues = NUM_TX_QUEUES,
2796 .rx = &rt61pci_queue_rx, 2798 .extra_tx_headroom = 0,
2797 .tx = &rt61pci_queue_tx, 2799 .rx = &rt61pci_queue_rx,
2798 .bcn = &rt61pci_queue_bcn, 2800 .tx = &rt61pci_queue_tx,
2799 .lib = &rt61pci_rt2x00_ops, 2801 .bcn = &rt61pci_queue_bcn,
2800 .hw = &rt61pci_mac80211_ops, 2802 .lib = &rt61pci_rt2x00_ops,
2803 .hw = &rt61pci_mac80211_ops,
2801#ifdef CONFIG_RT2X00_LIB_DEBUGFS 2804#ifdef CONFIG_RT2X00_LIB_DEBUGFS
2802 .debugfs = &rt61pci_rt2x00debug, 2805 .debugfs = &rt61pci_rt2x00debug,
2803#endif /* CONFIG_RT2X00_LIB_DEBUGFS */ 2806#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
2804}; 2807};
2805 2808
2806/* 2809/*
2807 * RT61pci module information. 2810 * RT61pci module information.
2808 */ 2811 */
2809static struct pci_device_id rt61pci_device_table[] = { 2812static DEFINE_PCI_DEVICE_TABLE(rt61pci_device_table) = {
2810 /* RT2561s */ 2813 /* RT2561s */
2811 { PCI_DEVICE(0x1814, 0x0301), PCI_DEVICE_DATA(&rt61pci_ops) }, 2814 { PCI_DEVICE(0x1814, 0x0301), PCI_DEVICE_DATA(&rt61pci_ops) },
2812 /* RT2561 v2 */ 2815 /* RT2561 v2 */