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authorBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2009-11-04 12:33:57 -0500
committerJohn W. Linville <linville@tuxdriver.com>2009-11-06 16:48:50 -0500
commit3e2c9df7b940c8d1d0626f61038e10a32d65f27d (patch)
tree65061af4d0b74bff13ca08b29748f80c31ec61bf /drivers/net/wireless/rt2x00/rt2800pci.c
parenteff6eced615f80cef3e4979691c7920961dda47c (diff)
rt2800pci: add rt2800_bbp_[read,write]() wrappers
Part of preparations for later code unification. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Acked-by: Ivo van Doorn <IvDoorn@gmail.com> Acked-by: Gertjan van Wingerde <gwingerde@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/rt2x00/rt2800pci.c')
-rw-r--r--drivers/net/wireless/rt2x00/rt2800pci.c138
1 files changed, 75 insertions, 63 deletions
diff --git a/drivers/net/wireless/rt2x00/rt2800pci.c b/drivers/net/wireless/rt2x00/rt2800pci.c
index cb55e6d10b67..12344fd02b3b 100644
--- a/drivers/net/wireless/rt2x00/rt2800pci.c
+++ b/drivers/net/wireless/rt2x00/rt2800pci.c
@@ -135,6 +135,18 @@ static void rt2800pci_bbp_read(struct rt2x00_dev *rt2x00dev,
135 mutex_unlock(&rt2x00dev->csr_mutex); 135 mutex_unlock(&rt2x00dev->csr_mutex);
136} 136}
137 137
138static inline void rt2800_bbp_write(struct rt2x00_dev *rt2x00dev,
139 const unsigned int word, const u8 value)
140{
141 rt2800pci_bbp_write(rt2x00dev, word, value);
142}
143
144static inline void rt2800_bbp_read(struct rt2x00_dev *rt2x00dev,
145 const unsigned int word, u8 *value)
146{
147 rt2800pci_bbp_read(rt2x00dev, word, value);
148}
149
138static void rt2800pci_rfcsr_write(struct rt2x00_dev *rt2x00dev, 150static void rt2800pci_rfcsr_write(struct rt2x00_dev *rt2x00dev,
139 const unsigned int word, const u8 value) 151 const unsigned int word, const u8 value)
140{ 152{
@@ -399,8 +411,8 @@ static const struct rt2x00debug rt2800pci_rt2x00debug = {
399 .word_count = EEPROM_SIZE / sizeof(u16), 411 .word_count = EEPROM_SIZE / sizeof(u16),
400 }, 412 },
401 .bbp = { 413 .bbp = {
402 .read = rt2800pci_bbp_read, 414 .read = rt2800_bbp_read,
403 .write = rt2800pci_bbp_write, 415 .write = rt2800_bbp_write,
404 .word_base = BBP_BASE, 416 .word_base = BBP_BASE,
405 .word_size = sizeof(u8), 417 .word_size = sizeof(u8),
406 .word_count = BBP_SIZE / sizeof(u8), 418 .word_count = BBP_SIZE / sizeof(u8),
@@ -766,8 +778,8 @@ static void rt2800pci_config_ant(struct rt2x00_dev *rt2x00dev,
766 u8 r1; 778 u8 r1;
767 u8 r3; 779 u8 r3;
768 780
769 rt2800pci_bbp_read(rt2x00dev, 1, &r1); 781 rt2800_bbp_read(rt2x00dev, 1, &r1);
770 rt2800pci_bbp_read(rt2x00dev, 3, &r3); 782 rt2800_bbp_read(rt2x00dev, 3, &r3);
771 783
772 /* 784 /*
773 * Configure the TX antenna. 785 * Configure the TX antenna.
@@ -800,8 +812,8 @@ static void rt2800pci_config_ant(struct rt2x00_dev *rt2x00dev,
800 break; 812 break;
801 } 813 }
802 814
803 rt2800pci_bbp_write(rt2x00dev, 3, r3); 815 rt2800_bbp_write(rt2x00dev, 3, r3);
804 rt2800pci_bbp_write(rt2x00dev, 1, r1); 816 rt2800_bbp_write(rt2x00dev, 1, r1);
805} 817}
806 818
807static void rt2800pci_config_lna_gain(struct rt2x00_dev *rt2x00dev, 819static void rt2800pci_config_lna_gain(struct rt2x00_dev *rt2x00dev,
@@ -944,26 +956,26 @@ static void rt2800pci_config_channel(struct rt2x00_dev *rt2x00dev,
944 /* 956 /*
945 * Change BBP settings 957 * Change BBP settings
946 */ 958 */
947 rt2800pci_bbp_write(rt2x00dev, 62, 0x37 - rt2x00dev->lna_gain); 959 rt2800_bbp_write(rt2x00dev, 62, 0x37 - rt2x00dev->lna_gain);
948 rt2800pci_bbp_write(rt2x00dev, 63, 0x37 - rt2x00dev->lna_gain); 960 rt2800_bbp_write(rt2x00dev, 63, 0x37 - rt2x00dev->lna_gain);
949 rt2800pci_bbp_write(rt2x00dev, 64, 0x37 - rt2x00dev->lna_gain); 961 rt2800_bbp_write(rt2x00dev, 64, 0x37 - rt2x00dev->lna_gain);
950 rt2800pci_bbp_write(rt2x00dev, 86, 0); 962 rt2800_bbp_write(rt2x00dev, 86, 0);
951 963
952 if (rf->channel <= 14) { 964 if (rf->channel <= 14) {
953 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags)) { 965 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags)) {
954 rt2800pci_bbp_write(rt2x00dev, 82, 0x62); 966 rt2800_bbp_write(rt2x00dev, 82, 0x62);
955 rt2800pci_bbp_write(rt2x00dev, 75, 0x46); 967 rt2800_bbp_write(rt2x00dev, 75, 0x46);
956 } else { 968 } else {
957 rt2800pci_bbp_write(rt2x00dev, 82, 0x84); 969 rt2800_bbp_write(rt2x00dev, 82, 0x84);
958 rt2800pci_bbp_write(rt2x00dev, 75, 0x50); 970 rt2800_bbp_write(rt2x00dev, 75, 0x50);
959 } 971 }
960 } else { 972 } else {
961 rt2800pci_bbp_write(rt2x00dev, 82, 0xf2); 973 rt2800_bbp_write(rt2x00dev, 82, 0xf2);
962 974
963 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags)) 975 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags))
964 rt2800pci_bbp_write(rt2x00dev, 75, 0x46); 976 rt2800_bbp_write(rt2x00dev, 75, 0x46);
965 else 977 else
966 rt2800pci_bbp_write(rt2x00dev, 75, 0x50); 978 rt2800_bbp_write(rt2x00dev, 75, 0x50);
967 } 979 }
968 980
969 rt2800_register_read(rt2x00dev, TX_BAND_CFG, &reg); 981 rt2800_register_read(rt2x00dev, TX_BAND_CFG, &reg);
@@ -995,23 +1007,23 @@ static void rt2800pci_config_channel(struct rt2x00_dev *rt2x00dev,
995 1007
996 rt2800_register_write(rt2x00dev, TX_PIN_CFG, tx_pin); 1008 rt2800_register_write(rt2x00dev, TX_PIN_CFG, tx_pin);
997 1009
998 rt2800pci_bbp_read(rt2x00dev, 4, &bbp); 1010 rt2800_bbp_read(rt2x00dev, 4, &bbp);
999 rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 2 * conf_is_ht40(conf)); 1011 rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 2 * conf_is_ht40(conf));
1000 rt2800pci_bbp_write(rt2x00dev, 4, bbp); 1012 rt2800_bbp_write(rt2x00dev, 4, bbp);
1001 1013
1002 rt2800pci_bbp_read(rt2x00dev, 3, &bbp); 1014 rt2800_bbp_read(rt2x00dev, 3, &bbp);
1003 rt2x00_set_field8(&bbp, BBP3_HT40_PLUS, conf_is_ht40_plus(conf)); 1015 rt2x00_set_field8(&bbp, BBP3_HT40_PLUS, conf_is_ht40_plus(conf));
1004 rt2800pci_bbp_write(rt2x00dev, 3, bbp); 1016 rt2800_bbp_write(rt2x00dev, 3, bbp);
1005 1017
1006 if (rt2x00_rev(&rt2x00dev->chip) == RT2860C_VERSION) { 1018 if (rt2x00_rev(&rt2x00dev->chip) == RT2860C_VERSION) {
1007 if (conf_is_ht40(conf)) { 1019 if (conf_is_ht40(conf)) {
1008 rt2800pci_bbp_write(rt2x00dev, 69, 0x1a); 1020 rt2800_bbp_write(rt2x00dev, 69, 0x1a);
1009 rt2800pci_bbp_write(rt2x00dev, 70, 0x0a); 1021 rt2800_bbp_write(rt2x00dev, 70, 0x0a);
1010 rt2800pci_bbp_write(rt2x00dev, 73, 0x16); 1022 rt2800_bbp_write(rt2x00dev, 73, 0x16);
1011 } else { 1023 } else {
1012 rt2800pci_bbp_write(rt2x00dev, 69, 0x16); 1024 rt2800_bbp_write(rt2x00dev, 69, 0x16);
1013 rt2800pci_bbp_write(rt2x00dev, 70, 0x08); 1025 rt2800_bbp_write(rt2x00dev, 70, 0x08);
1014 rt2800pci_bbp_write(rt2x00dev, 73, 0x11); 1026 rt2800_bbp_write(rt2x00dev, 73, 0x11);
1015 } 1027 }
1016 } 1028 }
1017 1029
@@ -1025,9 +1037,9 @@ static void rt2800pci_config_txpower(struct rt2x00_dev *rt2x00dev,
1025 u32 value = TXPOWER_G_TO_DEV(txpower); 1037 u32 value = TXPOWER_G_TO_DEV(txpower);
1026 u8 r1; 1038 u8 r1;
1027 1039
1028 rt2800pci_bbp_read(rt2x00dev, 1, &r1); 1040 rt2800_bbp_read(rt2x00dev, 1, &r1);
1029 rt2x00_set_field8(&reg, BBP1_TX_POWER, 0); 1041 rt2x00_set_field8(&reg, BBP1_TX_POWER, 0);
1030 rt2800pci_bbp_write(rt2x00dev, 1, r1); 1042 rt2800_bbp_write(rt2x00dev, 1, r1);
1031 1043
1032 rt2800_register_read(rt2x00dev, TX_PWR_CFG_0, &reg); 1044 rt2800_register_read(rt2x00dev, TX_PWR_CFG_0, &reg);
1033 rt2x00_set_field32(&reg, TX_PWR_CFG_0_1MBS, value); 1045 rt2x00_set_field32(&reg, TX_PWR_CFG_0_1MBS, value);
@@ -1176,7 +1188,7 @@ static inline void rt2800pci_set_vgc(struct rt2x00_dev *rt2x00dev,
1176 struct link_qual *qual, u8 vgc_level) 1188 struct link_qual *qual, u8 vgc_level)
1177{ 1189{
1178 if (qual->vgc_level != vgc_level) { 1190 if (qual->vgc_level != vgc_level) {
1179 rt2800pci_bbp_write(rt2x00dev, 66, vgc_level); 1191 rt2800_bbp_write(rt2x00dev, 66, vgc_level);
1180 qual->vgc_level = vgc_level; 1192 qual->vgc_level = vgc_level;
1181 qual->vgc_level_reg = vgc_level; 1193 qual->vgc_level_reg = vgc_level;
1182 } 1194 }
@@ -1720,7 +1732,7 @@ static int rt2800pci_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
1720 msleep(1); 1732 msleep(1);
1721 1733
1722 for (i = 0; i < REGISTER_BUSY_COUNT; i++) { 1734 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1723 rt2800pci_bbp_read(rt2x00dev, 0, &value); 1735 rt2800_bbp_read(rt2x00dev, 0, &value);
1724 if ((value != 0xff) && (value != 0x00)) 1736 if ((value != 0xff) && (value != 0x00))
1725 return 0; 1737 return 0;
1726 udelay(REGISTER_BUSY_DELAY); 1738 udelay(REGISTER_BUSY_DELAY);
@@ -1741,33 +1753,33 @@ static int rt2800pci_init_bbp(struct rt2x00_dev *rt2x00dev)
1741 rt2800pci_wait_bbp_ready(rt2x00dev))) 1753 rt2800pci_wait_bbp_ready(rt2x00dev)))
1742 return -EACCES; 1754 return -EACCES;
1743 1755
1744 rt2800pci_bbp_write(rt2x00dev, 65, 0x2c); 1756 rt2800_bbp_write(rt2x00dev, 65, 0x2c);
1745 rt2800pci_bbp_write(rt2x00dev, 66, 0x38); 1757 rt2800_bbp_write(rt2x00dev, 66, 0x38);
1746 rt2800pci_bbp_write(rt2x00dev, 69, 0x12); 1758 rt2800_bbp_write(rt2x00dev, 69, 0x12);
1747 rt2800pci_bbp_write(rt2x00dev, 70, 0x0a); 1759 rt2800_bbp_write(rt2x00dev, 70, 0x0a);
1748 rt2800pci_bbp_write(rt2x00dev, 73, 0x10); 1760 rt2800_bbp_write(rt2x00dev, 73, 0x10);
1749 rt2800pci_bbp_write(rt2x00dev, 81, 0x37); 1761 rt2800_bbp_write(rt2x00dev, 81, 0x37);
1750 rt2800pci_bbp_write(rt2x00dev, 82, 0x62); 1762 rt2800_bbp_write(rt2x00dev, 82, 0x62);
1751 rt2800pci_bbp_write(rt2x00dev, 83, 0x6a); 1763 rt2800_bbp_write(rt2x00dev, 83, 0x6a);
1752 rt2800pci_bbp_write(rt2x00dev, 84, 0x99); 1764 rt2800_bbp_write(rt2x00dev, 84, 0x99);
1753 rt2800pci_bbp_write(rt2x00dev, 86, 0x00); 1765 rt2800_bbp_write(rt2x00dev, 86, 0x00);
1754 rt2800pci_bbp_write(rt2x00dev, 91, 0x04); 1766 rt2800_bbp_write(rt2x00dev, 91, 0x04);
1755 rt2800pci_bbp_write(rt2x00dev, 92, 0x00); 1767 rt2800_bbp_write(rt2x00dev, 92, 0x00);
1756 rt2800pci_bbp_write(rt2x00dev, 103, 0x00); 1768 rt2800_bbp_write(rt2x00dev, 103, 0x00);
1757 rt2800pci_bbp_write(rt2x00dev, 105, 0x05); 1769 rt2800_bbp_write(rt2x00dev, 105, 0x05);
1758 1770
1759 if (rt2x00_rev(&rt2x00dev->chip) == RT2860C_VERSION) { 1771 if (rt2x00_rev(&rt2x00dev->chip) == RT2860C_VERSION) {
1760 rt2800pci_bbp_write(rt2x00dev, 69, 0x16); 1772 rt2800_bbp_write(rt2x00dev, 69, 0x16);
1761 rt2800pci_bbp_write(rt2x00dev, 73, 0x12); 1773 rt2800_bbp_write(rt2x00dev, 73, 0x12);
1762 } 1774 }
1763 1775
1764 if (rt2x00_rev(&rt2x00dev->chip) > RT2860D_VERSION) 1776 if (rt2x00_rev(&rt2x00dev->chip) > RT2860D_VERSION)
1765 rt2800pci_bbp_write(rt2x00dev, 84, 0x19); 1777 rt2800_bbp_write(rt2x00dev, 84, 0x19);
1766 1778
1767 if (rt2x00_rt(&rt2x00dev->chip, RT3052)) { 1779 if (rt2x00_rt(&rt2x00dev->chip, RT3052)) {
1768 rt2800pci_bbp_write(rt2x00dev, 31, 0x08); 1780 rt2800_bbp_write(rt2x00dev, 31, 0x08);
1769 rt2800pci_bbp_write(rt2x00dev, 78, 0x0e); 1781 rt2800_bbp_write(rt2x00dev, 78, 0x0e);
1770 rt2800pci_bbp_write(rt2x00dev, 80, 0x08); 1782 rt2800_bbp_write(rt2x00dev, 80, 0x08);
1771 } 1783 }
1772 1784
1773 for (i = 0; i < EEPROM_BBP_SIZE; i++) { 1785 for (i = 0; i < EEPROM_BBP_SIZE; i++) {
@@ -1776,7 +1788,7 @@ static int rt2800pci_init_bbp(struct rt2x00_dev *rt2x00dev)
1776 if (eeprom != 0xffff && eeprom != 0x0000) { 1788 if (eeprom != 0xffff && eeprom != 0x0000) {
1777 reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID); 1789 reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
1778 value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE); 1790 value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
1779 rt2800pci_bbp_write(rt2x00dev, reg_id, value); 1791 rt2800_bbp_write(rt2x00dev, reg_id, value);
1780 } 1792 }
1781 } 1793 }
1782 1794
@@ -1795,9 +1807,9 @@ static u8 rt2800pci_init_rx_filter(struct rt2x00_dev *rt2x00dev,
1795 1807
1796 rt2800pci_rfcsr_write(rt2x00dev, 24, rfcsr24); 1808 rt2800pci_rfcsr_write(rt2x00dev, 24, rfcsr24);
1797 1809
1798 rt2800pci_bbp_read(rt2x00dev, 4, &bbp); 1810 rt2800_bbp_read(rt2x00dev, 4, &bbp);
1799 rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 2 * bw40); 1811 rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 2 * bw40);
1800 rt2800pci_bbp_write(rt2x00dev, 4, bbp); 1812 rt2800_bbp_write(rt2x00dev, 4, bbp);
1801 1813
1802 rt2800pci_rfcsr_read(rt2x00dev, 22, &rfcsr); 1814 rt2800pci_rfcsr_read(rt2x00dev, 22, &rfcsr);
1803 rt2x00_set_field8(&rfcsr, RFCSR22_BASEBAND_LOOPBACK, 1); 1815 rt2x00_set_field8(&rfcsr, RFCSR22_BASEBAND_LOOPBACK, 1);
@@ -1806,13 +1818,13 @@ static u8 rt2800pci_init_rx_filter(struct rt2x00_dev *rt2x00dev,
1806 /* 1818 /*
1807 * Set power & frequency of passband test tone 1819 * Set power & frequency of passband test tone
1808 */ 1820 */
1809 rt2800pci_bbp_write(rt2x00dev, 24, 0); 1821 rt2800_bbp_write(rt2x00dev, 24, 0);
1810 1822
1811 for (i = 0; i < 100; i++) { 1823 for (i = 0; i < 100; i++) {
1812 rt2800pci_bbp_write(rt2x00dev, 25, 0x90); 1824 rt2800_bbp_write(rt2x00dev, 25, 0x90);
1813 msleep(1); 1825 msleep(1);
1814 1826
1815 rt2800pci_bbp_read(rt2x00dev, 55, &passband); 1827 rt2800_bbp_read(rt2x00dev, 55, &passband);
1816 if (passband) 1828 if (passband)
1817 break; 1829 break;
1818 } 1830 }
@@ -1820,13 +1832,13 @@ static u8 rt2800pci_init_rx_filter(struct rt2x00_dev *rt2x00dev,
1820 /* 1832 /*
1821 * Set power & frequency of stopband test tone 1833 * Set power & frequency of stopband test tone
1822 */ 1834 */
1823 rt2800pci_bbp_write(rt2x00dev, 24, 0x06); 1835 rt2800_bbp_write(rt2x00dev, 24, 0x06);
1824 1836
1825 for (i = 0; i < 100; i++) { 1837 for (i = 0; i < 100; i++) {
1826 rt2800pci_bbp_write(rt2x00dev, 25, 0x90); 1838 rt2800_bbp_write(rt2x00dev, 25, 0x90);
1827 msleep(1); 1839 msleep(1);
1828 1840
1829 rt2800pci_bbp_read(rt2x00dev, 55, &stopband); 1841 rt2800_bbp_read(rt2x00dev, 55, &stopband);
1830 1842
1831 if ((passband - stopband) <= filter_target) { 1843 if ((passband - stopband) <= filter_target) {
1832 rfcsr24++; 1844 rfcsr24++;
@@ -1905,7 +1917,7 @@ static int rt2800pci_init_rfcsr(struct rt2x00_dev *rt2x00dev)
1905 /* 1917 /*
1906 * Set back to initial state 1918 * Set back to initial state
1907 */ 1919 */
1908 rt2800pci_bbp_write(rt2x00dev, 24, 0); 1920 rt2800_bbp_write(rt2x00dev, 24, 0);
1909 1921
1910 rt2800pci_rfcsr_read(rt2x00dev, 22, &rfcsr); 1922 rt2800pci_rfcsr_read(rt2x00dev, 22, &rfcsr);
1911 rt2x00_set_field8(&rfcsr, RFCSR22_BASEBAND_LOOPBACK, 0); 1923 rt2x00_set_field8(&rfcsr, RFCSR22_BASEBAND_LOOPBACK, 0);
@@ -1914,9 +1926,9 @@ static int rt2800pci_init_rfcsr(struct rt2x00_dev *rt2x00dev)
1914 /* 1926 /*
1915 * set BBP back to BW20 1927 * set BBP back to BW20
1916 */ 1928 */
1917 rt2800pci_bbp_read(rt2x00dev, 4, &bbp); 1929 rt2800_bbp_read(rt2x00dev, 4, &bbp);
1918 rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 0); 1930 rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 0);
1919 rt2800pci_bbp_write(rt2x00dev, 4, bbp); 1931 rt2800_bbp_write(rt2x00dev, 4, bbp);
1920 1932
1921 return 0; 1933 return 0;
1922} 1934}