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authorHelmut Schaa <helmut.schaa@googlemail.com>2010-12-13 06:33:36 -0500
committerJohn W. Linville <linville@tuxdriver.com>2010-12-13 15:23:34 -0500
commit89b25f60e08180d7e00e6239398b467142aaec01 (patch)
tree7c8dd38055d85a9b062b524353835ad162a02a69 /drivers/net/wireless/rt2x00/rt2500pci.c
parenta061a93b6eb8db8227b251666436da1e344771a0 (diff)
rt2x00: Don't frequently reset beacon interval in AdHoc mode
Commit 0204464329c17ba6d293e1899f71223599a0e582 "Check for specific changed flags when updating the erp config" changed the way in which a new beacon interval gets handled. However, due to a bug in rt2800usb and rt2800pci the beacon interval was reset during each scan, thus causing problems in AdHoc mode. Fix this by not cleaning up the beacon interval when killing the beacon queue but just prevent the device from sending out beacons. Reported-by: Wolfgang Kufner <wolfgang.kufner@gmail.com> Signed-off-by: Helmut Schaa <helmut.schaa@googlemail.com> Acked-by: Gertjan van Wingerde <gwingerde@gmail.com> Signed-off-by: Ivo van Doorn <IvDoorn@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/rt2x00/rt2500pci.c')
-rw-r--r--drivers/net/wireless/rt2x00/rt2500pci.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/net/wireless/rt2x00/rt2500pci.c b/drivers/net/wireless/rt2x00/rt2500pci.c
index 3e7f20346243..ce9212f28207 100644
--- a/drivers/net/wireless/rt2x00/rt2500pci.c
+++ b/drivers/net/wireless/rt2x00/rt2500pci.c
@@ -1294,7 +1294,11 @@ static void rt2500pci_kill_tx_queue(struct data_queue *queue)
1294 u32 reg; 1294 u32 reg;
1295 1295
1296 if (queue->qid == QID_BEACON) { 1296 if (queue->qid == QID_BEACON) {
1297 rt2x00pci_register_write(rt2x00dev, CSR14, 0); 1297 rt2x00pci_register_read(rt2x00dev, CSR14, &reg);
1298 rt2x00_set_field32(&reg, CSR14_TSF_COUNT, 0);
1299 rt2x00_set_field32(&reg, CSR14_TBCN, 0);
1300 rt2x00_set_field32(&reg, CSR14_BEACON_GEN, 0);
1301 rt2x00pci_register_write(rt2x00dev, CSR14, reg);
1298 } else { 1302 } else {
1299 rt2x00pci_register_read(rt2x00dev, TXCSR0, &reg); 1303 rt2x00pci_register_read(rt2x00dev, TXCSR0, &reg);
1300 rt2x00_set_field32(&reg, TXCSR0_ABORT, 1); 1304 rt2x00_set_field32(&reg, TXCSR0_ABORT, 1);