diff options
author | Lennert Buytenhek <buytenh@wantstofly.org> | 2009-07-16 07:49:55 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2009-08-20 11:38:03 -0400 |
commit | c23b5a699471ea2ef9d146eae80e64836cfbf001 (patch) | |
tree | f604ff0b7e900b110060f380c5b5ef73beab4d2e /drivers/net/wireless/mwl8k.c | |
parent | 22e66a4c15b063aee5d03991c4b9629a3b0c4556 (diff) |
mwl8k: remove various unused struct members and defines
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/mwl8k.c')
-rw-r--r-- | drivers/net/wireless/mwl8k.c | 73 |
1 files changed, 8 insertions, 65 deletions
diff --git a/drivers/net/wireless/mwl8k.c b/drivers/net/wireless/mwl8k.c index c32e93c8c410..91b7062711e7 100644 --- a/drivers/net/wireless/mwl8k.c +++ b/drivers/net/wireless/mwl8k.c | |||
@@ -58,7 +58,6 @@ MODULE_DEVICE_TABLE(pci, mwl8k_table); | |||
58 | #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28 | 58 | #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28 |
59 | #define MWL8K_H2A_INT_DUMMY (1 << 20) | 59 | #define MWL8K_H2A_INT_DUMMY (1 << 20) |
60 | #define MWL8K_H2A_INT_RESET (1 << 15) | 60 | #define MWL8K_H2A_INT_RESET (1 << 15) |
61 | #define MWL8K_H2A_INT_PS (1 << 2) | ||
62 | #define MWL8K_H2A_INT_DOORBELL (1 << 1) | 61 | #define MWL8K_H2A_INT_DOORBELL (1 << 1) |
63 | #define MWL8K_H2A_INT_PPA_READY (1 << 0) | 62 | #define MWL8K_H2A_INT_PPA_READY (1 << 0) |
64 | 63 | ||
@@ -161,10 +160,8 @@ struct mwl8k_priv { | |||
161 | 160 | ||
162 | /* lock held over TX and TX reap */ | 161 | /* lock held over TX and TX reap */ |
163 | spinlock_t tx_lock; | 162 | spinlock_t tx_lock; |
164 | u32 int_mask; | ||
165 | 163 | ||
166 | struct ieee80211_vif *vif; | 164 | struct ieee80211_vif *vif; |
167 | struct list_head vif_list; | ||
168 | 165 | ||
169 | struct ieee80211_channel *current_channel; | 166 | struct ieee80211_channel *current_channel; |
170 | 167 | ||
@@ -173,10 +170,8 @@ struct mwl8k_priv { | |||
173 | dma_addr_t cookie_dma; | 170 | dma_addr_t cookie_dma; |
174 | 171 | ||
175 | u16 num_mcaddrs; | 172 | u16 num_mcaddrs; |
176 | u16 region_code; | ||
177 | u8 hw_rev; | 173 | u8 hw_rev; |
178 | __le32 fw_rev; | 174 | __le32 fw_rev; |
179 | u32 wep_enabled; | ||
180 | 175 | ||
181 | /* | 176 | /* |
182 | * Running count of TX packets in flight, to avoid | 177 | * Running count of TX packets in flight, to avoid |
@@ -226,8 +221,6 @@ struct mwl8k_priv { | |||
226 | 221 | ||
227 | /* Per interface specific private data */ | 222 | /* Per interface specific private data */ |
228 | struct mwl8k_vif { | 223 | struct mwl8k_vif { |
229 | struct list_head node; | ||
230 | |||
231 | /* backpointer to parent config block */ | 224 | /* backpointer to parent config block */ |
232 | struct mwl8k_priv *priv; | 225 | struct mwl8k_priv *priv; |
233 | 226 | ||
@@ -247,18 +240,11 @@ struct mwl8k_vif { | |||
247 | /* number of supported legacy rates */ | 240 | /* number of supported legacy rates */ |
248 | u8 legacy_nrates; | 241 | u8 legacy_nrates; |
249 | 242 | ||
250 | /* Number of supported MCS rates. Work in progress */ | ||
251 | u8 mcs_nrates; | ||
252 | |||
253 | /* Index into station database.Returned by update_sta_db call */ | 243 | /* Index into station database.Returned by update_sta_db call */ |
254 | u8 peer_id; | 244 | u8 peer_id; |
255 | 245 | ||
256 | /* Non AMPDU sequence number assigned by driver */ | 246 | /* Non AMPDU sequence number assigned by driver */ |
257 | u16 seqno; | 247 | u16 seqno; |
258 | |||
259 | /* Note:There is no channel info, | ||
260 | * refer to the master channel info in priv | ||
261 | */ | ||
262 | }; | 248 | }; |
263 | 249 | ||
264 | #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv)) | 250 | #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv)) |
@@ -681,11 +667,9 @@ struct ewc_ht_info { | |||
681 | 667 | ||
682 | /* Peer Entry flags - used to define the type of the peer node */ | 668 | /* Peer Entry flags - used to define the type of the peer node */ |
683 | #define MWL8K_PEER_TYPE_ACCESSPOINT 2 | 669 | #define MWL8K_PEER_TYPE_ACCESSPOINT 2 |
684 | #define MWL8K_PEER_TYPE_ADHOC_STATION 4 | ||
685 | 670 | ||
686 | #define MWL8K_IEEE_LEGACY_DATA_RATES 12 | 671 | #define MWL8K_IEEE_LEGACY_DATA_RATES 12 |
687 | #define MWL8K_MCS_BITMAP_SIZE 16 | 672 | #define MWL8K_MCS_BITMAP_SIZE 16 |
688 | #define pad_size 16 | ||
689 | 673 | ||
690 | struct peer_capability_info { | 674 | struct peer_capability_info { |
691 | /* Peer type - AP vs. STA. */ | 675 | /* Peer type - AP vs. STA. */ |
@@ -707,7 +691,7 @@ struct peer_capability_info { | |||
707 | 691 | ||
708 | /* HT rate table. Intersection of our rates and peer rates. */ | 692 | /* HT rate table. Intersection of our rates and peer rates. */ |
709 | __u8 ht_rates[MWL8K_MCS_BITMAP_SIZE]; | 693 | __u8 ht_rates[MWL8K_MCS_BITMAP_SIZE]; |
710 | __u8 pad[pad_size]; | 694 | __u8 pad[16]; |
711 | 695 | ||
712 | /* If set, interoperability mode, no proprietary extensions. */ | 696 | /* If set, interoperability mode, no proprietary extensions. */ |
713 | __u8 interop; | 697 | __u8 interop; |
@@ -717,15 +701,6 @@ struct peer_capability_info { | |||
717 | } __attribute__((packed)); | 701 | } __attribute__((packed)); |
718 | 702 | ||
719 | /* Inline functions to manipulate QoS field in data descriptor. */ | 703 | /* Inline functions to manipulate QoS field in data descriptor. */ |
720 | static inline u16 mwl8k_qos_setbit_tid(u16 qos, u8 tid) | ||
721 | { | ||
722 | u16 val_mask = 0x000f; | ||
723 | u16 qos_mask = ~val_mask; | ||
724 | |||
725 | /* TID bits 0-3 */ | ||
726 | return (qos & qos_mask) | (tid & val_mask); | ||
727 | } | ||
728 | |||
729 | static inline u16 mwl8k_qos_setbit_eosp(u16 qos) | 704 | static inline u16 mwl8k_qos_setbit_eosp(u16 qos) |
730 | { | 705 | { |
731 | u16 val_mask = 1 << 4; | 706 | u16 val_mask = 1 << 4; |
@@ -826,9 +801,7 @@ static inline struct sk_buff *mwl8k_add_dma_header(struct sk_buff *skb) | |||
826 | /* | 801 | /* |
827 | * Packet reception. | 802 | * Packet reception. |
828 | */ | 803 | */ |
829 | #define MWL8K_RX_CTRL_KEY_INDEX_MASK 0x30 | ||
830 | #define MWL8K_RX_CTRL_OWNED_BY_HOST 0x02 | 804 | #define MWL8K_RX_CTRL_OWNED_BY_HOST 0x02 |
831 | #define MWL8K_RX_CTRL_AMPDU 0x01 | ||
832 | 805 | ||
833 | struct mwl8k_rx_desc { | 806 | struct mwl8k_rx_desc { |
834 | __le16 pkt_len; | 807 | __le16 pkt_len; |
@@ -1073,8 +1046,6 @@ enum { | |||
1073 | 1046 | ||
1074 | /* Transmit packet ACK policy */ | 1047 | /* Transmit packet ACK policy */ |
1075 | #define MWL8K_TXD_ACK_POLICY_NORMAL 0 | 1048 | #define MWL8K_TXD_ACK_POLICY_NORMAL 0 |
1076 | #define MWL8K_TXD_ACK_POLICY_NONE 1 | ||
1077 | #define MWL8K_TXD_ACK_POLICY_NO_EXPLICIT 2 | ||
1078 | #define MWL8K_TXD_ACK_POLICY_BLOCKACK 3 | 1049 | #define MWL8K_TXD_ACK_POLICY_BLOCKACK 3 |
1079 | 1050 | ||
1080 | #define GET_TXQ(_ac) (\ | 1051 | #define GET_TXQ(_ac) (\ |
@@ -1083,20 +1054,11 @@ enum { | |||
1083 | ((_ac) == WME_AC_BK) ? MWL8K_WME_AC_BK : \ | 1054 | ((_ac) == WME_AC_BK) ? MWL8K_WME_AC_BK : \ |
1084 | MWL8K_WME_AC_BE) | 1055 | MWL8K_WME_AC_BE) |
1085 | 1056 | ||
1086 | #define MWL8K_TXD_STATUS_IDLE 0x00000000 | ||
1087 | #define MWL8K_TXD_STATUS_USED 0x00000001 | ||
1088 | #define MWL8K_TXD_STATUS_OK 0x00000001 | 1057 | #define MWL8K_TXD_STATUS_OK 0x00000001 |
1089 | #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002 | 1058 | #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002 |
1090 | #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004 | 1059 | #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004 |
1091 | #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008 | 1060 | #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008 |
1092 | #define MWL8K_TXD_STATUS_BROADCAST_TX 0x00000010 | ||
1093 | #define MWL8K_TXD_STATUS_FAILED_LINK_ERROR 0x00000020 | ||
1094 | #define MWL8K_TXD_STATUS_FAILED_EXCEED_LIMIT 0x00000040 | ||
1095 | #define MWL8K_TXD_STATUS_FAILED_AGING 0x00000080 | ||
1096 | #define MWL8K_TXD_STATUS_HOST_CMD 0x40000000 | ||
1097 | #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000 | 1061 | #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000 |
1098 | #define MWL8K_TXD_SOFTSTALE 0x80 | ||
1099 | #define MWL8K_TXD_SOFTSTALE_MGMT_RETRY 0x01 | ||
1100 | 1062 | ||
1101 | struct mwl8k_tx_desc { | 1063 | struct mwl8k_tx_desc { |
1102 | __le32 status; | 1064 | __le32 status; |
@@ -1279,12 +1241,10 @@ static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw, u32 delay_ms) | |||
1279 | return 0; | 1241 | return 0; |
1280 | } | 1242 | } |
1281 | 1243 | ||
1282 | #define MWL8K_TXD_OK (MWL8K_TXD_STATUS_OK | \ | 1244 | #define MWL8K_TXD_SUCCESS(status) \ |
1283 | MWL8K_TXD_STATUS_OK_RETRY | \ | 1245 | ((status) & (MWL8K_TXD_STATUS_OK | \ |
1284 | MWL8K_TXD_STATUS_OK_MORE_RETRY) | 1246 | MWL8K_TXD_STATUS_OK_RETRY | \ |
1285 | #define MWL8K_TXD_SUCCESS(stat) ((stat) & MWL8K_TXD_OK) | 1247 | MWL8K_TXD_STATUS_OK_MORE_RETRY)) |
1286 | #define MWL8K_TXD_FAIL_RETRY(stat) \ | ||
1287 | ((stat) & (MWL8K_TXD_STATUS_FAILED_EXCEED_LIMIT)) | ||
1288 | 1248 | ||
1289 | static void mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int force) | 1249 | static void mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int force) |
1290 | { | 1250 | { |
@@ -1671,7 +1631,6 @@ static int mwl8k_cmd_get_hw_spec(struct ieee80211_hw *hw) | |||
1671 | priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs); | 1631 | priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs); |
1672 | priv->fw_rev = le32_to_cpu(cmd->fw_rev); | 1632 | priv->fw_rev = le32_to_cpu(cmd->fw_rev); |
1673 | priv->hw_rev = cmd->hw_rev; | 1633 | priv->hw_rev = cmd->hw_rev; |
1674 | priv->region_code = le16_to_cpu(cmd->region_code); | ||
1675 | } | 1634 | } |
1676 | 1635 | ||
1677 | kfree(cmd); | 1636 | kfree(cmd); |
@@ -2150,7 +2109,6 @@ struct mwl8k_cmd_set_edca_params { | |||
2150 | __u8 txq; | 2109 | __u8 txq; |
2151 | } __attribute__((packed)); | 2110 | } __attribute__((packed)); |
2152 | 2111 | ||
2153 | #define MWL8K_GET_EDCA_ALL 0 | ||
2154 | #define MWL8K_SET_EDCA_CW 0x01 | 2112 | #define MWL8K_SET_EDCA_CW 0x01 |
2155 | #define MWL8K_SET_EDCA_TXOP 0x02 | 2113 | #define MWL8K_SET_EDCA_TXOP 0x02 |
2156 | #define MWL8K_SET_EDCA_AIFS 0x04 | 2114 | #define MWL8K_SET_EDCA_AIFS 0x04 |
@@ -2323,18 +2281,12 @@ static int mwl8k_cmd_update_sta_db(struct ieee80211_hw *hw, | |||
2323 | /* | 2281 | /* |
2324 | * CMD_SET_AID. | 2282 | * CMD_SET_AID. |
2325 | */ | 2283 | */ |
2326 | #define IEEE80211_OPMODE_DISABLED 0x00 | ||
2327 | #define IEEE80211_OPMODE_NON_MEMBER_PROT_MODE 0x01 | ||
2328 | #define IEEE80211_OPMODE_ONE_20MHZ_STA_PROT_MODE 0x02 | ||
2329 | #define IEEE80211_OPMODE_HTMIXED_PROT_MODE 0x03 | ||
2330 | |||
2331 | #define MWL8K_RATE_INDEX_MAX_ARRAY 14 | 2284 | #define MWL8K_RATE_INDEX_MAX_ARRAY 14 |
2332 | 2285 | ||
2333 | #define MWL8K_FRAME_PROT_DISABLED 0x00 | 2286 | #define MWL8K_FRAME_PROT_DISABLED 0x00 |
2334 | #define MWL8K_FRAME_PROT_11G 0x07 | 2287 | #define MWL8K_FRAME_PROT_11G 0x07 |
2335 | #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02 | 2288 | #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02 |
2336 | #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06 | 2289 | #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06 |
2337 | #define MWL8K_FRAME_PROT_MASK 0x07 | ||
2338 | 2290 | ||
2339 | struct mwl8k_cmd_update_set_aid { | 2291 | struct mwl8k_cmd_update_set_aid { |
2340 | struct mwl8k_cmd_pkt header; | 2292 | struct mwl8k_cmd_pkt header; |
@@ -2439,10 +2391,6 @@ static int mwl8k_update_rateset(struct ieee80211_hw *hw, | |||
2439 | */ | 2391 | */ |
2440 | #define MWL8K_RATE_TABLE_SIZE 8 | 2392 | #define MWL8K_RATE_TABLE_SIZE 8 |
2441 | #define MWL8K_UCAST_RATE 0 | 2393 | #define MWL8K_UCAST_RATE 0 |
2442 | #define MWL8K_MCAST_RATE 1 | ||
2443 | #define MWL8K_BCAST_RATE 2 | ||
2444 | |||
2445 | #define MWL8K_USE_FIXED_RATE 0x0001 | ||
2446 | #define MWL8K_USE_AUTO_RATE 0x0002 | 2394 | #define MWL8K_USE_AUTO_RATE 0x0002 |
2447 | 2395 | ||
2448 | struct mwl8k_rate_entry { | 2396 | struct mwl8k_rate_entry { |
@@ -2535,7 +2483,6 @@ static irqreturn_t mwl8k_interrupt(int irq, void *dev_id) | |||
2535 | status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | 2483 | status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); |
2536 | iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | 2484 | iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); |
2537 | 2485 | ||
2538 | status &= priv->int_mask; | ||
2539 | if (!status) | 2486 | if (!status) |
2540 | return IRQ_NONE; | 2487 | return IRQ_NONE; |
2541 | 2488 | ||
@@ -2873,7 +2820,7 @@ static int mwl8k_start(struct ieee80211_hw *hw) | |||
2873 | } | 2820 | } |
2874 | 2821 | ||
2875 | /* Enable interrupts */ | 2822 | /* Enable interrupts */ |
2876 | iowrite32(priv->int_mask, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); | 2823 | iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
2877 | 2824 | ||
2878 | worker = kzalloc(sizeof(*worker), GFP_KERNEL); | 2825 | worker = kzalloc(sizeof(*worker), GFP_KERNEL); |
2879 | if (worker == NULL) { | 2826 | if (worker == NULL) { |
@@ -3532,7 +3479,6 @@ static int __devinit mwl8k_probe(struct pci_dev *pdev, | |||
3532 | priv->hostcmd_wait = NULL; | 3479 | priv->hostcmd_wait = NULL; |
3533 | priv->tx_wait = NULL; | 3480 | priv->tx_wait = NULL; |
3534 | priv->inconfig = false; | 3481 | priv->inconfig = false; |
3535 | priv->wep_enabled = 0; | ||
3536 | priv->wmm_mode = false; | 3482 | priv->wmm_mode = false; |
3537 | priv->pending_tx_pkts = 0; | 3483 | priv->pending_tx_pkts = 0; |
3538 | strncpy(priv->name, MWL8K_NAME, sizeof(priv->name)); | 3484 | strncpy(priv->name, MWL8K_NAME, sizeof(priv->name)); |
@@ -3614,8 +3560,7 @@ static int __devinit mwl8k_probe(struct pci_dev *pdev, | |||
3614 | } | 3560 | } |
3615 | 3561 | ||
3616 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | 3562 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); |
3617 | priv->int_mask = 0; | 3563 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
3618 | iowrite32(priv->int_mask, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); | ||
3619 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL); | 3564 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL); |
3620 | iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK); | 3565 | iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK); |
3621 | 3566 | ||
@@ -3652,9 +3597,7 @@ static int __devinit mwl8k_probe(struct pci_dev *pdev, | |||
3652 | * commands use interrupts and avoids polling. Disable | 3597 | * commands use interrupts and avoids polling. Disable |
3653 | * interrupts when done. | 3598 | * interrupts when done. |
3654 | */ | 3599 | */ |
3655 | priv->int_mask |= MWL8K_A2H_EVENTS; | 3600 | iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
3656 | |||
3657 | iowrite32(priv->int_mask, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); | ||
3658 | 3601 | ||
3659 | /* Get config data, mac addrs etc */ | 3602 | /* Get config data, mac addrs etc */ |
3660 | rc = mwl8k_cmd_get_hw_spec(hw); | 3603 | rc = mwl8k_cmd_get_hw_spec(hw); |