diff options
author | Bjorn Helgaas <bhelgaas@google.com> | 2012-12-05 15:51:21 -0500 |
---|---|---|
committer | Bjorn Helgaas <bhelgaas@google.com> | 2012-12-07 13:19:55 -0500 |
commit | 438a0f0a1faa3dd00c0460e8232cd712215a6d46 (patch) | |
tree | 5328aa9707aa44a9741babdcf29113d1b851132e /drivers/net/wireless/iwlwifi/pcie/trans.c | |
parent | b9d146e30a2d855229f0944152f84aef1a21553b (diff) |
iwlwifi: Use standard #defines for PCIe Capability ASPM fields
Use the standard #defines rather than creating local definitions for
PCIe Capability ASPM fields.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Johannes Berg <johannes.berg@intel.com>
Diffstat (limited to 'drivers/net/wireless/iwlwifi/pcie/trans.c')
-rw-r--r-- | drivers/net/wireless/iwlwifi/pcie/trans.c | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/drivers/net/wireless/iwlwifi/pcie/trans.c b/drivers/net/wireless/iwlwifi/pcie/trans.c index 5cd06b3246fe..1dfa6be03058 100644 --- a/drivers/net/wireless/iwlwifi/pcie/trans.c +++ b/drivers/net/wireless/iwlwifi/pcie/trans.c | |||
@@ -670,8 +670,6 @@ static void iwl_set_pwr_vmain(struct iwl_trans *trans) | |||
670 | 670 | ||
671 | /* PCI registers */ | 671 | /* PCI registers */ |
672 | #define PCI_CFG_RETRY_TIMEOUT 0x041 | 672 | #define PCI_CFG_RETRY_TIMEOUT 0x041 |
673 | #define PCI_CFG_LINK_CTRL_VAL_L0S_EN 0x01 | ||
674 | #define PCI_CFG_LINK_CTRL_VAL_L1_EN 0x02 | ||
675 | 673 | ||
676 | static void iwl_apm_config(struct iwl_trans *trans) | 674 | static void iwl_apm_config(struct iwl_trans *trans) |
677 | { | 675 | { |
@@ -688,8 +686,7 @@ static void iwl_apm_config(struct iwl_trans *trans) | |||
688 | */ | 686 | */ |
689 | 687 | ||
690 | pcie_capability_read_word(trans_pcie->pci_dev, PCI_EXP_LNKCTL, &lctl); | 688 | pcie_capability_read_word(trans_pcie->pci_dev, PCI_EXP_LNKCTL, &lctl); |
691 | if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) == | 689 | if (lctl & PCI_EXP_LNKCTL_ASPM_L1) { |
692 | PCI_CFG_LINK_CTRL_VAL_L1_EN) { | ||
693 | /* L1-ASPM enabled; disable(!) L0S */ | 690 | /* L1-ASPM enabled; disable(!) L0S */ |
694 | iwl_set_bit(trans, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED); | 691 | iwl_set_bit(trans, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED); |
695 | dev_printk(KERN_INFO, trans->dev, | 692 | dev_printk(KERN_INFO, trans->dev, |
@@ -700,7 +697,7 @@ static void iwl_apm_config(struct iwl_trans *trans) | |||
700 | dev_printk(KERN_INFO, trans->dev, | 697 | dev_printk(KERN_INFO, trans->dev, |
701 | "L1 Disabled; Enabling L0S\n"); | 698 | "L1 Disabled; Enabling L0S\n"); |
702 | } | 699 | } |
703 | trans->pm_support = !(lctl & PCI_CFG_LINK_CTRL_VAL_L0S_EN); | 700 | trans->pm_support = !(lctl & PCI_EXP_LNKCTL_ASPM_L0S); |
704 | } | 701 | } |
705 | 702 | ||
706 | /* | 703 | /* |