iwlwifi: give trans to all the read / write functions

From now on, the transport layer in charge of providing access to the
device. So change all the driver to give a pointer to the transport
to all the low level functions that actually access the device.

Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
Signed-off-by: Wey-Yi Guy <wey-yi.w.guy@intel.com>

1 files changed, 8 insertions, 8 deletions

diff --git a/drivers/net/wireless/iwlwifi/iwl-testmode.c b/drivers/net/wireless/iwlwifi/iwl-testmode.c
index a56a77b8f926..922d841faba2 100644
--- a/drivers/net/wireless/iwlwifi/iwl-testmode.c
+++ b/drivers/net/wireless/iwlwifi/iwl-testmode.c
@@ -208,7 +208,7 @@ static void iwl_trace_cleanup(struct iwl_priv *priv)
         if (priv->testmode_trace.trace_enabled) {
                 if (priv->testmode_trace.cpu_addr &&
                     priv->testmode_trace.dma_addr)
-                        dma_free_coherent(bus(priv)->dev,
+                        dma_free_coherent(trans(priv)->dev,
                                         priv->testmode_trace.total_size,
                                         priv->testmode_trace.cpu_addr,
                                         priv->testmode_trace.dma_addr);
@@ -302,7 +302,7 @@ static int iwl_testmode_reg(struct ieee80211_hw *hw, struct nlattr **tb)
 
         switch (nla_get_u32(tb[IWL_TM_ATTR_COMMAND])) {
         case IWL_TM_CMD_APP2DEV_DIRECT_REG_READ32:
-                val32 = iwl_read_direct32(bus(priv), ofs);
+                val32 = iwl_read_direct32(trans(priv), ofs);
                 IWL_INFO(priv, "32bit value to read 0x%x\n", val32);
 
                 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, 20);
@@ -324,7 +324,7 @@ static int iwl_testmode_reg(struct ieee80211_hw *hw, struct nlattr **tb)
                 } else {
                         val32 = nla_get_u32(tb[IWL_TM_ATTR_REG_VALUE32]);
                         IWL_INFO(priv, "32bit value to write 0x%x\n", val32);
-                        iwl_write_direct32(bus(priv), ofs, val32);
+                        iwl_write_direct32(trans(priv), ofs, val32);
                 }
                 break;
         case IWL_TM_CMD_APP2DEV_DIRECT_REG_WRITE8:
@@ -334,11 +334,11 @@ static int iwl_testmode_reg(struct ieee80211_hw *hw, struct nlattr **tb)
                 } else {
                         val8 = nla_get_u8(tb[IWL_TM_ATTR_REG_VALUE8]);
                         IWL_INFO(priv, "8bit value to write 0x%x\n", val8);
-                        iwl_write8(bus(priv), ofs, val8);
+                        iwl_write8(trans(priv), ofs, val8);
                 }
                 break;
         case IWL_TM_CMD_APP2DEV_INDIRECT_REG_READ32:
-                val32 = iwl_read_prph(bus(priv), ofs);
+                val32 = iwl_read_prph(trans(priv), ofs);
                 IWL_INFO(priv, "32bit value to read 0x%x\n", val32);
 
                 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, 20);
@@ -360,7 +360,7 @@ static int iwl_testmode_reg(struct ieee80211_hw *hw, struct nlattr **tb)
                 } else {
                         val32 = nla_get_u32(tb[IWL_TM_ATTR_REG_VALUE32]);
                         IWL_INFO(priv, "32bit value to write 0x%x\n", val32);
-                        iwl_write_prph(bus(priv), ofs, val32);
+                        iwl_write_prph(trans(priv), ofs, val32);
                 }
                 break;
         default:
@@ -615,7 +615,7 @@ static int iwl_testmode_trace(struct ieee80211_hw *hw, struct nlattr **tb)
         struct iwl_priv *priv = hw->priv;
         struct sk_buff *skb;
         int status = 0;
-        struct device *dev = bus(priv)->dev;
+        struct device *dev = trans(priv)->dev;
 
         switch (nla_get_u32(tb[IWL_TM_ATTR_COMMAND])) {
         case IWL_TM_CMD_APP2DEV_BEGIN_TRACE:
@@ -814,7 +814,7 @@ static int iwl_testmode_sram(struct ieee80211_hw *hw, struct nlattr **tb)
                 IWL_ERR(priv, "Error allocating memory\n");
                 return -ENOMEM;
         }
-        _iwl_read_targ_mem_words(bus(priv), ofs,
+        _iwl_read_targ_mem_words(trans(priv), ofs,
                                         priv->testmode_sram.buff_addr,
                                         priv->testmode_sram.buff_size / 4);
         priv->testmode_sram.num_chunks =