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authorAbhijeet Kolekar <abhijeet.kolekar@intel.com>2009-10-02 16:44:05 -0400
committerJohn W. Linville <linville@tuxdriver.com>2009-10-07 16:39:45 -0400
commit1739d3322008fb95e88ad0530bcc057789107879 (patch)
tree4313490309c954c6edb72d90e73e326dcfd17cce /drivers/net/wireless/iwlwifi/iwl-eeprom.c
parentd68b603cf01a6e7d8c85c5a86db751ed3960c0c7 (diff)
iwlwifi: replace iwl_poll_direct_bit with iwl_poll_bit for CSR access
Replace iwl_poll_direct_bit with iwl_poll_bit when accessing CSR registers. There is no need to power up the mac to access CSR registers. Signed-off-by: Abhijeet Kolekar <abhijeet.kolekar@intel.com> Acked-by: Ben M Cahill <ben.m.cahill@intel.com> Signed-off-by: Reinette Chatre <reinette.chatre@intel.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/iwlwifi/iwl-eeprom.c')
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-eeprom.c12
1 files changed, 8 insertions, 4 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl-eeprom.c b/drivers/net/wireless/iwlwifi/iwl-eeprom.c
index 3d2b93a61e62..8107132ab66c 100644
--- a/drivers/net/wireless/iwlwifi/iwl-eeprom.c
+++ b/drivers/net/wireless/iwlwifi/iwl-eeprom.c
@@ -283,7 +283,8 @@ int iwlcore_eeprom_acquire_semaphore(struct iwl_priv *priv)
283 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM); 283 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
284 284
285 /* See if we got it */ 285 /* See if we got it */
286 ret = iwl_poll_direct_bit(priv, CSR_HW_IF_CONFIG_REG, 286 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
287 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
287 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM, 288 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
288 EEPROM_SEM_TIMEOUT); 289 EEPROM_SEM_TIMEOUT);
289 if (ret >= 0) { 290 if (ret >= 0) {
@@ -322,7 +323,8 @@ static int iwl_init_otp_access(struct iwl_priv *priv)
322 CSR_GP_CNTRL_REG_FLAG_INIT_DONE); 323 CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
323 324
324 /* wait for clock to be ready */ 325 /* wait for clock to be ready */
325 ret = iwl_poll_direct_bit(priv, CSR_GP_CNTRL, 326 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
327 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
326 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 328 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
327 25000); 329 25000);
328 if (ret < 0) 330 if (ret < 0)
@@ -345,7 +347,8 @@ static int iwl_read_otp_word(struct iwl_priv *priv, u16 addr, u16 *eeprom_data)
345 347
346 _iwl_write32(priv, CSR_EEPROM_REG, 348 _iwl_write32(priv, CSR_EEPROM_REG,
347 CSR_EEPROM_REG_MSK_ADDR & (addr << 1)); 349 CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
348 ret = iwl_poll_direct_bit(priv, CSR_EEPROM_REG, 350 ret = iwl_poll_bit(priv, CSR_EEPROM_REG,
351 CSR_EEPROM_REG_READ_VALID_MSK,
349 CSR_EEPROM_REG_READ_VALID_MSK, 352 CSR_EEPROM_REG_READ_VALID_MSK,
350 IWL_EEPROM_ACCESS_TIMEOUT); 353 IWL_EEPROM_ACCESS_TIMEOUT);
351 if (ret < 0) { 354 if (ret < 0) {
@@ -538,7 +541,8 @@ int iwl_eeprom_init(struct iwl_priv *priv)
538 _iwl_write32(priv, CSR_EEPROM_REG, 541 _iwl_write32(priv, CSR_EEPROM_REG,
539 CSR_EEPROM_REG_MSK_ADDR & (addr << 1)); 542 CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
540 543
541 ret = iwl_poll_direct_bit(priv, CSR_EEPROM_REG, 544 ret = iwl_poll_bit(priv, CSR_EEPROM_REG,
545 CSR_EEPROM_REG_READ_VALID_MSK,
542 CSR_EEPROM_REG_READ_VALID_MSK, 546 CSR_EEPROM_REG_READ_VALID_MSK,
543 IWL_EEPROM_ACCESS_TIMEOUT); 547 IWL_EEPROM_ACCESS_TIMEOUT);
544 if (ret < 0) { 548 if (ret < 0) {